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SLURM job 220976 starting up on node mincpld0
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job working directory is /nfs/home/azonenberg/Documents/local/programming/achd-soc/trunk/splashbuild/splash/0a2737f233c78b8b8df2ca5b12c12d98ad79d5412221b91c8aefee66cd0fc94e

Loading configuration...
Starting jtagd (using ftdi API, interface serial FTWB6M0W) on port 29880...
Spawning test case...
Normal termination of test case
Blanking FPGA for next test...

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Test case stdout:
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Connected to interface "Dev Board JTAG (232H)" (serial number "FTWB6M0W")
Initializing chain...
Scan chain contains 1 devices
Found Xilinx XC2C32A in VQ44 package, stepping 0
Initializing GPIO interface...
    Interface is GPIO capable (12 GPIO pins)
Initializing device...
Generating netlist...
IOB assignment
    IOB for FTDI_GPIOL0 is at fb2_12
    IOB for FTDI_GPIOL1 is at fb2_11
    IOB for LED1 is at fb1_1
    IOB for LED2 is at fb1_2
IO bank fitting
Macrocell fitting
    Pass 1: I/O macrocells                 3 placed, 0 unplaced, 29 available
    Pass 2: Unplaced macrocells            3 placed, 0 unplaced, 29 available
Function block fitting (1)
    Global routing
        1 net(s) assigned to function block inputs
        Pass 1: Greedy assignment          0 unrouted
        Generating ZIA bits
    Product term fitting
        2 pterms used
        Pass 1: Constrained assignment     2 unassigned
        Pass 2: Unconstrained assignment   0 unassigned
    Generating PLA AND array bits
    Generating PLA OR array bits
Function block fitting (2)
    Global routing
        1 net(s) assigned to function block inputs
        Pass 1: Greedy assignment          0 unrouted
        Generating ZIA bits
    Product term fitting
        1 pterms used
        Pass 1: Constrained assignment     1 unassigned
        Pass 2: Unconstrained assignment   0 unassigned
    Generating PLA AND array bits
    Generating PLA OR array bits
Generating bitstream...
Configuring device...
    Using bitstream "Programmer JEDEC Bit Map|Generated on Sat Jul 13 08:49:57 EDT 2013 by azonenberg using libcrowbar|Device: xc2c32a-6-vqg44||" for device "xc2c32a-6-vqg44" (12278 fuses)
    Device xc2c32a, speed 6, package vqg44
    Device name / package check OK
    Erasing device...
    Blank checking...
    Device is blank
    Programming main array (shift register size = 266, nbytes=34)...
    Verifying main array...
    Readback successful
    Testing dout=0
    Testing dout=1
    Testing dout=0
    Testing dout=1
    Testing dout=0
    Testing dout=1
    Testing dout=0
    Testing dout=1
    Testing dout=0
    Testing dout=1
    Testing dout=0
    Testing dout=1
    Testing dout=0
    Testing dout=1
    Testing dout=0
    Testing dout=1
    Testing dout=0
    Testing dout=1
    Testing dout=0
    Testing dout=1
OK

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jtagd stdout:
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JTAG server daemon [SVN rev 1088M] by Andrew D. Zonenberg.

License: 3-clause ("new" or "modified") BSD.
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.

Connected to interface "Dev Board JTAG (232H)" (serial number "FTWB6M0W")
Quitting...
Total number of shift operations:       1200
Total number of recoverable errors:     0
Total number of data bits:              57912
Total number of mode bits:              2085
Total number of dummy clocks:           0
Total TCK cycles:                       59997
Total host-side shift time:             145.73 ms
Calculated board-side shift time:       6.00 ms
Calculated total latency:               139.73 ms
Calculated average latency:             0.12 ms