Usage: eeschema [--help] [--list-sheets] [--plot <str>] [--plot-bw] [--plot-sheetref] [--erc] [--netlist] [--bom] <path to .sch file>
  --help                command line help

  --list-sheets         list schematic pages

  --plot=<str>          File -> Plot [ps|svg|dxf]
  --plot-bw              Black & white (default: color)
  --plot-sheetref        Print page references (default: off)

  --erc                 Tools -> ERC (.erc)
  --netlist             Tools -> Generate Netlist (.net)
  --bom                 Tools -> Generate Bill of Materials (.bom)

Usage: pcbnew [--help] [--list-layers] [--layers <str>] [--drill] [--drill-origin-aux] [--plot <str>] [--plot-fill-all-zones] [--plot-drill-marks <str>] [--plot-mirror] [--plot-ps-force-a4] [--plot-gb-ex-pcb-edge] [--plot-gb-aux-origin] [--svg <str>] [--svg-board-edges] [--drc] [--pos] [--bom] [--cmp] [--vrml] <path to .brd file>
  --help                        command line help

  --list-layers                 list names of enabled layers in .brd file
  --layers=<str>                comma separated layers for plot and SVG

  --drill                       File -> Fabrication -> Drill File (.drl)
  --drill-origin-aux             Use aux axis as origin (def: abs)

  --plot=<str>                  File -> Plot [gerber|ps|dxf]
  --plot-fill-all-zones          fill zones before plotting (not in the dialog)
  --plot-drill-marks=<str>       Drill marks [none|small|actual] (def: small)
  --plot-mirror                  Mirrored plot (Postscript only)
  --plot-ps-force-a4             Postscript: Force A4 output
  --plot-gb-ex-pcb-edge          Gerber: exclude PCB edge
  --plot-gb-aux-origin           Gerber: Use aux axis as origin (def: abs)

  --svg=<str>                   File -> Print SVG [selected|board]
  --svg-board-edges              add board edges to SVG plots (def: off)

  --drc                         Tools -> DRC (.rpt)
  --pos                         File -> Fabrication -> Modules Pos. (.pos)
  --bom                         File -> Fabrication -> BOM File (.csv)
  --cmp                         File -> Fabrication -> Comp. File (.cmp)
  --vrml                        File -> Export -> VRML (.wrl)