Stereo Encoder 192kHz

module module_192kHz(
    clock,
    reset,
    start,
    ready,
    clken192kHz,
    interpolated_LpR,
    interpolated_LmR,
    Kp,
    Kf,
    stepWc,
    step
);
parameter step_19kHz = 32'b0011001_010101;
parameter step_38kHz = 32'b0001100_101010;

parameter M = 18;
parameter N = 4;

input clock;
input reset;
input start;
input ready;
input clken192kHz;

wire signed [17:0] outsine19kHz;
wire signed [17:0] outsine38kHz;
wire signed [17:0] mstereo;
wire signed [29:0] outmstereo;

input signed [17:0] interpolated_LpR;
input signed [17:0] interpolated_LmR;

input Kf;
input [3:0] Kp;
input [29:0] stepWc;
output [29:0] step;

 dds  dds_38kHz(
            .clock( clock ),
            .reset( reset ),
            .enableclk( clken192kHz ),
            .phaseinc( step_38kHz ),
            .outsine( sine38kHz )
    );

 dds  dds_19kHz(
            .clock( clock ),
            .reset( reset ),
            .enableclk( clken192kHz ),
            .phaseinc( step_19kHz ),
            .outsine( sine19kHz )
    );

// Multiplies interpolated_LmR by a sine wave with a 38kHz frequency
 seqmultNM #( // definition of parameters
.N( N ), // parameter N = number of bits of the multiplier
.M( M ) // parameter M = numbero of bits of the multiplicand
 )
seqmult_19kHz // instance name
(
 .clock( clock ), // Master clock
 .reset( reset ), // Master reset, synchronous and active high
 .start( start ), // Set to 1 during one clock cycle to start the multiplication
 .ready( ready ), // Set to 1 when the multiplier is ready to accept a new start
 .A( sine19kHz ), // Multiplicand, signed M bits
 .B( Kp ), // Multiplier, signed N bits
 .R( outsine19kHz ) // Result, signed M+N bits
 );

  seqmultNM #( // definition of parameters
.N( N ), // parameter N = number of bits of the multiplier
.M( M ) // parameter M = numbero of bits of the multiplicand
 )
seqmult_38kHz // instance name
(
 .clock( clock ), // Master clock
 .reset( reset ), // Master reset, synchronous and active high
 .start( start ), // Set to 1 during one clock cycle to start the multiplication
 .ready( ready ), // Set to 1 when the multiplier is ready to accept a new start
 .A( interpolated_LmR ), // Multiplicand, signed M bits
 .B( sine38kHz ), // Multiplier, signed N bits
 .R( outsine38kHz ) // Result, signed M+N bits
 );

assign mstereo = outsine19kHz + interpolated_LpR + outsine38kHz;

  seqmultNM #( // definition of parameters
.N( N ), // parameter N = number of bits of the multiplier
.M( M ) // parameter M = numbero of bits of the multiplicand
 )
seqmult_Kf // instance name
(
 .clock( clock ), // Master clock
 .reset( reset ), // Master reset, synchronous and active high
 .start( start ), // Set to 1 during one clock cycle to start the multiplication
 .ready( ready ), // Set to 1 when the multiplier is ready to accept a new start
 .A( mstereo ), // Multiplicand, signed M bits
 .B( Kf ), // Multiplier, signed N bits
 .R( outmstereo ) // Result, signed M+N bits
 );

 assign step = mstereo + stepWc;

 endmodule