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- 4.12.1 I2C Control
- SDA is a bidirectional data line. Data is clocked into and out of the part by the clock, SCL. The signal tim-
- ings for a read and write cycle are shown in Figure 20 and Figure 21. A Start condition is defined as a
- falling transition of SDA while the clock is high. A Stop condition is defined as a rising transition of SDA
- while the clock is high. All other transitions of SDA occur while the clock is low. The first byte sent to the
- CS42L52 after a Start condition consists of a 7-bit chip address field and a R/W bit (high for a read, low
- for a write).
- The upper 7 bits of the address field are fixed at 1001010. To communicate with the CS42L52, the chip
- address field, which is the first byte sent to the CS42L52, should match 1001010. The eighth bit of the
- address is the R/W bit. If the operation is a write, the next byte is the Memory Address Pointer (MAP),
- which selects the register to be read or written. If the operation is a read, the contents of the register point-
- ed to by the MAP will be output. Setting the auto-increment bit in MAP allows successive reads or writes
- of consecutive registers. Each byte is separated by an acknowledge bit. The ACK bit is output from the
- CS42L52 after each input byte is read and is input to the CS42L52 from the microcontroller after each
- transmitted byte.
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