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- Slice Logic Utilization:
- Number of Slice Registers: 64,340 out of 184,304 34%
- Number used as Flip Flops: 63,983
- Number used as Latches: 0
- Number used as Latch-thrus: 0
- Number used as AND/OR logics: 357
- Number of Slice LUTs: 54,520 out of 92,152 59%
- Number used as logic: 38,979 out of 92,152 42%
- Number using O6 output only: 23,844
- Number using O5 output only: 579
- Number using O5 and O6: 14,556
- Number used as ROM: 0
- Number used as Memory: 13,032 out of 21,680 60%
- Number used as Dual Port RAM: 0
- Number used as Single Port RAM: 0
- Number used as Shift Register: 13,032
- Number using O6 output only: 450
- Number using O5 output only: 0
- Number using O5 and O6: 12,582
- Number used exclusively as route-thrus: 2,509
- Number with same-slice register load: 1,870
- Number with same-slice carry load: 639
- Number with other load: 0
- Slice Logic Distribution:
- Number of occupied Slices: 16,465 out of 23,038 71%
- Number of MUXCYs used: 22,156 out of 46,076 48%
- Number of LUT Flip Flop pairs used: 58,021
- Number with an unused Flip Flop: 11,231 out of 58,021 19%
- Number with an unused LUT: 3,501 out of 58,021 6%
- Number of fully used LUT-FF pairs: 43,289 out of 58,021 74%
- Number of slice register sites lost
- to control set restrictions: 0 out of 184,304 0%
- A LUT Flip Flop pair for this architecture represents one LUT paired with
- one Flip Flop within a slice. A control set is a unique combination of
- clock, reset, set, and enable signals for a registered element.
- The Slice Logic Distribution report is not meaningful if the design is
- over-mapped for a non-slice resource or if Placement fails.
- IO Utilization:
- Number of bonded IOBs: 26 out of 338 7%
- Number of LOCed IOBs: 26 out of 26 100%
- IOB Flip Flops: 3
- Specific Feature Utilization:
- Number of RAMB16BWERs: 0 out of 268 0%
- Number of RAMB8BWERs: 0 out of 536 0%
- Number of BUFIO2/BUFIO2_2CLKs: 0 out of 32 0%
- Number of BUFIO2FB/BUFIO2FB_2CLKs: 0 out of 32 0%
- Number of BUFG/BUFGMUXs: 2 out of 16 12%
- Number used as BUFGs: 2
- Number used as BUFGMUX: 0
- Number of DCM/DCM_CLKGENs: 1 out of 12 8%
- Number used as DCMs: 0
- Number used as DCM_CLKGENs: 1
- Number of ILOGIC2/ISERDES2s: 3 out of 586 1%
- Number used as ILOGIC2s: 3
- Number used as ISERDES2s: 0
- Number of IODELAY2/IODRP2/IODRP2_MCBs: 0 out of 586 0%
- Number of OLOGIC2/OSERDES2s: 0 out of 586 0%
- Number of BSCANs: 0 out of 4 0%
- Number of BUFHs: 0 out of 384 0%
- Number of BUFPLLs: 0 out of 8 0%
- Number of BUFPLL_MCBs: 0 out of 4 0%
- Number of DSP48A1s: 0 out of 180 0%
- Number of ICAPs: 0 out of 1 0%
- Number of MCBs: 0 out of 4 0%
- Number of PCILOGICSEs: 0 out of 2 0%
- Number of PLL_ADVs: 1 out of 6 16%
- Number of PMVs: 0 out of 1 0%
- Number of STARTUPs: 0 out of 1 0%
- Number of SUSPEND_SYNCs: 0 out of 1 0%
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