<matrix_add_const>
bfc01ed0: 00063400	sll	a2,a2,16
bfc01ed4: 0004502b	sltu	t2,zr,a0
bfc01ed8: 00063403	sra	a2,a2,16
bfc01edc: 11400010	beq	zr,t2,0xbfc01f20	<matrix_add_const+0x50>
bfc01ee0: 00004821 (d)	move	t1,zr
bfc01ee4: 00004021	move	t0,zr
bfc01ee8: 11400009	beq	zr,t2,0xbfc01f10	<matrix_add_const+0x40>
bfc01eec: 00081040 (d)	sll	v0,t0,1
bfc01ef0: 00451821	addu	v1,v0,a1
bfc01ef4: 00803821	move	a3,a0
bfc01ef8: 946c0000	lhu	t4,0(v1)	[0xa10b4320 = static_memblk+0x29c]
bfc01efc: 24e7ffff	addiu	a3,a3,-1
bfc01f00: 00cc5821	addu	t3,a2,t4
bfc01f04: a46b0000	sh	t3,0(v1)	[0xa10b4320 = static_memblk+0x29c]
bfc01f08: 14e0fffb	bne	zr,a3,0xbfc01ef8	<matrix_add_const+0x28>
bfc01f0c: 24630002 (d)	addiu	v1,v1,2
bfc01ef8: 946c0000	lhu	t4,0(v1)	[0xa10b4322 = static_memblk+0x29e]
bfc01efc: 24e7ffff	addiu	a3,a3,-1
bfc01f00: 00cc5821	addu	t3,a2,t4
bfc01f04: a46b0000	sh	t3,0(v1)	[0xa10b4322 = static_memblk+0x29e]
bfc01f08: 14e0fffb	bne	zr,a3,0xbfc01ef8	<matrix_add_const+0x28>
bfc01f0c: 24630002 (d)	addiu	v1,v1,2
bfc01ef8: 946c0000	lhu	t4,0(v1)	[0xa10b4324 = static_memblk+0x2a0]
bfc01efc: 24e7ffff	addiu	a3,a3,-1
bfc01f00: 00cc5821	addu	t3,a2,t4
bfc01f04: a46b0000	sh	t3,0(v1)	[0xa10b4324 = static_memblk+0x2a0]
bfc01f08: 14e0fffb	bne	zr,a3,0xbfc01ef8	<matrix_add_const+0x28>
bfc01f0c: 24630002 (d)	addiu	v1,v1,2
bfc01ef8: 946c0000	lhu	t4,0(v1)	[0xa10b4326 = static_memblk+0x2a2]
bfc01efc: 24e7ffff	addiu	a3,a3,-1
bfc01f00: 00cc5821	addu	t3,a2,t4
bfc01f04: a46b0000	sh	t3,0(v1)	[0xa10b4326 = static_memblk+0x2a2]
bfc01f08: 14e0fffb	bne	zr,a3,0xbfc01ef8	<matrix_add_const+0x28>
bfc01f0c: 24630002 (d)	addiu	v1,v1,2
bfc01ef8: 946c0000	lhu	t4,0(v1)	[0xa10b4328 = static_memblk+0x2a4]
bfc01efc: 24e7ffff	addiu	a3,a3,-1
bfc01f00: 00cc5821	addu	t3,a2,t4
bfc01f04: a46b0000	sh	t3,0(v1)	[0xa10b4328 = static_memblk+0x2a4]
bfc01f08: 14e0fffb	bne	zr,a3,0xbfc01ef8	<matrix_add_const+0x28>
bfc01f0c: 24630002 (d)	addiu	v1,v1,2
bfc01ef8: 946c0000	lhu	t4,0(v1)	[0xa10b432a = static_memblk+0x2a6]
bfc01efc: 24e7ffff	addiu	a3,a3,-1
bfc01f00: 00cc5821	addu	t3,a2,t4
bfc01f04: a46b0000	sh	t3,0(v1)	[0xa10b432a = static_memblk+0x2a6]
bfc01f08: 14e0fffb	bne	zr,a3,0xbfc01ef8	<matrix_add_const+0x28>
bfc01f0c: 24630002 (d)	addiu	v1,v1,2
bfc01ef8: 946c0000	lhu	t4,0(v1)	[0xa10b432c = static_memblk+0x2a8]
bfc01efc: 24e7ffff	addiu	a3,a3,-1
bfc01f00: 00cc5821	addu	t3,a2,t4
bfc01f04: a46b0000	sh	t3,0(v1)	[0xa10b432c = static_memblk+0x2a8]
bfc01f08: 14e0fffb	bne	zr,a3,0xbfc01ef8	<matrix_add_const+0x28>
bfc01f0c: 24630002 (d)	addiu	v1,v1,2
bfc01ef8: 946c0000	lhu	t4,0(v1)	[0xa10b432e = static_memblk+0x2aa]
bfc01efc: 24e7ffff	addiu	a3,a3,-1
bfc01f00: 00cc5821	addu	t3,a2,t4
bfc01f04: a46b0000	sh	t3,0(v1)	[0xa10b432e = static_memblk+0x2aa]
bfc01f08: 14e0fffb	bne	zr,a3,0xbfc01ef8	<matrix_add_const+0x28>
bfc01f0c: 24630002 (d)	addiu	v1,v1,2
bfc01ef8: 946c0000	lhu	t4,0(v1)	[0xa10b4330 = static_memblk+0x2ac]
bfc01efc: 24e7ffff	addiu	a3,a3,-1
bfc01f00: 00cc5821	addu	t3,a2,t4
bfc01f04: a46b0000	sh	t3,0(v1)	[0xa10b4330 = static_memblk+0x2ac]
bfc01f08: 14e0fffb	bne	zr,a3,0xbfc01ef8	<matrix_add_const+0x28>
bfc01f0c: 24630002 (d)	addiu	v1,v1,2
bfc01f10: 25290001	addiu	t1,t1,1
bfc01f14: 0124182b	sltu	v1,t1,a0
bfc01f18: 1460fff3	bne	zr,v1,0xbfc01ee8	<matrix_add_const+0x18>
bfc01f1c: 01044021 (d)	addu	t0,t0,a0
bfc01ee8: 11400009	beq	zr,t2,0xbfc01f10	<matrix_add_const+0x40>
bfc01eec: 00081040 (d)	sll	v0,t0,1
bfc01ef0: 00451821	addu	v1,v0,a1
bfc01ef4: 00803821	move	a3,a0
bfc01ef8: 946c0000	lhu	t4,0(v1)	[0xa10b4332 = static_memblk+0x2ae]
bfc01efc: 24e7ffff	addiu	a3,a3,-1
bfc01f00: 00cc5821	addu	t3,a2,t4
bfc01f04: a46b0000	sh	t3,0(v1)	[0xa10b4332 = static_memblk+0x2ae]
bfc01f08: 14e0fffb	bne	zr,a3,0xbfc01ef8	<matrix_add_const+0x28>
bfc01f0c: 24630002 (d)	addiu	v1,v1,2
bfc01ef8: 946c0000	lhu	t4,0(v1)	[0xa10b4334 = static_memblk+0x2b0]