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mmc0 error on Moto G

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  1. <3>[ 4072.629911,0] mmc0: CMD18: Data timeout. DAT0 => 1
  2. <3>[ 4072.630051,0] mmc0: SDCC PWR is ON
  3. <3>[ 4072.630125,0] mmc0: SDCC clks are ON, MCLK rate=200000000
  4. <3>[ 4072.630255,0] mmc0: SDCC irq is enabled
  5. <3>[ 4072.630328,0] ===== SDCC-CORE: Register Dumps @phys_base=0xf9824000, @virt_base=0xe6a94000 =====
  6. <3>[ 4072.630463,0] Reg=0x00: 0x00000001, 0x01211f00, 0x00228418, 0x00001452
  7. <3>[ 4072.630539,0] Reg=0x10: 0x00000012, 0x00000900, 0x30384739, 0x32519747
  8. <3>[ 4072.630672,0] Reg=0x20: 0x09ce8008, 0x003d0900, 0x00001000, 0x0010200b
  9. <3>[ 4072.630746,0] Reg=0x30: 0x00000800, 0x000c0400, 0x00000000, 0x408001ff
  10. <3>[ 4072.630878,0] Reg=0x40: 0x00000000, 0x00000000, 0x00000000, 0x00000000
  11. <3>[ 4072.631011,0] Reg=0x50: 0x00000038, 0x00000000, 0x00000000, 0x00000000
  12. <3>[ 4072.631087,0] Reg=0x60: 0x07876400, 0x00000000, 0x00000044, 0x00000000
  13. <3>[ 4072.631219,0] mmc0: MCI_TEST_INPUT = 0x000003fe
  14. <3>[ 4072.631289,0] == SDCC Test Bus Debug ==
  15. <3>[ 4072.631361,0] TestBus(0) = 0x00008000
  16. <3>[ 4072.631555,0] TestBus(1) = 0x00002080
  17. <3>[ 4072.631629,0] TestBus(2) = 0x00007018
  18. <3>[ 4072.631705,0] TestBus(3) = 0x01c002ff
  19. <3>[ 4072.631844,0] TestBus(4) = 0x00463fd8
  20. <3>[ 4072.631917,0] TestBus(5) = 0x0004c038
  21. <3>[ 4072.631989,0] TestBus(6) = 0x40000000
  22. <3>[ 4072.632118,0] TestBus(7) = 0xff83ffff
  23. <3>[ 4072.632190,0] ===== SDCC-DML: Register Dumps @phys_base=0xf9824800, @virt_base=0xe6a96800 =====
  24. <3>[ 4072.632324,0] Reg=0x00: 0x00000011, 0x00010000, 0x00000000, 0x00000000
  25. <3>[ 4072.632398,0] Reg=0x10: 0x00000000, 0x00001000, 0x00001000, 0x00020001
  26. <3>[ 4072.632530,0] Reg=0x20: 0x00000000, 0x00000200, 0x00001000, 0x00000000
  27. <3>[ 4072.632661,0] Reg=0x30: 0x00000000, 0x00000000, 0x00000000, 0x00000000
  28. <3>[ 4072.632733,0] mmc0: SPS mode: busy=1
  29. <3>[ 4072.632804,0] mmc0: xfer_size=4096, data_xfered=0, xfer_remain=4096
  30. <3>[ 4072.632935,0] mmc0: got_dataend=0, prog_enable=0, wait_for_auto_prog_done=0, got_auto_prog_done=0, req_tout_ms=10000
  31. <3>[ 4072.633068,0] mmc0: PM: sdcc_suspended=0, pending_resume=0, sdcc_suspending=0
  32. <3>[ 4072.633201,0] mmc0: RPM: runtime_status=0, usage_count=1, is_suspended=0, disable_depth=0, runtime_error=0, request_pending=0, request=0
  33. <3>[ 4072.636798,0] mmcblk0: error -110 transferring data, sector 2262040, nr 8, cmd response 0x900, card status 0x200b00
  34. <4>[ 4072.636943,0] mmcblk0: retrying using single block read
  35. <3>[ 4072.657858,0] mmc0: CMD17: Data timeout. DAT0 => 1
  36. <3>[ 4072.657934,0] mmc0: SDCC PWR is ON
  37. <3>[ 4072.658064,0] mmc0: SDCC clks are ON, MCLK rate=200000000
  38. <3>[ 4072.658139,0] mmc0: SDCC irq is enabled
  39. <3>[ 4072.658271,0] ===== SDCC-CORE: Register Dumps @phys_base=0xf9824000, @virt_base=0xe6a94000 =====
  40. <3>[ 4072.658348,0] Reg=0x00: 0x00000001, 0x01211f00, 0x0022841c, 0x00001451
  41. <3>[ 4072.658480,0] Reg=0x10: 0x00000011, 0x00000900, 0x00000000, 0x00000000
  42. <3>[ 4072.658611,0] Reg=0x20: 0x00000000, 0x003d0900, 0x00000200, 0x0010200b
  43. <3>[ 4072.658687,0] Reg=0x30: 0x00000200, 0x000c0400, 0x00000000, 0x408001ff
  44. <3>[ 4072.658819,0] Reg=0x40: 0x00000000, 0x00000000, 0x00000000, 0x00000000
  45. <3>[ 4072.658894,0] Reg=0x50: 0x00000038, 0x00000000, 0x00000000, 0x00000000
  46. <3>[ 4072.659026,0] Reg=0x60: 0x07876400, 0x00000000, 0x00000044, 0x00000000
  47. <3>[ 4072.659102,0] mmc0: MCI_TEST_INPUT = 0x000003fe
  48. <3>[ 4072.659230,0] == SDCC Test Bus Debug ==
  49. <3>[ 4072.659303,0] TestBus(0) = 0x00008000
  50. <3>[ 4072.659438,0] TestBus(1) = 0x00000080
  51. <3>[ 4072.659567,0] TestBus(2) = 0x00007018
  52. <3>[ 4072.659639,0] TestBus(3) = 0x01c002ff
  53. <3>[ 4072.659709,0] TestBus(4) = 0x00463fd8
  54. <3>[ 4072.659837,0] TestBus(5) = 0x0004c038
  55. <3>[ 4072.659908,0] TestBus(6) = 0x00000000
  56. <3>[ 4072.659980,0] TestBus(7) = 0xff83ffff
  57. <3>[ 4072.660110,0] ===== SDCC-DML: Register Dumps @phys_base=0xf9824800, @virt_base=0xe6a96800 =====
  58. <3>[ 4072.660186,0] Reg=0x00: 0x00000011, 0x00010000, 0x00000000, 0x00000000
  59. <3>[ 4072.660319,0] Reg=0x10: 0x00000000, 0x00001000, 0x00001000, 0x00020001
  60. <3>[ 4072.660452,0] Reg=0x20: 0x00000000, 0x00000200, 0x00000200, 0x00000000
  61. <3>[ 4072.660527,0] Reg=0x30: 0x00000000, 0x00000000, 0x00000000, 0x00000000
  62. <3>[ 4072.660658,0] mmc0: SPS mode: busy=1
  63. <3>[ 4072.660730,0] mmc0: xfer_size=512, data_xfered=0, xfer_remain=512
  64. <3>[ 4072.660862,0] mmc0: got_dataend=0, prog_enable=0, wait_for_auto_prog_done=0, got_auto_prog_done=0, req_tout_ms=10000
  65. <3>[ 4072.660996,0] mmc0: PM: sdcc_suspended=0, pending_resume=0, sdcc_suspending=0
  66. <3>[ 4072.661072,0] mmc0: RPM: runtime_status=0, usage_count=1, is_suspended=0, disable_depth=0, runtime_error=0, request_pending=0, request=0
  67. <3>[ 4072.664441,0] mmcblk0: error -110 transferring data, sector 2262044, nr 4, cmd response 0x900, card status 0x0
  68. <3>[ 4072.746266,0] mmc0: CMD17: Data timeout. DAT0 => 1
  69. <3>[ 4072.746401,0] mmc0: SDCC PWR is ON
  70. <3>[ 4072.746473,0] mmc0: SDCC clks are ON, MCLK rate=200000000
  71. <3>[ 4072.746544,0] mmc0: SDCC irq is enabled
  72. <3>[ 4072.746675,0] ===== SDCC-CORE: Register Dumps @phys_base=0xf9824000, @virt_base=0xe6a94000 =====
  73. <3>[ 4072.746808,0] Reg=0x00: 0x00000001, 0x01211f00, 0x0022841c, 0x00001451
  74. <3>[ 4072.746884,0] Reg=0x10: 0x00000011, 0x00000900, 0x30384739, 0x32519747
  75. <3>[ 4072.747018,0] Reg=0x20: 0x09ce8008, 0x003d0900, 0x00000200, 0x0010200b
  76. <3>[ 4072.747094,0] Reg=0x30: 0x00000200, 0x000c0400, 0x00000000, 0x408001ff
  77. <3>[ 4072.747228,0] Reg=0x40: 0x00000000, 0x00000000, 0x00000000, 0x00000000
  78. <3>[ 4072.747302,0] Reg=0x50: 0x00000038, 0x00000000, 0x00000000, 0x00000000
  79. <3>[ 4072.747434,0] Reg=0x60: 0x07876400, 0x00000000, 0x00000044, 0x00000000
  80. <3>[ 4072.747564,0] mmc0: MCI_TEST_INPUT = 0x000003fe
  81. <3>[ 4072.747635,0] == SDCC Test Bus Debug ==
  82. <3>[ 4072.747707,0] TestBus(0) = 0x00008000
  83. <3>[ 4072.747901,0] TestBus(1) = 0x00000080
  84. <3>[ 4072.747974,0] TestBus(2) = 0x00007018
  85. <3>[ 4072.748046,0] TestBus(3) = 0x01c002ff
  86. <3>[ 4072.748174,0] TestBus(4) = 0x00463fd8
  87. <3>[ 4072.748245,0] TestBus(5) = 0x0004c038
  88. <3>[ 4072.748316,0] TestBus(6) = 0x00000000
  89. <3>[ 4072.748446,0] TestBus(7) = 0xff83ffff
  90. <3>[ 4072.748518,0] ===== SDCC-DML: Register Dumps @phys_base=0xf9824800, @virt_base=0xe6a96800 =====
  91. <3>[ 4072.748652,0] Reg=0x00: 0x00000011, 0x00010000, 0x00000000, 0x00000000
  92. <3>[ 4072.748727,0] Reg=0x10: 0x00000000, 0x00001000, 0x00001000, 0x00020001
  93. <3>[ 4072.748859,0] Reg=0x20: 0x00000000, 0x00000200, 0x00000200, 0x00000000
  94. <3>[ 4072.748934,0] Reg=0x30: 0x00000000, 0x00000000, 0x00000000, 0x00000000
  95. <3>[ 4072.749065,0] mmc0: SPS mode: busy=1
  96. <3>[ 4072.749138,0] mmc0: xfer_size=512, data_xfered=0, xfer_remain=512
  97. <3>[ 4072.749270,0] mmc0: got_dataend=0, prog_enable=0, wait_for_auto_prog_done=0, got_auto_prog_done=0, req_tout_ms=10000
  98. <3>[ 4072.749403,0] mmc0: PM: sdcc_suspended=0, pending_resume=0, sdcc_suspending=0
  99. <3>[ 4072.749479,0] mmc0: RPM: runtime_status=0, usage_count=1, is_suspended=0, disable_depth=0, runtime_error=0, request_pending=0, request=0
  100. <3>[ 4072.752911,0] mmcblk0: error -110 transferring data, sector 2262044, nr 4, cmd response 0x900, card status 0x0
  101. <3>[ 4072.753057,0] end_request: I/O error, dev mmcblk0, sector 2262044
  102. <3>[ 4072.773223,0] mmc0: CMD17: Data timeout. DAT0 => 1
  103. <3>[ 4072.773300,0] mmc0: SDCC PWR is ON
  104. <3>[ 4072.773433,0] mmc0: SDCC clks are ON, MCLK rate=200000000
  105. <3>[ 4072.773507,0] mmc0: SDCC irq is enabled
  106. <3>[ 4072.773580,0] ===== SDCC-CORE: Register Dumps @phys_base=0xf9824000, @virt_base=0xe6a94000 =====
  107. <3>[ 4072.773745,0] Reg=0x00: 0x00000001, 0x01211f00, 0x0022841d, 0x00001451
  108. <3>[ 4072.773881,0] Reg=0x10: 0x00000011, 0x00000900, 0x00000000, 0x00000000
  109. <3>[ 4072.773957,0] Reg=0x20: 0x00000000, 0x003d0900, 0x00000200, 0x0010200b
  110. <3>[ 4072.774089,0] Reg=0x30: 0x00000200, 0x000c0400, 0x00000000, 0x408001ff
  111. <3>[ 4072.774220,0] Reg=0x40: 0x00000000, 0x00000000, 0x00000000, 0x00000000
  112. <3>[ 4072.774295,0] Reg=0x50: 0x00000038, 0x00000000, 0x00000000, 0x00000000
  113. <3>[ 4072.774427,0] Reg=0x60: 0x07876400, 0x00000000, 0x00000044, 0x00000000
  114. <3>[ 4072.774501,0] mmc0: MCI_TEST_INPUT = 0x000003fe
  115. <3>[ 4072.774631,0] == SDCC Test Bus Debug ==
  116. <3>[ 4072.774702,0] TestBus(0) = 0x00008000
  117. <3>[ 4072.774839,0] TestBus(1) = 0x00000080
  118. <3>[ 4072.774967,0] TestBus(2) = 0x00007018
  119. <3>[ 4072.775038,0] TestBus(3) = 0x01c002ff
  120. <3>[ 4072.775111,0] TestBus(4) = 0x00463fd8
  121. <3>[ 4072.775239,0] TestBus(5) = 0x0004c038
  122. <3>[ 4072.775309,0] TestBus(6) = 0x00000000
  123. <3>[ 4072.775381,0] TestBus(7) = 0xff83ffff
  124. <3>[ 4072.775511,0] ===== SDCC-DML: Register Dumps @phys_base=0xf9824800, @virt_base=0xe6a96800 =====
  125. <3>[ 4072.775588,0] Reg=0x00: 0x00000011, 0x00010000, 0x00000000, 0x00000000
  126. <3>[ 4072.775721,0] Reg=0x10: 0x00000000, 0x00001000, 0x00001000, 0x00020001
  127. <3>[ 4072.775796,0] Reg=0x20: 0x00000000, 0x00000200, 0x00000200, 0x00000000
  128. <3>[ 4072.775926,0] Reg=0x30: 0x00000000, 0x00000000, 0x00000000, 0x00000000
  129. <3>[ 4072.776055,0] mmc0: SPS mode: busy=1
  130. <3>[ 4072.776128,0] mmc0: xfer_size=512, data_xfered=0, xfer_remain=512
  131. <3>[ 4072.776202,0] mmc0: got_dataend=0, prog_enable=0, wait_for_auto_prog_done=0, got_auto_prog_done=0, req_tout_ms=10000
  132. <3>[ 4072.776337,0] mmc0: PM: sdcc_suspended=0, pending_resume=0, sdcc_suspending=0
  133. <3>[ 4072.776471,0] mmc0: RPM: runtime_status=0, usage_count=1, is_suspended=0, disable_depth=0, runtime_error=0, request_pending=0, request=0
  134. <3>[ 4072.779819,0] mmcblk0: error -110 transferring data, sector 2262045, nr 3, cmd response 0x900, card status 0x0
  135. <3>[ 4072.779964,0] end_request: I/O error, dev mmcblk0, sector 2262045
  136. <3>[ 4072.801094,0] mmc0: CMD18: Data timeout. DAT0 => 1
  137. <3>[ 4072.801168,0] mmc0: SDCC PWR is ON
  138. <3>[ 4072.801242,0] mmc0: SDCC clks are ON, MCLK rate=200000000
  139. <3>[ 4072.801371,0] mmc0: SDCC irq is enabled
  140. <3>[ 4072.801445,0] ===== SDCC-CORE: Register Dumps @phys_base=0xf9824000, @virt_base=0xe6a94000 =====
  141. <3>[ 4072.801579,0] Reg=0x00: 0x00000001, 0x01211f00, 0x00228418, 0x00001452
  142. <3>[ 4072.801655,0] Reg=0x10: 0x00000012, 0x00000900, 0x00000000, 0x00000000
  143. <3>[ 4072.801788,0] Reg=0x20: 0x00000000, 0x003d0900, 0x00001000, 0x0010200b
  144. <3>[ 4072.801921,0] Reg=0x30: 0x00000800, 0x000c0400, 0x00000000, 0x408001ff
  145. <3>[ 4072.801996,0] Reg=0x40: 0x00000000, 0x00000000, 0x00000000, 0x00000000
  146. <3>[ 4072.802127,0] Reg=0x50: 0x00000038, 0x00000000, 0x00000000, 0x00000000
  147. <3>[ 4072.802202,0] Reg=0x60: 0x07876400, 0x00000000, 0x00000044, 0x00000000
  148. <3>[ 4072.802333,0] mmc0: MCI_TEST_INPUT = 0x000003fe
  149. <3>[ 4072.802404,0] == SDCC Test Bus Debug ==
  150. <3>[ 4072.802533,0] TestBus(0) = 0x00008000
  151. <3>[ 4072.802669,0] TestBus(1) = 0x00000080
  152. <3>[ 4072.802741,0] TestBus(2) = 0x00007018
  153. <3>[ 4072.802870,0] TestBus(3) = 0x01c002ff
  154. <3>[ 4072.802941,0] TestBus(4) = 0x00463fd8
  155. <3>[ 4072.803012,0] TestBus(5) = 0x0004c038
  156. <3>[ 4072.803140,0] TestBus(6) = 0x00000000
  157. <3>[ 4072.803211,0] TestBus(7) = 0xff83ffff
  158. <3>[ 4072.803284,0] ===== SDCC-DML: Register Dumps @phys_base=0xf9824800, @virt_base=0xe6a96800 =====
  159. <3>[ 4072.803417,0] Reg=0x00: 0x00000011, 0x00010000, 0x00000000, 0x00000000
  160. <3>[ 4072.803551,0] Reg=0x10: 0x00000000, 0x00001000, 0x00001000, 0x00020001
  161. <3>[ 4072.803626,0] Reg=0x20: 0x00000000, 0x00000200, 0x00001000, 0x00000000
  162. <3>[ 4072.803758,0] Reg=0x30: 0x00000000, 0x00000000, 0x00000000, 0x00000000
  163. <3>[ 4072.803831,0] mmc0: SPS mode: busy=1
  164. <3>[ 4072.803961,0] mmc0: xfer_size=4096, data_xfered=0, xfer_remain=4096
  165. <3>[ 4072.804035,0] mmc0: got_dataend=0, prog_enable=0, wait_for_auto_prog_done=0, got_auto_prog_done=0, req_tout_ms=10000
  166. <3>[ 4072.804169,0] mmc0: PM: sdcc_suspended=0, pending_resume=0, sdcc_suspending=0
  167. <3>[ 4072.804302,0] mmc0: RPM: runtime_status=0, usage_count=1, is_suspended=0, disable_depth=0, runtime_error=0, request_pending=0, request=0
  168. <3>[ 4072.807685,0] mmcblk0: error -110 transferring data, sector 2262040, nr 8, cmd response 0x900, card status 0x200b00
  169. <4>[ 4072.807826,0] mmcblk0: retrying using single block read
  170. <3>[ 4072.828749,0] mmc0: CMD17: Data timeout. DAT0 => 1
  171. <3>[ 4072.828881,0] mmc0: SDCC PWR is ON
  172. <3>[ 4072.828952,0] mmc0: SDCC clks are ON, MCLK rate=200000000
  173. <3>[ 4072.829022,0] mmc0: SDCC irq is enabled
  174. <3>[ 4072.829153,0] ===== SDCC-CORE: Register Dumps @phys_base=0xf9824000, @virt_base=0xe6a94000 =====
  175. <3>[ 4072.829286,0] Reg=0x00: 0x00000001, 0x01211f00, 0x0022841c, 0x00001451
  176. <3>[ 4072.829362,0] Reg=0x10: 0x00000011, 0x00000900, 0x00000000, 0x00000000
  177. <3>[ 4072.829496,0] Reg=0x20: 0x00000000, 0x003d0900, 0x00000200, 0x0010200b
  178. <3>[ 4072.829572,0] Reg=0x30: 0x00000200, 0x000c0400, 0x00000000, 0x408001ff
  179. <3>[ 4072.829703,0] Reg=0x40: 0x00000000, 0x00000000, 0x00000000, 0x00000000
  180. <3>[ 4072.829779,0] Reg=0x50: 0x00000038, 0x00000000, 0x00000000, 0x00000000
  181. <3>[ 4072.829914,0] Reg=0x60: 0x07876400, 0x00000000, 0x00000044, 0x00000000
  182. <3>[ 4072.830043,0] mmc0: MCI_TEST_INPUT = 0x000003fe
  183. <3>[ 4072.830113,0] == SDCC Test Bus Debug ==
  184. <3>[ 4072.830184,0] TestBus(0) = 0x00008000
  185. <3>[ 4072.830378,0] TestBus(1) = 0x00000080
  186. <3>[ 4072.830450,0] TestBus(2) = 0x00007018
  187. <3>[ 4072.830521,0] TestBus(3) = 0x01c002ff
  188. <3>[ 4072.830651,0] TestBus(4) = 0x00463fd8
  189. <3>[ 4072.830722,0] TestBus(5) = 0x0004c038
  190. <3>[ 4072.830794,0] TestBus(6) = 0x00000000
  191. <3>[ 4072.830926,0] TestBus(7) = 0xff83ffff
  192. <3>[ 4072.830998,0] ===== SDCC-DML: Register Dumps @phys_base=0xf9824800, @virt_base=0xe6a96800 =====
  193. <3>[ 4072.831131,0] Reg=0x00: 0x00000011, 0x00010000, 0x00000000, 0x00000000
  194. <3>[ 4072.831205,0] Reg=0x10: 0x00000000, 0x00001000, 0x00001000, 0x00020001
  195. <3>[ 4072.831337,0] Reg=0x20: 0x00000000, 0x00000200, 0x00000200, 0x00000000
  196. <3>[ 4072.831412,0] Reg=0x30: 0x00000000, 0x00000000, 0x00000000, 0x00000000
  197. <3>[ 4072.831542,0] mmc0: SPS mode: busy=1
  198. <3>[ 4072.831615,0] mmc0: xfer_size=512, data_xfered=0, xfer_remain=512
  199. <3>[ 4072.831747,0] mmc0: got_dataend=0, prog_enable=0, wait_for_auto_prog_done=0, got_auto_prog_done=0, req_tout_ms=10000
  200. <3>[ 4072.831881,0] mmc0: PM: sdcc_suspended=0, pending_resume=0, sdcc_suspending=0
  201. <3>[ 4072.831956,0] mmc0: RPM: runtime_status=0, usage_count=1, is_suspended=0, disable_depth=0, runtime_error=0, request_pending=0, request=0
  202. <3>[ 4072.835258,0] mmcblk0: error -110 transferring data, sector 2262044, nr 4, cmd response 0x900, card status 0x0
  203. <3>[ 4072.905965,0] mmc0: CMD17: Data timeout. DAT0 => 1
  204. <3>[ 4072.906111,0] mmc0: SDCC PWR is ON
  205. <3>[ 4072.906186,0] mmc0: SDCC clks are ON, MCLK rate=200000000
  206. <3>[ 4072.906318,0] mmc0: SDCC irq is enabled
  207. <3>[ 4072.906396,0] ===== SDCC-CORE: Register Dumps @phys_base=0xf9824000, @virt_base=0xe6a94000 =====
  208. <3>[ 4072.906533,0] Reg=0x00: 0x00000001, 0x01211f00, 0x0022841c, 0x00001451
  209. <3>[ 4072.906609,0] Reg=0x10: 0x00000011, 0x00000900, 0x30384739, 0x32519747
  210. <3>[ 4072.906745,0] Reg=0x20: 0x09ce8008, 0x003d0900, 0x00000200, 0x0010200b
  211. <3>[ 4072.906822,0] Reg=0x30: 0x00000200, 0x000c0400, 0x00000000, 0x408001ff
  212. <3>[ 4072.906955,0] Reg=0x40: 0x00000000, 0x00000000, 0x00000000, 0x00000000
  213. <3>[ 4072.907123,0] Reg=0x50: 0x00000038, 0x00000000, 0x00000000, 0x00000000
  214. <3>[ 4072.907199,0] Reg=0x60: 0x07876400, 0x00000000, 0x00000044, 0x00000000
  215. <3>[ 4072.907330,0] mmc0: MCI_TEST_INPUT = 0x000003fe
  216. <3>[ 4072.907400,0] == SDCC Test Bus Debug ==
  217. <3>[ 4072.907471,0] TestBus(0) = 0x00008000
  218. <3>[ 4072.907664,0] TestBus(1) = 0x00000080
  219. <3>[ 4072.907736,0] TestBus(2) = 0x00007018
  220. <3>[ 4072.907807,0] TestBus(3) = 0x01c002ff
  221. <3>[ 4072.907937,0] TestBus(4) = 0x00463fd8
  222. <3>[ 4072.908008,0] TestBus(5) = 0x0004c038
  223. <3>[ 4072.908080,0] TestBus(6) = 0x00000000
  224. <3>[ 4072.908209,0] TestBus(7) = 0xff83ffff
  225. <3>[ 4072.908283,0] ===== SDCC-DML: Register Dumps @phys_base=0xf9824800, @virt_base=0xe6a96800 =====
  226. <3>[ 4072.908420,0] Reg=0x00: 0x00000011, 0x00010000, 0x00000000, 0x00000000
  227. <3>[ 4072.908494,0] Reg=0x10: 0x00000000, 0x00001000, 0x00001000, 0x00020001
  228. <3>[ 4072.908625,0] Reg=0x20: 0x00000000, 0x00000200, 0x00000200, 0x00000000
  229. <3>[ 4072.908757,0] Reg=0x30: 0x00000000, 0x00000000, 0x00000000, 0x00000000
  230. <3>[ 4072.908829,0] mmc0: SPS mode: busy=1
  231. <3>[ 4072.908901,0] mmc0: xfer_size=512, data_xfered=0, xfer_remain=512
  232. <3>[ 4072.909034,0] mmc0: got_dataend=0, prog_enable=0, wait_for_auto_prog_done=0, got_auto_prog_done=0, req_tout_ms=10000
  233. <3>[ 4072.909169,0] mmc0: PM: sdcc_suspended=0, pending_resume=0, sdcc_suspending=0
  234. <3>[ 4072.909303,0] mmc0: RPM: runtime_status=0, usage_count=1, is_suspended=0, disable_depth=0, runtime_error=0, request_pending=0, request=0
  235. <3>[ 4072.912914,0] mmcblk0: error -110 transferring data, sector 2262044, nr 4, cmd response 0x900, card status 0x0
  236. <3>[ 4072.913061,0] end_request: I/O error, dev mmcblk0, sector 2262044
  237. <3>[ 4072.933178,0] mmc0: CMD17: Data timeout. DAT0 => 1
  238. <3>[ 4072.933261,0] mmc0: SDCC PWR is ON
  239. <3>[ 4072.933393,0] mmc0: SDCC clks are ON, MCLK rate=200000000
  240. <3>[ 4072.933466,0] mmc0: SDCC irq is enabled
  241. <3>[ 4072.933597,0] ===== SDCC-CORE: Register Dumps @phys_base=0xf9824000, @virt_base=0xe6a94000 =====
  242. <3>[ 4072.933674,0] Reg=0x00: 0x00000001, 0x01211f00, 0x0022841d, 0x00001451
  243. <3>[ 4072.933807,0] Reg=0x10: 0x00000011, 0x00000900, 0x00000000, 0x00000000
  244. <3>[ 4072.933940,0] Reg=0x20: 0x00000000, 0x003d0900, 0x00000200, 0x0010200b
  245. <3>[ 4072.934014,0] Reg=0x30: 0x00000200, 0x000c0400, 0x00000000, 0x408001ff
  246. <3>[ 4072.934147,0] Reg=0x40: 0x00000000, 0x00000000, 0x00000000, 0x00000000
  247. <3>[ 4072.934221,0] Reg=0x50: 0x00000038, 0x00000000, 0x00000000, 0x00000000
  248. <3>[ 4072.934353,0] Reg=0x60: 0x07876400, 0x00000000, 0x00000044, 0x00000000
  249. <3>[ 4072.934426,0] mmc0: MCI_TEST_INPUT = 0x000003fe
  250. <3>[ 4072.934555,0] == SDCC Test Bus Debug ==
  251. <3>[ 4072.934628,0] TestBus(0) = 0x00008000
  252. <3>[ 4072.934764,0] TestBus(1) = 0x00000080
  253. <3>[ 4072.934894,0] TestBus(2) = 0x00007018
  254. <3>[ 4072.934964,0] TestBus(3) = 0x01c002ff
  255. <3>[ 4072.935037,0] TestBus(4) = 0x00463fd8
  256. <3>[ 4072.935166,0] TestBus(5) = 0x0004c038
  257. <3>[ 4072.935238,0] TestBus(6) = 0x00000000
  258. <3>[ 4072.935310,0] TestBus(7) = 0xff83ffff
  259. <3>[ 4072.935441,0] ===== SDCC-DML: Register Dumps @phys_base=0xf9824800, @virt_base=0xe6a96800 =====
  260. <3>[ 4072.935518,0] Reg=0x00: 0x00000011, 0x00010000, 0x00000000, 0x00000000
  261. <3>[ 4072.935593,0] Reg=0x10: 0x00000000, 0x00001000, 0x00001000, 0x00020001
  262. <3>[ 4072.935729,0] Reg=0x20: 0x00000000, 0x00000200, 0x00000200, 0x00000000
  263. <3>[ 4072.935804,0] Reg=0x30: 0x00000000, 0x00000000, 0x00000000, 0x00000000
  264. <3>[ 4072.935936,0] mmc0: SPS mode: busy=1
  265. <3>[ 4072.936010,0] mmc0: xfer_size=512, data_xfered=0, xfer_remain=512
  266. <3>[ 4072.936144,0] mmc0: got_dataend=0, prog_enable=0, wait_for_auto_prog_done=0, got_auto_prog_done=0, req_tout_ms=10000
  267. <3>[ 4072.936279,0] mmc0: PM: sdcc_suspended=0, pending_resume=0, sdcc_suspending=0
  268. <3>[ 4072.936355,0] mmc0: RPM: runtime_status=0, usage_count=1, is_suspended=0, disable_depth=0, runtime_error=0, request_pending=0, request=0
  269. <3>[ 4072.940360,0] mmcblk0: error -110 transferring data, sector 2262045, nr 3, cmd response 0x900, card status 0x0
  270. <3>[ 4072.940651,0] end_request: I/O error, dev mmcblk0, sector 2262045
RAW Paste Data
Ledger Nano X - The secure hardware wallet
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