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-- Company:
-- Engineer:
--
-- Create Date: 03/20/2018 10:30:04 AM
-- Design Name:
-- Module Name: topLevel - Behavioral
-- Project Name:
-- Target Devices:
-- Tool Versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating
-- any Xilinx leaf cells in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity topLevel is
    Port ( clk : in STD_LOGIC;
           rst : in STD_LOGIC;
           sw : in std_logic_vector(4 downto 0);
           hsync : out std_logic;
           vsync : out std_logic;
           R,G,B : out std_logic_vector(2 downto 0));
end topLevel;

architecture Behavioral of topLevel is
signal pixel_y,pixel_x : std_logic_vector (9 downto 0);
signal wallOn : STD_LOGIC;
signal wallRGB : std_logic_vector(2 downto 0);
signal x_left : std_logic_vector(9 downto 0);
signal x_right : std_logic_vector(9 downto 0);
signal y_bottom : std_logic_vector(9 downto 0);
signal y_top : std_logic_vector(9 downto 0);
signal p_tick: std_logic;
begin

sync : entity work.vga_sync port map(
    clk => clk,
    reset => rst,
    hsync => hsync,
    vsync => vsync,
    p_tick => p_tick,
    pixel_x=>pixel_x,
    pixel_y=>pixel_y
);

x_left <= "0000100000" when sw(1 downto 0) = "00" else "1001011101" when sw(1 downto 0) = "01"
else "0000000000";
x_right <= "0000100011" when sw(1 downto 0) = "00" else "1001100000" when sw(1 downto 0) = "01"
else "1001111111";

--buildDaWall : entity work.wallGen port map(
--    pixel_x=>pixel_x,
--    pixel_y=>pixel_y,
--    x_left=>x_left,
--    x_right=> x_right,
----    y_top => y_top,
----    y_bottom => y_bottom,
--    wallOn=>wallOn,
--    wallRGB=>wallRGB
--);

process(clk)
begin
    if(rising_edge(clk)) then
        if( p_tick= '1') then
            R <= "111";
            G<= "000";
            B<= "000";
        end if;
    end if;
end process;


end Behavioral;