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  1. #include <stdio.h>
  2. #include <string.h>
  3.  
  4. #define INSN_OPCODE(I) ((I) >> 12) //opcode
  5. #define INSN_11_9(I) (((I) >> 9) & 0x7)
  6. #define INSN_8_6(I) (((I) >> 6) & 0x7) //Rs
  7. #define INSN_5_3(I) (((I) >> 3) & 0x7) //subopcode
  8. #define INSN_2_0(I) ((I) & 0x7) //Rt
  9. #define INSN_5_0(I) ((I) & 0x3F) //IMM6
  10. #define INSN_8_0(I) ((I) & 0x1FF) //IMM9
  11. #define INSN_5(I) (((I) >> 5) & 0x1)
  12. #define INSN_8_7(I) (((I) >> 7) & 0x3)
  13. #define INSN_11(I) (((I) >> 11) & 0x1)
  14. #define INSN_5_4(I) (((I) >> 4) & 0x3)
  15. #define INSN_4_0(I) ((I) & 0x1F)
  16. #define INSN_3_0(I) ((I) & 0xF)
  17. #define INSN_7_0(I) ((I) & 0xFF) //IMM8
  18. #define INSN_6_0(I) ((I) & 0x7F) //IMM7
  19. #define INSN_10_0(I) ((I) & 0x7FF) //IMM11
  20. #define INSN_15(I) ((I) >> 15)
  21.  
  22. void Reset (MachineState *theMachineState) {
  23. int i;
  24. printf("RESET\n");
  25. theMachineState -> PC = 0x8200;
  26. theMachineState -> PSR = 0x8002;
  27.  
  28. for (i = 0; i < 8; i++) {
  29. theMachineState -> R[i] = 0;
  30. }
  31.  
  32. for (i = 0; i < 65536; i++) {
  33. theMachineState -> memory[i] = 0;
  34. }
  35.  
  36. }
  37.  
  38. void updateNZP(MachineState *theMachineState, signed short int value) {
  39. theMachineState -> PSR = theMachineState -> PSR & 0x8000;
  40.  
  41. if (value < 0) {
  42. theMachineState -> PSR += 4;
  43. printf("N is true\n");
  44. } else if (value == 0) {
  45. theMachineState -> PSR += 2;
  46. printf("Z is true\n");
  47. } else {
  48. theMachineState -> PSR += 1;
  49. printf("P is true\n");
  50. }
  51.  
  52. }
  53.  
  54. // Fill in control signals
  55. int FillInstruction (unsigned short int INSN, ControlSignals *theControls) {
  56. unsigned short int bit5;
  57. unsigned short int opcode;
  58. unsigned short int subOpcode;
  59. unsigned short int bits7and8;
  60. unsigned short int bit11;
  61. unsigned short int bits4and5;
  62. unsigned short int bit;
  63. unsigned short int shifted_INSN;
  64. int i;
  65.  
  66. shifted_INSN = INSN;
  67. for (i = 0; i < 16; i++) {
  68. bit = shifted_INSN & 0x1;
  69. if (bit != 0 && bit != 1) {
  70. printf("INSN input is invalid\n");
  71. return 1;
  72. }
  73. shifted_INSN = shifted_INSN >> 1;
  74. }
  75.  
  76. opcode = INSN_OPCODE(INSN);
  77. printf("Value of OPCODE is %d\n", opcode);
  78. switch (opcode) {
  79. case 0: //0000
  80. //Branch statements
  81. bit11 = INSN_11(INSN);
  82. theControls->PCMux_CTL = 0;
  83. theControls->regFile_WE = 0;
  84. theControls->NZP_WE = 0;
  85. theControls->DATA_WE = 0;
  86. theControls->rsMux_CTL = 0;
  87. theControls->rtMux_CTL = 0;
  88. theControls->rdMux_CTL = 0;
  89. theControls->regInputMux_CTL = 0;
  90. theControls->Arith_CTL = 0;
  91. theControls->ArithMux_CTL = 0;
  92. theControls->LOGIC_CTL = 0;
  93. theControls->LogicMux_CTL = 0;
  94. theControls->SHIFT_CTL = 0;
  95. theControls->CONST_CTL = 0;
  96. theControls->CMP_CTL = 0;
  97. theControls->ALUMux_CTL = 0;
  98. theControls->Privilege_CTL = 2;
  99. break;
  100. case 1:
  101. //arith statements
  102. theControls->PCMux_CTL = 1;
  103. theControls->rsMux_CTL = 0;
  104. theControls->rtMux_CTL = 0;
  105. theControls->rdMux_CTL = 0;
  106. theControls->regInputMux_CTL = 0;
  107. theControls->regFile_WE = 1;
  108. theControls->ALUMux_CTL = 0;
  109. theControls->NZP_WE = 1;
  110. theControls->DATA_WE = 0;
  111. bit5 = INSN_5(INSN);
  112. if (bit5) {
  113. theControls->ArithMux_CTL = 1;
  114. }
  115. else {
  116. theControls->ArithMux_CTL = 0;
  117. }
  118. subOpcode = INSN_5_3(INSN);
  119. switch (subOpcode) {
  120. case 0:
  121. //add
  122. theControls->Arith_CTL = 0;
  123. break;
  124. case 1:
  125. //mult
  126. theControls->Arith_CTL = 1;
  127. break;
  128. case 2:
  129. //sub
  130. theControls->Arith_CTL = 2;
  131. break;
  132. case 3:
  133. //div
  134. theControls->Arith_CTL = 3;
  135. break;
  136. default:
  137. //add IMM5
  138. theControls->Arith_CTL = 0;
  139. break;
  140. }
  141. theControls->LOGIC_CTL = 0;
  142. theControls->LogicMux_CTL = 0;
  143. theControls->SHIFT_CTL = 0;
  144. theControls->CONST_CTL = 0;
  145. theControls->CMP_CTL = 0;
  146. theControls->Privilege_CTL = 2;
  147. break;
  148. case 2:
  149. //Comp Statement
  150. theControls->DATA_WE = 0;
  151. theControls->NZP_WE = 1;
  152. theControls->ALUMux_CTL = 4;
  153. theControls->regInputMux_CTL = 0;
  154. theControls->regFile_WE = 0;
  155. theControls->rsMux_CTL = 2;
  156. theControls->PCMux_CTL = 1;
  157. theControls->rtMux_CTL = 0;
  158. bits7and8 = INSN_8_7(INSN);
  159. switch (bits7and8) {
  160. case 0:
  161. //cmp
  162. theControls->CMP_CTL = 0;
  163. break;
  164. case 1:
  165. //cmpu
  166. theControls->CMP_CTL = 1;
  167. break;
  168. case 2:
  169. //cmpi
  170. theControls->CMP_CTL = 2;
  171. break;
  172. case 3:
  173. theControls->CMP_CTL = 3;
  174. break;
  175. }
  176. theControls->rdMux_CTL = 0;
  177. theControls->Arith_CTL = 0;
  178. theControls->ArithMux_CTL = 0;
  179. theControls->LOGIC_CTL = 0;
  180. theControls->LogicMux_CTL = 0;
  181. theControls->SHIFT_CTL = 0;
  182. theControls->CONST_CTL = 0;
  183. theControls->Privilege_CTL = 2;
  184. break;
  185. case 4:
  186. //jsr Statement
  187. theControls->DATA_WE = 0;
  188. theControls->NZP_WE = 1;
  189. theControls->regInputMux_CTL = 2;
  190. theControls->regFile_WE = 1;
  191. theControls->rdMux_CTL = 1;
  192. theControls->rsMux_CTL = 0;
  193. bit11 = INSN_11(INSN);
  194. if (bit11) {
  195. //jsr
  196. theControls->PCMux_CTL = 5;
  197. }
  198. else {
  199. //jsrr
  200. theControls->PCMux_CTL = 3;
  201. }
  202. theControls->rtMux_CTL = 0;
  203. theControls->Arith_CTL = 0;
  204. theControls->ArithMux_CTL = 0;
  205. theControls->LOGIC_CTL = 0;
  206. theControls->LogicMux_CTL = 0;
  207. theControls->SHIFT_CTL = 0;
  208. theControls->CONST_CTL = 0;
  209. theControls->CMP_CTL = 0;
  210. theControls->ALUMux_CTL = 0;
  211. theControls->Privilege_CTL = 2;
  212. break;
  213. case 5:
  214. //Logic Statements
  215. theControls->DATA_WE = 0;
  216. theControls->NZP_WE = 1;
  217. theControls->ALUMux_CTL = 1;
  218. theControls->regInputMux_CTL = 0;
  219. theControls->regFile_WE = 1;
  220. theControls->rsMux_CTL = 0;
  221. theControls->PCMux_CTL = 1;
  222. theControls->rtMux_CTL = 0;
  223. theControls->rdMux_CTL = 0;
  224. bit5 = INSN_5(INSN);
  225. if (bit5) {
  226. theControls->LogicMux_CTL = 1;
  227. }
  228. else {
  229. theControls->LogicMux_CTL = 0;
  230. }
  231. subOpcode = INSN_5_3(INSN);
  232. switch (subOpcode) {
  233. case 0:
  234. //and
  235. theControls->LOGIC_CTL = 0;
  236. break;
  237. case 1:
  238. //not
  239. theControls->LOGIC_CTL = 1;
  240. break;
  241. case 2:
  242. //or
  243. theControls->LOGIC_CTL = 2;
  244. break;
  245. case 3:
  246. //xor
  247. theControls->LOGIC_CTL = 3;
  248. break;
  249. default:
  250. //and IMM
  251. theControls->LOGIC_CTL = 0;
  252. break;
  253. }
  254. theControls->Arith_CTL = 0;
  255. theControls->ArithMux_CTL = 0;
  256. theControls->SHIFT_CTL = 0;
  257. theControls->CONST_CTL = 0;
  258. theControls->CMP_CTL = 0;
  259. theControls->Privilege_CTL = 2;
  260. break;
  261. case 6:
  262. //ldr
  263. theControls->PCMux_CTL = 1;
  264. theControls->rsMux_CTL = 0;
  265. theControls->rdMux_CTL = 0;
  266. theControls->rtMux_CTL = 0;
  267. theControls->regFile_WE = 1;
  268. theControls->regInputMux_CTL = 1;
  269. theControls->Arith_CTL = 0;
  270. theControls->ArithMux_CTL = 2;
  271. theControls->ALUMux_CTL = 0;
  272. theControls->NZP_WE = 1;
  273. theControls->DATA_WE = 0;
  274. theControls->LOGIC_CTL = 0;
  275. theControls->LogicMux_CTL = 0;
  276. theControls->SHIFT_CTL = 0;
  277. theControls->CONST_CTL = 0;
  278. theControls->CMP_CTL = 0;
  279. theControls->Privilege_CTL = 2;
  280. break;
  281. case 7:
  282. //str
  283. theControls->PCMux_CTL = 1;
  284. theControls->rsMux_CTL = 0;
  285. theControls->rtMux_CTL = 1;
  286. theControls->regFile_WE = 0;
  287. theControls->Arith_CTL = 0;
  288. theControls->ArithMux_CTL = 2;
  289. theControls->ALUMux_CTL = 0;
  290. theControls->NZP_WE = 0;
  291. theControls->DATA_WE = 1;
  292. break;
  293. theControls->rdMux_CTL = 0;
  294. theControls->regInputMux_CTL = 0;
  295. theControls->LOGIC_CTL = 0;
  296. theControls->LogicMux_CTL = 0;
  297. theControls->SHIFT_CTL = 0;
  298. theControls->CONST_CTL = 0;
  299. theControls->CMP_CTL = 0;
  300. theControls->Privilege_CTL = 2;
  301. break;
  302. case 8:
  303. //rti
  304. theControls->PCMux_CTL = 3;
  305. theControls->rsMux_CTL = 1;
  306. theControls->regFile_WE = 0;
  307. theControls->NZP_WE = 0;
  308. theControls->DATA_WE = 0;
  309. theControls->Privilege_CTL = 0;
  310. theControls->rtMux_CTL = 0;
  311. theControls->rdMux_CTL = 0;
  312. theControls->regInputMux_CTL = 0;
  313. theControls->Arith_CTL = 0;
  314. theControls->ArithMux_CTL = 0;
  315. theControls->LOGIC_CTL = 0;
  316. theControls->LogicMux_CTL = 0;
  317. theControls->SHIFT_CTL = 0;
  318. theControls->CONST_CTL = 0;
  319. theControls->CMP_CTL = 0;
  320. theControls->ALUMux_CTL = 0;
  321. break;
  322. case 9:
  323. //const
  324. theControls->PCMux_CTL = 1;
  325. theControls->rdMux_CTL = 0;
  326. theControls->regFile_WE = 1;
  327. theControls->regInputMux_CTL = 0;
  328. theControls->CONST_CTL = 0;
  329. theControls->ALUMux_CTL = 3;
  330. theControls->NZP_WE = 1;
  331. theControls->DATA_WE = 0;
  332. theControls->rsMux_CTL = 0;
  333. theControls->rtMux_CTL = 0;
  334. theControls->Arith_CTL = 0;
  335. theControls->ArithMux_CTL = 0;
  336. theControls->LOGIC_CTL = 0;
  337. theControls->LogicMux_CTL = 0;
  338. theControls->SHIFT_CTL = 0;
  339. theControls->CMP_CTL = 0;
  340. theControls->Privilege_CTL = 2;
  341. break;
  342. case 10:
  343. //shift statements
  344. theControls->PCMux_CTL = 1;
  345. theControls->rsMux_CTL = 0;
  346. theControls->rdMux_CTL = 0;
  347. theControls->rtMux_CTL = 0;
  348. theControls->regFile_WE = 1;
  349. theControls->regInputMux_CTL = 0;
  350. theControls->ArithMux_CTL = 0;
  351. theControls->NZP_WE = 1;
  352. theControls->DATA_WE = 0;
  353. bits4and5 = INSN_5_4(INSN);
  354. //mod
  355. if (bits4and5 == 3) {
  356. theControls->Arith_CTL = 4;
  357. theControls->ALUMux_CTL = 0;
  358. }
  359. else {
  360. theControls->Arith_CTL = 0;
  361. theControls->ALUMux_CTL = 2;
  362. }
  363. switch (bits4and5) {
  364. case 0:
  365. //sll
  366. theControls->SHIFT_CTL = 0;
  367. break;
  368. case 1:
  369. //sra
  370. theControls->SHIFT_CTL = 1;
  371. break;
  372. case 2:
  373. //srl
  374. theControls->SHIFT_CTL = 2;;
  375. break;
  376. case 3:
  377. //mod
  378. theControls->SHIFT_CTL = 0;
  379. break;
  380. }
  381. theControls->LOGIC_CTL = 0;
  382. theControls->LogicMux_CTL = 0;
  383. theControls->CONST_CTL = 0;
  384. theControls->CMP_CTL = 0;
  385. theControls->Privilege_CTL = 2;
  386. break;
  387. case 12:
  388. //jmp statements
  389. theControls->rsMux_CTL = 0;
  390. theControls->regFile_WE = 0;
  391. theControls->NZP_WE = 0;
  392. theControls->DATA_WE = 0;
  393. bit11 = INSN_11(INSN);
  394. if (bit11 == 1) {
  395. //jmp
  396. theControls->PCMux_CTL = 2;
  397. }
  398. else {
  399. //jmpr
  400. theControls->PCMux_CTL = 3;
  401. }
  402. theControls->rtMux_CTL = 0;
  403. theControls->rdMux_CTL = 0;
  404. theControls->regInputMux_CTL = 0;
  405. theControls->Arith_CTL = 0;
  406. theControls->ArithMux_CTL = 0;
  407. theControls->LOGIC_CTL = 0;
  408. theControls->LogicMux_CTL = 0;
  409. theControls->SHIFT_CTL = 0;
  410. theControls->ALUMux_CTL = 0;
  411. theControls->CONST_CTL = 0;
  412. theControls->CMP_CTL = 0;
  413. theControls->Privilege_CTL = 2;
  414. break;
  415. case 13:
  416. //hiconst
  417. theControls->PCMux_CTL = 1;
  418. theControls->rsMux_CTL = 2;
  419. theControls->rdMux_CTL = 0;
  420. theControls->regFile_WE = 1;
  421. theControls->regInputMux_CTL = 0;
  422. theControls->CONST_CTL = 1;
  423. theControls->ALUMux_CTL = 3;
  424. theControls->NZP_WE = 1;
  425. theControls->DATA_WE = 0;
  426. theControls->rtMux_CTL = 0;
  427. theControls->Arith_CTL = 0;
  428. theControls->ArithMux_CTL = 0;
  429. theControls->LOGIC_CTL = 0;
  430. theControls->LogicMux_CTL = 0;
  431. theControls->SHIFT_CTL = 0;
  432. theControls->CMP_CTL = 0;
  433. theControls->Privilege_CTL = 2;
  434. break;
  435. case 15:
  436. //trap
  437. theControls->PCMux_CTL = 4;
  438. theControls->rdMux_CTL = 1;
  439. theControls->regFile_WE = 1;
  440. theControls->regInputMux_CTL = 2;
  441. theControls->NZP_WE = 1;
  442. theControls->DATA_WE = 0;
  443. theControls->Privilege_CTL = 1;
  444. theControls->rsMux_CTL = 0;
  445. theControls->rtMux_CTL = 0;
  446. theControls->Arith_CTL = 0;
  447. theControls->ArithMux_CTL = 0;
  448. theControls->LOGIC_CTL = 0;
  449. theControls->LogicMux_CTL = 0;
  450. theControls->SHIFT_CTL = 0;
  451. theControls->CONST_CTL = 0;
  452. theControls->CMP_CTL = 0;
  453. theControls->ALUMux_CTL = 0;
  454. break;
  455. case 16:
  456. //opcode invalid
  457. printf("Invalid INSN given, opcode is invalid.\n");
  458. return 1;
  459. }
  460. return 0;
  461. }
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