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IGORKO9

Beh decoder 2 to 4 for struct 3 to 8

Jan 17th, 2019
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VHDL 0.91 KB | None | 0 0
  1. --18.01.2019 Igor Kojic
  2.  
  3. library IEEE;
  4. use IEEE.STD_LOGIC_1164.ALL;
  5.  
  6. entity dec2to4 is
  7.   Port (
  8.     y: in std_logic_vector(1 downto 0);
  9.     x: out std_logic_vector(3 downto 0);
  10.     ei: in std_logic
  11.   );
  12. end dec2to4;
  13.  
  14. architecture Behavioral of dec2to4 is
  15.  
  16. begin
  17. decoder: process (y,ei) is
  18.     begin
  19.     if(ei = '1')then
  20.         if (y(1) = '0' and y(0) = '0') then
  21.             x(0) <= '1';
  22.         else
  23.             x(0) <= '0';
  24.         end if;
  25.         if (y(1) = '0' and y(0) = '1') then
  26.             x(1) <= '1';
  27.         else
  28.             x(1) <= '0';
  29.         end if;
  30.         if (y(1) = '1' and y(0) = '0') then
  31.             x(2) <= '1';
  32.         else
  33.             x(2) <= '0';
  34.         end if;
  35.         if (y(1) = '1' and y(0) = '1') then
  36.             x(3) <= '1';
  37.         else
  38.             x(3) <= '0';
  39.         end if;
  40.     else
  41.         x<= "0000";    
  42.     end if;
  43. end process;
  44. end Behavioral;
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