module test();
     logic [7:0] a;
     logic [2:0] amt;
     logic lr;
     logic [7:0] y;

 barrel_shift b0(.*);

 initial begin
         a = 8'b1101_0010; amt=3'b000; lr=0;
     #10 amt=3'b001;lr=1;
     #10 amt=3'b101;lr=1;
     #10 amt=3'b010;lr=1;
     #10 amt=3'b010;lr=0;
     #10 amt=3'b101;lr=0;
     #10 amt=3'b001;lr=0;
 end

 endmodule