1 to 8 Demultiplexer Testbench

module demux18a_tst();
  reg a;
  reg [2:0]s;
  wire [7:0]c;

  demux18a uut (.a(a),.s(s),.c(c));
  initial begin
          a = 1 ; s = 3'b000;
    #10   a = 1 ; s = 3'b001;
    #10   a = 1 ; s = 3'b010;
    #10   a = 1 ; s = 3'b011;
    #10   a = 1 ; s = 3'b100;
    #10   a = 1 ; s = 3'b101;
    #10   a = 1 ; s = 3'b110;
    #10   a = 1 ; s = 3'b111;
    #10   a = 0 ; s = 3'bxxx;
  end
endmodule