Advertisement
akatla

Simple LED flashing on FPGA/CPLD

May 15th, 2019
255
0
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
  1. `timescale 1ns / 1ps
  2. //////////////////////////////////////////////////////////////////////////////////
  3. // Company:          IS Enerprises
  4. // Engineer:         Letuchiy Sergey V.
  5. //
  6. // Create Date:    16:55:03 10/07/2018
  7. // Design Name:  Example of  simple counter
  8. // Module Name:    Simple counter module
  9. // Project Name:     Package of examples
  10. // Target Devices: SP-6 xc6slx9
  11. // Tool versions:  ISE - 14.7
  12. // Description:  Package of examples  for developer board SPARTAN-6
  13. //
  14. // Dependencies:
  15. //
  16. // Revision:         0000.0001.0001
  17. // Revision 0.01 - File Created
  18. // Additional Comments:
  19. //
  20. //////////////////////////////////////////////////////////////////////////////////
  21. module Counter_Ver1 #(parameter DIGITA = 24)
  22. (    
  23.     input     clk,   
  24.     output    CARRYA,
  25.      output    CARRYB,
  26.      output    CARRYC,
  27.      output    CARRYD
  28. );
  29.  
  30. // 25 wires.
  31. wire [DIGITA:0]add;
  32. // Register counter.
  33. reg  [DIGITA:0]RG = {(DIGITA){1'b0}};
  34.  
  35. assign add[DIGITA:0] = RG[DIGITA:0] + 1'b1;
  36. assign CARRYA = RG[DIGITA];
  37. assign CARRYB = !RG[DIGITA];
  38. assign CARRYC = RG[DIGITA];
  39. assign CARRYD = !RG[DIGITA];
  40.  
  41. // Ticker one second.
  42. always@(posedge clk) begin
  43.    
  44.             RG[DIGITA:0] <= add[DIGITA:0]; 
  45. end
  46.  
  47. endmodule
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement