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  1. ;**********************************************************
  2. ;*  Exercise - 3 ANALOG INPUT AND DIGITAL OUTPUT
  3. ;**********************************************************
  4. ; BEAU HOBBA 470213225
  5. ; BEC EGAN 470416594
  6. ;**********************************************************
  7.  
  8. ;30/08/2019 - Started working on this question
  9. ; ..... - Problem - Used wrong prescaler
  10. ; ..... - Adapted code for 10 mhz osci
  11. ; ..... - Used CCP2's instead of 1.
  12. ; ..... - Interrupt became an infinite loop
  13. ; ..... - Working :)
  14. ; 01/09/2019 - Change values for 4MHz clock
  15.  
  16.  
  17. ;**********************************************************
  18. ; Write assembly language code that uses the Compare function of CCP1 and/or CCP2
  19. ; together with the PIC?s interrupt system to implement suitable delays to generate a 0.300 Hz
  20. ; square wave on PORTB<3> and a synchronous 60.00 Hz square wave on PORTB<2>. Both
  21. ; square waves must have 50% duty cycle
  22.  
  23. ;**********************************************************
  24.  
  25.     ; NOTES:
  26.     ; Change low priority ISR to just ISR (compatibility mode)
  27.  
  28.     list p=18f452
  29.  
  30.     ; Include file, change directory if needed
  31.     include "p18f452.inc"
  32.     include "configReg.inc"
  33.  
  34.  
  35.     ; Reserve a byte for variables
  36.     UDATA_ACS
  37.     COUNTER res 1
  38.     WREG_TEMP   res 1
  39.  
  40.     ; Start at the reset address. There *must* be code at address
  41.     ; 0x000 since the PC is loaded with address 0 when the processor
  42.     ; comes out of reset. This declares a code section named 'RST'.
  43. RST code 0x0000
  44.  
  45.     goto Setup
  46.  
  47.     ; Enable the interrupt
  48.     code 0x0008     ;Compatability mode
  49.     goto lowPriorityISR ; Go to the interrupt
  50.  
  51.  
  52.     ; Start application beyond vector area.
  53.     ; This declares an 'unnamed' code section.
  54.     SRT code    0x0030
  55.  
  56. Setup:
  57.     ; Clear the 2,3 bits in port B
  58.     BCF     TRISB, 2
  59.     BCF     TRISB, 3
  60.  
  61.     ; Set the wave to 120 Hz as it will be toggled every half wave. This yields
  62.     ; a 60Hz wave overall using the following equation.
  63.     ; FOSC/4 / prescaler = x/preriod
  64.     MOVLW   b'00001000'
  65.     MOVWF   CCPR1H
  66.     MOVLW   b'00100011'
  67.     MOVWF   CCPR1L
  68.  
  69.     ;Set the timer bits - internal, 4 bits
  70.     MOVLW   B'10100001'
  71.     MOVWF   T1CON
  72.     ; bit 7 - enables one 16 bit operation
  73.     ; bit 5-4 (10)- prescaler of 4
  74.     ; bit 0 (1) - Enables the Timer
  75.  
  76.     MOVLW   b'00001011'
  77.     MOVWF   CCP1CON     ; Set to compare mode with special trigger
  78.  
  79.     MOVLW   D'200'
  80.     MOVWF   COUNTER, ACCESS ; Send 200 to Counter . 200 is 60hz/0.3.
  81.  
  82.     BSF     RCON,   IPEN    ; Clear all interrupts
  83.     BSF     PIE1,   CCP1IE  ; Set up the interrupts for the timers
  84.     BCF     PIR1,   CCP1IF  ; Clear the interrupt flag
  85.     BSF     INTCON, GIEH    ; Enable global interrupts
  86.     BSF     INTCON, GIEL
  87.  
  88. Main:
  89.     goto    Main
  90.  
  91.     ; Create subroutine that toggles the 0.3Hz wave and set the counter
  92. CounterSet:
  93.     BTG PORTB,  3           ;Toggle port 3 for the 0.3 wave
  94.     MOVLW   D'200'      ; Reset the counter
  95.     MOVWF   COUNTER, ACCESS
  96.     RETURN
  97.  
  98.     ; The interrupt service routine
  99. lowPriorityISR:
  100.  
  101.  
  102.     MOVWF   WREG_TEMP   ;Save registers in case we require their contents
  103.  
  104.     BTG PORTB,  2   ;Retoggle port 2 for the 60 hz wave
  105.     DCFSNZ  COUNTER ; Decrement the counter until it equals 0
  106.     CALL    CounterSet  ; If the counter is 0, reset the counter and toggle the 0.3Hz wave
  107.     BCF PIR1,   CCP1IF  ; Clear the interrupt
  108.  
  109.     MOVF    WREG_TEMP, W ; Obtain the saved registers
  110.  
  111.     RETFIE      ; Return from interrupt
  112.  
  113. end
  114.  
  115.  
  116.     ;LOGIC:
  117.     ; Set a wave of 120Hz. Wave is flipped to high. When a match occurs, it is driven high/low
  118.     ; And a new 0.3hz wave is started
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