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- library ieee;
- use ieee.std_logic_1164.all;
- use ieee.std_logic_unsigned.all;
- entity domaci2 is
- port(
- iSW : in std_logic_vector(7 downto 0);
- iNV : in std_logic;
- oLED : out std_logic_vector(7 downto 0);
- oSIGN : out std_logic;
- oGREAT : out std_logic
- );
- end entity;
- architecture Behavior of domaci2 is
- signal sA : std_logic_vector(3 downto 0);
- signal sB : std_logic_vector(3 downto 0);
- signal sSUMA : std_logic_vector(3 downto 0);
- begin
- process(iNV, iSW, sA, sB, sSUMA) begin
- if(iNV='1')then
- oLED <= not(iSW); -- stavljamo neginrane signale na izlaz
- else
- oLED(4) <= '1'; --ok ova lampa uvek svetli
- if(iSW(6)='1')then --znaci treba ga invertovati
- sA <= '1' & iSW(6) & not(iSW(5 downto 4)) + '1';
- else
- sA <= '0' & iSW(6 downto 4);
- end if;
- if(iSW(2)='1')then
- sB <= '1' & iSW(2) & not(iSW(1 downto 0)) + '1'; -- treba prva cifra da bude 1 da bi bio negativan broj
- else
- sB <= '0' & iSW(2 downto 0);
- end if;
- sSUMA <= sA + sB;
- oLED(3 downto 0) <= sSUMA; --saberimo ta dva broja
- if(sSUMA(3)='1')then --znaci da je negativan zbir
- oSIGN <= '1';
- else
- oSIGN <= '0';
- end if;
- if(iSW(6)='1' and iSW(2)='1')then
- if(sA > sB)then --jer veci broj je zapravo manje negativan jer npr 111=-1(k2) je veci od 101=-3(k2)
- oGREAT <= '1';
- else
- oGREAT <= '0';
- end if;
- elsif(iSW(6)='1' and iSW(2)='0')then
- oGREAT <= '0';
- elsif(iSW(6)='0' and iSW(2)='1')then
- oGREAT <= '1';
- else --elsif(iSW(6)='0' and iSW(2)='0')then
- if(sA > sB)then
- oGREAT <= '1';
- else
- oGREAT <= '0';
- end if;
- end if;
- if(iSW(0)='1')then
- oLED(7 downto 5) <= "000";
- elsif(iSW(1)='1')then
- oLED(7 downto 5) <= "001";
- elsif(iSW(2)='1')then
- oLED(7 downto 5) <= "010";
- elsif(iSW(3)='1')then
- oLED(7 downto 5) <= "011";
- elsif(iSW(4)='1')then
- oLED(7 downto 5) <= "100";
- elsif(iSW(5)='1')then
- oLED(7 downto 5) <= "101";
- elsif(iSW(6)='1')then
- oLED(7 downto 5) <= "110";
- elsif(iSW(7)='1')then
- oLED(7 downto 5) <= "111";
- else
- oLED(7 downto 5) <= "000";
- end if;
- end if;
- end process;
- end architecture;
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