IAR Debug Log Error 4

Wed Sep 20, 2017 14:28:08: IAR Embedded Workbench 8.10.1 (C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armproc.dll)
Wed Sep 20, 2017 14:28:08: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\config\debugger\TexasInstruments\CC26xx.dmac
Wed Sep 20, 2017 14:28:08: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\config\flashloader\TexasInstruments\FlashCC26xx.mac
Wed Sep 20, 2017 14:28:08: JLINK command: ProjectFile = Z:\Repos\IMU\IMUv3\BA_Sievers\sw\i2c_simpletest\settings\i2c_simpletest_Debug.jlink, return = 0
Wed Sep 20, 2017 14:28:08: Device "CC2650F128" selected.
Wed Sep 20, 2017 14:28:08: DLL version: V6.14b, compiled Mar 9 2017 08:46:04
Wed Sep 20, 2017 14:28:08: Firmware: J-Link V10 compiled May 22 2017 18:29:43
Wed Sep 20, 2017 14:28:08: JTAG speed is initially set to: 1000 kHz
Wed Sep 20, 2017 14:28:08: Performing HIB
Wed Sep 20, 2017 14:28:08: TotalIRLen = 10, IRPrint = 0x0011
Wed Sep 20, 2017 14:28:08: AP-IDR: 0x24770011, Type: AHB-AP
Wed Sep 20, 2017 14:28:08: AHB-AP ROM: 0xE00FF000 (Base addr. of first ROM table)
Wed Sep 20, 2017 14:28:08: Found Cortex-M3 r2p1, Little endian.
Wed Sep 20, 2017 14:28:08: FPUnit: 6 code (BP) slots and 2 literal slots
Wed Sep 20, 2017 14:28:08: CoreSight components:
Wed Sep 20, 2017 14:28:08: ROMTbl 0 @ E00FF000
Wed Sep 20, 2017 14:28:08: ROMTbl 0 [0]: FFF0F000, CID: B105E00D, PID: 000BB000 SCS
Wed Sep 20, 2017 14:28:08: ROMTbl 0 [1]: FFF02000, CID: B105E00D, PID: 003BB002 DWT
Wed Sep 20, 2017 14:28:08: ROMTbl 0 [2]: FFF03000, CID: B105E00D, PID: 002BB003 FPB
Wed Sep 20, 2017 14:28:08: ROMTbl 0 [3]: FFF01000, CID: B105E00D, PID: 003BB001 ITM
Wed Sep 20, 2017 14:28:08: ROMTbl 0 [4]: FFF41000, CID: B105900D, PID: 003BB923 TPIU-Lite
Wed Sep 20, 2017 14:28:09: Hardware reset with strategy 0 was performed
Wed Sep 20, 2017 14:28:09: Initial reset was performed
Wed Sep 20, 2017 14:28:09: Found 2 JTAG devices, Total IRLen = 10:
Wed Sep 20, 2017 14:28:09: #0 Id: 0x4BA00477, IRLen: 4, IRPrint: 0x1 CoreSight JTAG-DP
Wed Sep 20, 2017 14:28:09: #1 Id: 0x8B99A02F, IRLen: 6, IRPrint: 0x1 TI ICEPick
Wed Sep 20, 2017 14:28:09: 1056 bytes downloaded (10.97 Kbytes/sec)
Wed Sep 20, 2017 14:28:09: Loaded debugee: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\config\flashloader\TexasInstruments\FlashCC26xxRAM20.out
Wed Sep 20, 2017 14:28:09: Target reset
Wed Sep 20, 2017 14:28:10: Unloaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\config\flashloader\TexasInstruments\FlashCC26xx.mac
Wed Sep 20, 2017 14:28:10: Downloaded Z:\Repos\IMU\IMUv3\BA_Sievers\sw\i2c_simpletest\Debug\Exe\i2c_simpletest.out to flash memory.
Wed Sep 20, 2017 14:28:10: Hardware reset with strategy 0 was performed
Wed Sep 20, 2017 14:28:10: 17055 bytes downloaded into FLASH (13.35 Kbytes/sec)
Wed Sep 20, 2017 14:28:10: Loaded debugee: Z:\Repos\IMU\IMUv3\BA_Sievers\sw\i2c_simpletest\Debug\Exe\i2c_simpletest.out
Wed Sep 20, 2017 14:28:18: Warning: CPU could not be halted
Wed Sep 20, 2017 14:28:25: Fatal error: Communication timed out: Requested 8 bytes, received 0 bytes ! Bad JTAG communication: Write to IR: Expected 0x1, got 0x0 (TAP Command : 10) @ Off 0x5. Session aborted!
Wed Sep 20, 2017 14:28:25: Target reset
Wed Sep 20, 2017 14:28:25: Failed to load debugee: Z:\Repos\IMU\IMUv3\BA_Sievers\sw\i2c_simpletest\Debug\Exe\i2c_simpletest.out
Wed Sep 20, 2017 14:28:25: Warning: CPU could not be halted
Wed Sep 20, 2017 14:28:26: IAR Embedded Workbench 8.10.1 (C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armproc.dll)