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RGB_NodeRed

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  1. /*
  2.  * rgbMainNodeRed.c
  3.  *
  4.  *  Created on: Feb 10, 2019
  5.  *      Author: rezwan
  6.  */
  7.  
  8. #include<avr/io.h>
  9. #include<util/delay.h>
  10. #include <stdio.h>
  11. //#include <avr/iom328p.h>
  12. #define F_CPU 16000000UL
  13.  
  14. #define RedChnl OCR1A
  15. #define GreenChnl OCR1B
  16. #define BlueChnl OCR0A
  17.  
  18. #define FOSC 16000000 /**< Clock speed for UBRR calculation. refer page 179 of 328p datasheet. */
  19. #define BAUD 9600 /**< Baud Rate in bps. refer page 179 of 328p datasheet. */
  20. #define MYUBRR FOSC/16/BAUD-1 /**< UBRR = (F_CPU/(16*Baud))-1 for asynch USART page 179 328p datasheet. Baud rate 9600bps, assuming 16MHz clock UBRR0 becomes 0x0067*/
  21.  
  22. /**
  23.  * @brief Initialize USART for 8 bit data transmit no parity and 1 stop bit.
  24.  *
  25.  *@details This is a code snippet from datasheet page 182
  26.  *
  27.  * @param ubrr The UBRR value calculated in macro MYUBRR
  28.  * @see MYUBRR
  29.  */
  30. void USART_init(unsigned int ubrr)
  31. {
  32.  
  33.     UCSR0C = (0<<USBS0)|(3<<UCSZ00); /// Step 1. Set UCSR0C in Asynchronous mode, no parity, 1 stop bit, 8 data bits
  34.     UCSR0A = 0b00000000;/// Step 2. Set UCSR0A in Normal speed, disable multi-proc
  35.  
  36.     UBRR0H = (unsigned char)(ubrr>>8);/// Step 3. Load ubrr into UBRR0H and UBRR0L
  37.     UBRR0L = (unsigned char)ubrr;
  38.  
  39.  
  40.     UCSR0B = 0b00011000;/// Step 4. Enable Tx Rx and disable interrupt in UCSR0B
  41. }
  42.  
  43. /**
  44.  * @brief Send 8bit data.
  45.  *
  46.  *@details This is a code snippet from datasheet page 184
  47.  *
  48.  * @param data The 8 bit data to be sent
  49.  */
  50.  
  51. int USART_send(char c, FILE *stream)
  52. {
  53.  
  54.     while ( !( UCSR0A & (1<<UDRE0)) )/// Step 1.  Wait until UDRE0 flag is high. Busy Waitinig
  55.     {;}
  56.  
  57.     UDR0 = c; /// Step 2. Write char to UDR0 for transmission
  58. }
  59.  
  60. /**
  61.  * @brief Receive 8bit sata.
  62.  *
  63.  *@details This is a code snippet from datasheet page 187
  64.  *
  65.  * @return Returns received data from UDR0
  66.  */
  67. int USART_receive(FILE *stream )
  68. {
  69.  
  70.     while ( !(UCSR0A & (1<<RXC0)) )/// Step 1. Wait for Receive Complete Flag is high. Busy waiting
  71.         ;
  72.  
  73.     return UDR0;/// Step 2. Get and return received data from buffer
  74. }
  75. void init_TMR0(){
  76.     OCR0A =255; // 100% duty cycle thats means it's OFF
  77.  
  78.     TCCR0A |= (1<<COM0A1)|(1<<WGM01)|(1<<WGM00); //fast pwm
  79.     TCCR0B |= (1<<CS00); //prescalar 1:1
  80.     DDRD |= (1<<PD6); //OC0A
  81. }
  82. void init_TMR1(){
  83.             OCR1B = 255;
  84.             OCR1A = 255;
  85.             TCCR1B|=(1<<WGM12);
  86.             TCCR1A|=(1<<COM1A1)|(0<<COM1A0)|(1<<COM1B1)|(0<<COM1B0)|(1<<WGM10);
  87.  
  88.  
  89.             //COM1A1:COM1A0 =10 COM1B1:COM1B0 =10 and for Clear OC1A/OC1B on Compare Match, set OC1A/OC1B at TOP
  90.             //For more information 2313 datasheet table 44 pg 104
  91.             // PWM_Frequency= F_osc / (PreScaler*(1+TOP))= 16MHz / (1*(1023+1))=  15625 = 15.63 KHz
  92.             // Resolution= log(TOP+1)/log(2)= 10 bit
  93.  
  94.             TCCR1B|=(0<<CS12)|(0<<CS11)|(1<<CS10);//CS12->10 = 001 is for 1:1 timer pre-scaler. Start timer
  95.             DDRB|=(1<<PB2)|(1<<PB1);//OC1A and OC1B as output
  96.  
  97. }
  98. int main(void)
  99. {
  100.         init_TMR0();
  101.         init_TMR1();
  102.         USART_init(MYUBRR);
  103.         stdout = fdevopen(USART_send, NULL);
  104.         stdin = fdevopen(NULL, USART_receive);
  105.         RedChnl = 255;  //OCR1B
  106.         GreenChnl= 255; //OCR1B
  107.         BlueChnl = 255; //OCR0B5
  108.         while(1)
  109.         {
  110.  
  111.  
  112.             scanf("%d %d %d",&RedChnl, &GreenChnl, &BlueChnl);
  113.             printf("{ \"Red\": %d} {\"Green\": %d} {\"Blue\": %d}", RedChnl, GreenChnl, BlueChnl); //JOSN object
  114.  
  115.  
  116.         }
  117. }
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