commit aaf1e755f8f9c6a4b6cf8514352164940db78cbd
Author: Takeshi Saito <takeshi.saito.xv@renesas.com>
Date:   Tue Jan 29 06:40:39 2019 +0100

    mmc: renesas_sdhi: Fix card initialization failure in high speed mode

    commit d30ae056adb81e1d2b8b953efa74735a020b8e3b upstream.

    This fixes card initialization failure in high speed mode.

    If U-Boot uses SDR or HS200/400 mode before starting Linux and Linux
    DT does not enable SDR/HS200/HS400 mode, card initialization fails in
    high speed mode.

    It is necessary to initialize SCC registers during card initialization
    phase. HW reset function is registered only for a port with either of
    SDR/HS200/HS400 properties in device tree. If SDR/HS200/HS400 properties
    are not present in device tree, SCC registers will not be reset. In SoC
    that support SCC registers, HW reset function should be registered
    regardless of the configuration of device tree.

    Reproduction procedure:
    - Use U-Boot that support MMC HS200/400 mode.
    - Delete HS200/HS400 properties in device tree.
      (Delete mmc-hs200-1_8v and mmc-hs400-1_8v)
    - MMC port works high speed mode and all commands fail.

    Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
    Cc: Simon Horman <horms+renesas@verge.net.au>
    Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
    Cc: stable@vger.kernel.org
    Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

commit 351062f08fc1b57f33f29ceeee7dc67a9e39b5c4
Author: BOUGH CHEN <haibo.chen@nxp.com>
Date:   Thu Dec 27 11:20:24 2018 +0000

    mmc: sdhci-esdhc-imx: fix HS400 timing issue

    commit de0a0decf2edfc5b0c782915f4120cf990a9bd13 upstream.

    Now tuning reset will be done when the timing is MMC_TIMING_LEGACY/
    MMC_TIMING_MMC_HS/MMC_TIMING_SD_HS. But for timing MMC_TIMING_MMC_HS,
    we can not do tuning reset, otherwise HS400 timing is not right.

    Here is the process of init HS400, first finish tuning in HS200 mode,
    then switch to HS mode and 8 bit DDR mode, finally switch to HS400
    mode. If we do tuning reset in HS mode, this will cause HS400 mode
    lost the tuning setting, which will cause CRC error.

    Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
    Cc: stable@vger.kernel.org # v4.12+
    Acked-by: Adrian Hunter <adrian.hunter@intel.com>
    Fixes: d9370424c948 ("mmc: sdhci-esdhc-imx: reset tuning circuit when power on mmc card")
    Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>