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- /*
- * File: main.c
- * Author: user
- *
- * Created on 13 ??????? 2019 ?., 10:10
- */
- // PIC18F4525 Configuration Bit Settings
- // 'C' source line config statements
- // PIC18F4525 Configuration Bit Settings
- // 'C' source line config statements
- // PIC18F4525 Configuration Bit Settings
- // 'C' source line config statements
- // CONFIG1H
- #pragma config OSC = HSPLL // Oscillator Selection bits (HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1))
- #pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
- #pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
- // CONFIG2L
- #pragma config PWRT = OFF // Power-up Timer Enable bit (PWRT disabled)
- #pragma config BOREN = ON // Brown-out Reset Enable bits (Brown-out Reset enabled and controlled by software (SBOREN is enabled))
- #pragma config BORV = 3 // Brown Out Reset Voltage bits (Minimum setting)
- // CONFIG2H
- #pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
- #pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)
- // CONFIG3H
- #pragma config CCP2MX = PORTC // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
- #pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
- #pragma config LPT1OSC = OFF // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
- #pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)
- // CONFIG4L
- #pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
- #pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
- #pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
- // CONFIG5L
- #pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-003FFFh) not code-protected)
- #pragma config CP1 = OFF // Code Protection bit (Block 1 (004000-007FFFh) not code-protected)
- #pragma config CP2 = OFF // Code Protection bit (Block 2 (008000-00BFFFh) not code-protected)
- // CONFIG5H
- #pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
- #pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)
- // CONFIG6L
- #pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-003FFFh) not write-protected)
- #pragma config WRT1 = OFF // Write Protection bit (Block 1 (004000-007FFFh) not write-protected)
- #pragma config WRT2 = OFF // Write Protection bit (Block 2 (008000-00BFFFh) not write-protected)
- // CONFIG6H
- #pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
- #pragma config WRTB = OFF // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
- #pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
- // CONFIG7L
- #pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-003FFFh) not protected from table reads executed in other blocks)
- #pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (004000-007FFFh) not protected from table reads executed in other blocks)
- #pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks)
- // CONFIG7H
- #pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)
- // #pragma config statements should precede project file includes.
- // Use project enums instead of #define for ON and OFF.
- #define _XTAL_FREQ 40000000
- #include <xc.h>
- #include <stdio.h>
- #include <stdlib.h>
- unsigned char cnt;
- void check_delay(int time)
- {
- int i = 0;
- for(i = 0; i < time/20; i++)
- {
- __delay_ms(20);
- if(PORTBbits.RB0 == 0)
- {
- __delay_ms(10);
- while(PORTBbits.RB0 == 0);
- cnt++;
- __delay_ms(10);
- break;
- }
- }
- }
- unsigned char check_cnt()
- {
- if(PORTBbits.RB0 == 0)
- {
- if(PORTBbits.RB0 == 0)
- {
- __delay_ms(10);
- while(PORTBbits.RB0 == 0);
- cnt++;
- __delay_ms(10);
- }
- }
- return (cnt);
- }
- void sound_delay()
- {
- int i = 0;
- for(i = 0; i < 2000; i++)
- {
- if(check_cnt() == 3)
- break;
- LATCbits.LATC0 = 1;
- __delay_us(80);
- LATCbits.LATC0 = 0;
- __delay_us(80);
- }
- }
- int main()
- {
- TRISC0 = 0;
- TRISB0 = 1;
- TRISB3 = 0;
- int i = 0;
- cnt = 0;
- LATBbits.LATB3 = 0;
- while (1)
- {
- if(PORTBbits.RB0==0)
- {
- __delay_ms(10);
- while(PORTBbits.RB0==0);
- cnt++;
- __delay_ms(10);
- }
- switch (cnt)
- {
- case 1:
- LATBbits.LATB3 = 1;
- check_delay(200);
- LATBbits.LATB3 = 0;
- if(cnt == 1)
- {
- check_delay(200);
- }
- break;
- case 2:
- LATBbits.LATB3 = 1;
- sound_delay();
- LATBbits.LATB3 = 0;
- if(cnt == 2)
- {
- sound_delay();
- }
- break;
- case 3:
- cnt=0;
- break;
- default:
- cnt=0;
- break;
- }
- }
- return (EXIT_SUCCESS);
- }
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