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May 14th, 2018
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VHDL 0.63 KB | None | 0 0
  1. library ieee;
  2. use ieee.std_logic_1164.all;
  3. use ieee.numeric_std.all;
  4.  
  5.  
  6. package my_functions is
  7.     function my_xor(s1: std_logic; s2: std_logic) return std_logic;
  8.     procedure my_and_or(signal s1:in std_logic;signal s2:in std_logic;signal and_out, or_out: out std_logic);
  9. end my_functions;
  10.  
  11. package body my_functions is
  12.  
  13.     function my_xor(s1: std_logic;s2: std_logic) return std_logic is
  14.     begin
  15.         return (s1 xor s2);
  16.     end my_xor;
  17.    
  18.     procedure my_and_or(signal s1:in std_logic;signal s2:in std_logic;signal and_out, or_out: out std_logic) is
  19.     begin
  20.         or_out<=(s1 or s2);
  21.         and_out<=(s1 and s2);
  22.     end my_and_or;
  23.    
  24. end my_functions;
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