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  1. /*
  2.  * Copyright 2014 CompuLab Ltd.
  3.  *
  4.  * Author: Valentin Raevsky <valentin@compulab.co.il>
  5.  *
  6.  * The code contained herein is licensed under the GNU General Public
  7.  * License. You may obtain a copy of the GNU General Public License
  8.  * Version 2 or later at the following locations:
  9.  *
  10.  * http://www.opensource.org/licenses/gpl-license.html
  11.  * http://www.gnu.org/copyleft/gpl.html
  12.  */
  13.  
  14. #include <dt-bindings/gpio/gpio.h>
  15. #include <dt-bindings/input/input.h>
  16.  
  17. / {
  18.     backlight {
  19.         compatible = "pwm-backlight";
  20.         pwms = <&pwm3 0 5000000>;
  21.         brightness-levels = <0 4 8 16 32 64 128 255>;
  22.         default-brightness-level = <7>;
  23.     };
  24.  
  25.     i2cmux {
  26.         compatible = "i2c-mux-gpio";
  27.         #address-cells = <1>;
  28.         #size-cells = <0>;
  29.         mux-gpios = <&gpio1 2 0>;
  30.         i2c-parent = <&i2c1>;
  31.  
  32.         i2c@0 {
  33.             reg = <0>;
  34.             #address-cells = <1>;
  35.             #size-cells = <0>;
  36.  
  37.             pca9555:pca9555@26 {
  38.                   compatible = "nxp,pca9555";
  39.                   gpio-controller;
  40.                   #gpio-cells = <2>;
  41.                   reg = <0x26>;
  42.             };
  43.  
  44.             hx8526@4a {
  45.                   compatible = "himax,himax_ts";
  46.                   reg = <0x4a>;
  47.                   gpio_intr = <&gpio1 4 0>;
  48.             };
  49.  
  50.             eeprom@50 {
  51.                 compatible = "at24,24c02";
  52.                 reg = <0x50>;
  53.                 pagesize = <16>;
  54.             };
  55.  
  56.             adv5150: adv5150@5c {
  57.                 compatible = "ti,tvp5150";
  58.                 reg = <0x5c>;
  59.                 pinctrl-names = "default";
  60.                 pinctrl-0 = <&pinctrl_ipu1_3>;
  61.                 clocks = <&clks 201>;
  62.                 clock-names = "csi_mclk";
  63.                 csi_id = <0>;
  64.                 mclk = <27000000>;
  65.                 mclk_source = <0>;
  66.             };
  67.         };
  68.  
  69.         i2c@1 {
  70.             reg = <1>;
  71.             #address-cells = <1>;
  72.             #size-cells = <0>;
  73.  
  74.             dvi_edid: edid@50 {
  75.                 compatible = "fsl,imx6-dvi-i2c";
  76.                 reg = <0x50>;
  77.                 status = "disabled";
  78.             };
  79.         };
  80.  
  81.     };
  82.  
  83.     reg_mipi_dsi_pwr_on_mode: mipi_dsi_pwr_on_mode {
  84.         compatible = "regulator-fixed";
  85.         regulator-name = "mipi_dsi_pwr_on_mode";
  86.         gpio = <&pca9555 12 0>;
  87.         enable-active-high;
  88.     };
  89.  
  90.     mipi_dsi_reset: mipi-dsi-reset {
  91.         compatible = "gpio-reset";
  92.         reset-gpios = <&pca9555 11 GPIO_ACTIVE_LOW>;
  93.         reset-delay-us = <100>;
  94.         gpio-can-sleep;
  95.         #reset-cells = <0>;
  96.     };
  97.  
  98.     pcie_power_on_gpio: regulator-pcie-power-on-gpio {
  99.         compatible = "regulator-fixed";
  100.         regulator-name = "regulator-pcie-power-on-gpio";
  101.         gpio = <&pca9555 4 GPIO_ACTIVE_LOW>;
  102.         enable-active-low;
  103.     };
  104. };
  105.  
  106. &pcie {
  107.     vdd-supply = <&pcie_power_on_gpio>;
  108.     status = "okay";
  109. };
  110.  
  111. &i2c1 {
  112.     clock-frequency = <400000>;
  113.     status = "okay";
  114. };
  115.  
  116. &usdhc3 {
  117.     wp-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
  118.     cd-gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
  119.     status = "okay";
  120. };
  121.  
  122. &pwm3 {
  123.     pinctrl-names = "default";
  124.     pinctrl-0 = <&pinctrl_pwm3_1>;
  125.     status = "okay";
  126. };
  127.  
  128. &ldb {
  129.     status = "okay";
  130.  
  131.     lvds0: lvds-channel@0 {
  132.         crtc = "ipu2-di0";
  133.         fsl,data-mapping = "spwg";
  134.         fsl,data-width = <18>;
  135.         primary;
  136.         status = "okay";
  137.  
  138.         display-timings {
  139.             native-mode = <&timing0>;
  140.             timing0: hsd100pxn1 {
  141.                 clock-frequency = <65000000>;
  142.                 hactive = <1024>;
  143.                 vactive = <768>;
  144.                 hback-porch = <220>;
  145.                 hfront-porch = <40>;
  146.                 vback-porch = <21>;
  147.                 vfront-porch = <7>;
  148.                 hsync-len = <60>;
  149.                 vsync-len = <10>;
  150.             };
  151.         };
  152.     };
  153.  
  154.     lvds1: lvds-channel@1 {
  155.         crtc = "ipu2-di1";
  156.         fsl,data-mapping = "spwg";
  157.         fsl,data-width = <18>;
  158.         status = "okay";
  159.  
  160.         display-timings {
  161.             native-mode = <&timing1>;
  162.             timing1: hsd100pxn1 {
  163.                 clock-frequency = <65000000>;
  164.                 hactive = <1024>;
  165.                 vactive = <768>;
  166.                 hback-porch = <220>;
  167.                 hfront-porch = <40>;
  168.                 vback-porch = <21>;
  169.                 vfront-porch = <7>;
  170.                 hsync-len = <60>;
  171.                 vsync-len = <10>;
  172.             };
  173.         };
  174.     };
  175. };
  176.  
  177. &mxcfb1 {
  178.     mode_str ="KD050C-WVGA";
  179.     status = "okay";
  180. };
  181.  
  182. &mxcfb2 {
  183.     status = "okay";
  184. };
  185.  
  186. &mxcfb3 {
  187.     status = "okay";
  188. };
  189.  
  190. &mxcfb4 {
  191.     status = "okay";
  192. };
  193.  
  194. &can1 {
  195.     pinctrl-names = "default";
  196.     pinctrl-0 = <&pinctrl_flexcan1_1>;
  197.     status = "okay";
  198. };
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