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  1. From a350fcd817bdba8674c2d7ac488ccb230d3d69e2 Mon Sep 17 00:00:00 2001
  2. From: Marek Szyprowski <m.szyprowski@samsung.com>
  3. Date: Tue, 26 Jan 2016 09:45:13 +0100
  4. Subject: [PATCH] drm/exynos: mixer: add experimental support for 1024x600@43Hz
  5.  mode
  6.  
  7. This patch adds experimental configuration data for HDMI PHY for 32MHz
  8. pixel clock modes. This enables support for WaveShare 7inch HDMI LCD (C)
  9. HDMI panel.
  10.  
  11. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
  12. Change-Id: I840da27e5d496b4abf04e9fe2380f678cfd990ef
  13. ---
  14.  drivers/gpu/drm/exynos/exynos_hdmi.c  | 18 ++++++++++++++++++
  15.  drivers/gpu/drm/exynos/exynos_mixer.c |  3 ++-
  16.  2 files changed, 20 insertions(+), 1 deletion(-)
  17.  
  18. diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
  19. index adc69331dafe..e70838f621ff 100644
  20. --- a/drivers/gpu/drm/exynos/exynos_hdmi.c
  21. +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
  22. @@ -226,6 +226,15 @@ static const struct hdmiphy_config hdmiphy_v14_configs[] = {
  23.         },
  24.     },
  25.     {
  26. +       .pixel_clock = 32000000,
  27. +       .conf = {
  28. +           0x01, 0x51, 0x28, 0x55, 0x40, 0x01, 0x00, 0x08,
  29. +           0x82, 0x80, 0x0e, 0xd9, 0x45, 0xa0, 0xac, 0x80,
  30. +           0x08, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
  31. +           0x54, 0xc2, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
  32. +       },
  33. +   },
  34. +   {
  35.         .pixel_clock = 36000000,
  36.         .conf = {
  37.             0x01, 0x51, 0x2d, 0x55, 0x40, 0x01, 0x00, 0x08,
  38. @@ -391,6 +400,15 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = {
  39.         },
  40.     },
  41.     {
  42. +       .pixel_clock = 32000000,
  43. +       .conf = {
  44. +           0x01, 0x51, 0x28, 0x55, 0x40, 0x40, 0x00, 0xC8,
  45. +           0x02, 0xC8, 0x0E, 0xD9, 0x45, 0xA0, 0xAC, 0x80,
  46. +           0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66,
  47. +           0x54, 0xC1, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
  48. +       },
  49. +   },
  50. +   {
  51.         .pixel_clock = 36000000,
  52.         .conf = {
  53.             0x01, 0x51, 0x2D, 0x55, 0x40, 0x40, 0x00, 0xC8,
  54. diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
  55. index 1dd65e261385..17e0dafe5a20 100644
  56. --- a/drivers/gpu/drm/exynos/exynos_mixer.c
  57. +++ b/drivers/gpu/drm/exynos/exynos_mixer.c
  58. @@ -413,6 +413,7 @@ static void mixer_cfg_rgb_fmt(struct mixer_context *ctx, unsigned int height)
  59.     switch (height) {
  60.     case 480:
  61.     case 576:
  62. +   case 600:
  63.         val = MXR_CFG_RGB601_0_255;
  64.         break;
  65.     case 720:
  66. @@ -1126,7 +1127,7 @@ static int mixer_atomic_check(struct exynos_drm_crtc *crtc,
  67.         return 0;
  68.  
  69.     /* Check against some specific resolutions. */
  70. -   if ((w == 1024 && h == 768) ||
  71. +   if ((w == 1024 && (h == 768 || h == 600)) ||
  72.         (w == 1366 && h == 768) ||
  73.         (w == 1280 && h == 1024))
  74.         return 0;
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