blokB

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

entity blokB is
port
(
    B_in : in std_logic_vector(5 downto 0);
    B_out : out std_logic_vector(4 downto 0)
);
end entity;

architecture structB of blokB is
begin

process(B_in)
constant i : std_logic_vector(8 downto 0):= "101010101";
variable j : std_logic_vector(14 downto 0);
begin
j := std_logic_vector(unsigned(B_in) * unsigned(i)) ;
    if j(9)='1' then
B_out <= std_logic_vector(unsigned(j(14 downto 10)) + 1);
    else
B_out <= j(14 downto 10);
    end if;
end process;
end architecture;