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- library IEEE;
- use IEEE.STD_LOGIC_1164.ALL;
- entity KbdDec is
- Port ( KbdDO : in STD_LOGIC_VECTOR (7 downto 0);
- KbdE0 : in STD_LOGIC;
- KbdF0 : in STD_LOGIC;
- KbdRd : in STD_LOGIC;
- Clk : in STD_LOGIC;
- Key : out STD_LOGIC_VECTOR (3 downto 0);
- Wave : out STD_LOGIC_VECTOR(1 downto 0);
- KeyRD : out STD_LOGIC;
- WaveCurr: out STD_LOGIC_VECTOR(1 downto 0)
- );
- end KbdDec;
- architecture Behavioral of KbdDec is
- signal KeyTemp : STD_LOGIC_VECTOR (3 downto 0):="1111";
- signal WaveTemp : STD_LOGIC_VECTOR (1 downto 0):="00";
- begin
- process (Clk, KbdRd)
- begin
- if rising_edge(Clk) and KbdRd='1' then
- case KbdDO & KbdE0 & KbdF0 is
- when X"1A" & "00" => KeyTemp <= "0000"; -- Z
- when X"1B" & "00" => KeyTemp <= "0001"; -- S
- when X"22" & "00" => KeyTemp <= "0010"; -- X
- when X"23" & "00" => KeyTemp <= "0011"; -- D
- when X"21" & "00" => KeyTemp <= "0100"; -- C
- when X"2A" & "00" => KeyTemp <= "0101"; -- V
- when X"34" & "00" => KeyTemp <= "0110"; -- G
- when X"32" & "00" => KeyTemp <= "0111"; -- B
- when X"33" & "00" => KeyTemp <= "1000"; -- H
- when X"31" & "00" => KeyTemp <= "1001"; -- N
- when X"3B" & "00" => KeyTemp <= "1010"; -- J
- when X"3A" & "00" => KeyTemp <= "1011"; -- M
- when others => KeyTemp <= "1111";
- end case;
- end if;
- end process;
- Key <= KeyTemp;
- KeyRD <= '1' when KeyTemp /= "1111" else '0';
- process (Clk, KbdRd)
- begin
- if KeyTemp = "1111" then
- if rising_edge(Clk) and KbdRd='1' then
- case KbdDO is
- when X"16" => WaveTemp <= "00";
- when X"1E" => WaveTemp <= "01";
- when X"26" => WaveTemp <= "10";
- when others => NULL;
- end case;
- end if;
- end if;
- end process;
- Wave <= WaveTemp;
- WaveCurr <= WaveTemp;
- end Behavioral;
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