/*
 * File:   seguidor.c
 * Author: OrlandoCarvalho
 *
 * Created on 1 de Novembro de 2019, 20:26
 */

/*
 * File:   lightfallow.c
 * Author: OrlandoCarvalho
 *
 * Created on 1 de Novembro de 2019, 19:52
 */

// CONFIG1H
#pragma config OSC = IRCIO67    // Oscillator Selection bits (Internal oscillator block, port function on RA6 and RA7)
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRT = OFF       // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOREN = BOHW     // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 3         // Brown-out Reset Voltage bits (VBOR set to 2.1V)

// CONFIG2H
#pragma config WDT = OFF        // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config PBADEN = ON      // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)
#pragma config LPT1OSC = OFF    // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = OFF      // MCLR Pin Enable bit (RE3 input pin enabled; MCLR disabled)

// CONFIG4L
#pragma config STVREN = ON      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = OFF        // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config BBSIZ = 1024     // Boot Block Size Select bit (1K words (2K bytes) boot block)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF        // Code Protection bit (Block 0 (000800-001FFFh) not code-protected)
#pragma config CP1 = OFF        // Code Protection bit (Block 1 (002000-003FFFh) not code-protected)
#pragma config CP2 = OFF        // Code Protection bit (Block 2 (004000-005FFFh) not code-protected)
#pragma config CP3 = OFF        // Code Protection bit (Block 3 (006000-007FFFh) not code-protected)

// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection bit (Block 0 (000800-001FFFh) not write-protected)
#pragma config WRT1 = OFF       // Write Protection bit (Block 1 (002000-003FFFh) not write-protected)
#pragma config WRT2 = OFF       // Write Protection bit (Block 2 (004000-005FFFh) not write-protected)
#pragma config WRT3 = OFF       // Write Protection bit (Block 3 (006000-007FFFh) not write-protected)

// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF      // Table Read Protection bit (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF      // Table Read Protection bit (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) not protected from table reads executed in other blocks)


#include <xc.h>
#include <pic18f4580.h>

#define TRUE 1
#define _XTAL_FREQ 20000000 // frequencia 20mhz
#define ADC_RANGE 1024
#define BITS 8

float result;
char estado;
char n;

void main(void) {
    OSCCON = 0x73; // Internal Oscillator Frequency 8MHz
    ADCON1bits.PCFG = 0xF; //CONFIGURA TODAS AS SAIDAS COMO DIGITAIS
    TRISA = 0b00000010; // Set RA1/AN1 as input
    TRISB = 0b00000000;
    PORTB=0x00;
    LATB = 0x00;

    ADCON1bits.PCFG = 0b1101; // Set AN1 as analog
    ADCON1bits.VCFG = 0b00; // Set Vref+ as Vdd and Vref- as Vss
    ADCON0bits.CHS = 0b0001; // Set ADC input channel as AN1
    ADCON2bits.ADCS = 0b110; // Set TAD to 3.2us, > 2us.
    ADCON2bits.ACQT = 0b010; // Set acquisition time to 4xTAD=12.8us (0 to 50oC).
    ADCON2bits.ADFM = 1; // Get the result right formated.
    ADCON0bits.ADON = 1; // Turn the ADC ON.
    ADCON0bits.GO = 1;

    while(TRUE);
}

    /* ligar leds por cast
    while(TRUE)
    {
    __delay_us(100000); // A delay of 100ms will set a sampling
    // frequency of 10Hz.
    ADCON0bits.GO = 1;
    while(ADCON0bits.GO);
    result =  (ADRESH<<8)+ADRESL;
    char i;
    char estado = 0xFF;
    char n = (char) (result/(ADC_RANGE/(BITS + 1)));

    for(i=0; i<n; i++){
        estado = estado << 1;
    }
    LATB =~ estado;
    */

    /* Ligacao de led por niveis em ifs
    if(result <=10){
        PORTB=0b00000000;
    }
    if(result >10 && result <=128){
        PORTB = 0b00000001;
    }
    if(result >128 && result <=256){
        PORTB = 0b00000011;
    }
    if(result >256 && result <=384){
        PORTB = 0b00000111;
    }
    if(result >384 && result <=512){
        PORTB = 0b00001111;
    }
    if(result >512 && result <=640){
        PORTB = 0b00011111;
    }
    if(result >640 && result <=768){
        PORTB = 0b00111111;
    }
    if(result >768 && result <=896){
        PORTB = 0b01111111;
    }
    if(result >896 && result <=1024){
        PORTB = 0b11111111;
    }
    }
 // 1024 / 8 = 128
*/