module freq_div(clk_out,clk);
	output clk_out;
	input clk;
	wire[18:0] c;
    	T_FF tff01(c[0],1'b1,clk,1'b0);
		T_FF tff02(c[1],1'b1,c[0],1'b0);
		T_FF tff03(c[2],1'b1,c[1],1'b0);
		T_FF tff04(c[3],1'b1,c[2],1'b0);
		T_FF tff05(c[4],1'b1,c[3],1'b0);
		T_FF tff06(c[5],1'b1,c[4],1'b0);
		T_FF tff07(c[6],1'b1,c[5],1'b0);
		T_FF tff08(c[7],1'b1,c[6],1'b0);
		T_FF tff09(c[8],1'b1,c[7],1'b0);
		T_FF tff10(c[9],1'b1,c[8],1'b0);
		T_FF tff11(c[10],1'b1,c[9],1'b0);
		T_FF tff12(c[11],1'b1,c[10],1'b0);
		T_FF tff13(c[12],1'b1,c[11],1'b0);
		T_FF tff14(c[13],1'b1,c[12],1'b0);
		T_FF tff15(c[14],1'b1,c[13],1'b0);
		T_FF tff16(c[15],1'b1,c[14],1'b0);
		T_FF tff17(c[16],1'b1,c[15],1'b0);
		T_FF tff18(c[17],1'b1,c[16],1'b0);
		T_FF tff19(c[18],1'b1,c[17],1'b0);
		T_FF tff20(clk_out,1'b1,c[18],1'b0);
endmodule


module D_FF(q,d,clk,reset);
			output q;
			input d,clk,reset;
			reg q;
			always @(posedge reset or negedge clk)
			if (reset)
				q <= 1'b0;
			else
				q <= d;
endmodule

module T_FF(q,t,clk,reset);
			output q;
			input t,clk,reset;
			wire d;
			xor x1(d,q,t);
			D_FF d1(q,d,clk,reset);
endmodule
module project(LED1,LED2,LED3,LEDLION,LEDBIRD,LEDSNAKE,clk,reset,lion,bird,snake/*,
				s0,s1,s2,s3,s4,s5,s6,s7*/);
			input clk,reset,lion,bird,snake;
			output LED1,LED2,LED3,LEDLION,LEDBIRD,LEDSNAKE/*,s0,s1,s2,s3,s4,s5,s6,s7*/;


			freq_div freq(clknew,clk);
			wire w_xnor1,w_xnor2,w_andfinal;
			//tff1
			T_FF t1(LED1,w_andfinal,clknew,reset);

			//tff2
			wire not_w1;
			not not1(not_w1,LED1);
			T_FF t2(LED2,w_andfinal,not_w1,reset);

			//tff3
			wire not_w2;
			not not2(not_w2,LED2);
			T_FF t3(LED3,1'b1,not_w2,reset);



			xnor xnirww(w_xnor1, lion, LED1);
			xnor xnirwx(w_xnor2, bird, LED2);
			xnor xnirwy(w_xnor3, snake, LED3);

			and andxx(w_andfinal, w_xnor1, w_xnor2, w_xnor3);

			nand nandmore1(LEDLION,1'b1,lion);
			nand nandmore2(LEDBIRD,1'b1,bird);
			nand nandmore3(LEDSNAKE,1'b1,snake);

			//Stage
			wire wn001,wn002,wn003;
			not not001(wn001, LED1);
			not not002(wn002, LED2);
			not not003(wn003, LED3);
			/*
			and ands0(s0, LED1	, LED2	, LED3);
			and ands1(s1, wn001 , LED2 	, LED3);
			and ands2(s2, LED1	, wn002	, LED3);
			and ands3(s3, wn001 , wn002 , LED3);
			and ands4(s4, LED1	, LED2	, wn003);
			and ands5(s5, wn001 , LED2 	, wn003);
			and ands6(s6, LED1	, wn002	, wn003);
			and ands7(s7, wn001 , wn002 , wn003);
			*/
endmodule