library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.all;

entity BinToHex is
port(
bin: in std_logic_vector(3 downto 0);
Sseg: out std_logic_vector(6 downto 0));
end;

architecture casestatement of BinToHex is
begin
    process(bin)
    begin
    sseg<="1111111";
            case bin is
                when "0000"=>Sseg<="1000000";
                when "0001"=>Sseg<="1111001";
                when "0010"=>Sseg<="0100100";
                when "0011"=>Sseg<="0110000";
                when "0100"=>Sseg<="0011001";
                when "0101"=>Sseg<="0010010";
                when "0111"=>Sseg<="0000011";
                when "1000"=>Sseg<="0000000";
                when "1001"=>Sseg<="0011000";
                when "1010"=>Sseg<="0001110";
                when "1011"=>Sseg<="0000000";
                when "1100"=>Sseg<="1000110";
                when "1101"=>Sseg<="1000000";
                when "1110"=>Sseg<="0000110";
                when "1111"=>Sseg<="0001110";
                when others=>null;
            end case;
    end process;
end;