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  1. library IEEE;
  2. use IEEE.STD_LOGIC_1164.ALL;
  3. use IEEE.STD_LOGIC_UNSIGNED.ALL;
  4.  
  5. entity NUMARATOR is
  6. Port(rst: in STD_LOGIC;
  7. clk: in STD_LOGIC;
  8. q: out STD_LOGIC_VECTOR(3 DOWNTO 0));
  9. end NUMARATOR;
  10.  
  11. architecture NUMARATOR of NUMARATOR is
  12. begin
  13.      Process(clk,rst)
  14.      variable count: STD_LOGIC_VECTOR:="0000";
  15.      begin
  16.      if(rst='1') then
  17.      q<="0000";
  18.      elsif(rising_edge(clk)) then
  19.      if(count<"1001") then
  20.      count:=count+"1";
  21.      q<=count;
  22.      else
  23.      q<="0000";
  24.      end if;
  25.    end if;
  26.   end Process;
  27. end NUMARATOR;
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