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- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4864
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4864
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4608
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:516
- load:0x50415057,len:4194573
- 1162 mmu set 00010000, pos 00010000
- 1162 mmu set 00020000, pos 00020000
- 1162 mmu set 00030000, pos 00030000
- 1162 mmu set 00040000, pos 00040000
- 1162 mmu set 00050000, pos 00050000
- 1162 mmu set 00060000, pos 00060000
- 1162 mmu set 00070000, pos 00070000
- 1162 mmu set 00080000, pos 00080000
- 1162 mmu set 00090000, pos 00090000
- 1162 mmu set 000a0000, pos 000a0000
- 1162 mmu set 000b0000, pos 000b0000
- 1162 mmu set 000c0000, pos 000c0000
- 1162 mmu set 000d0000, pos 000d0000
- 1162 mmu set 000e0000, pos 000e0000
- 1162 mmu set 000f0000, pos 000f0000
- 1162 mmu set 00100000, pos 00100000
- 1162 mmu set 00110000, pos 00110000
- 1162 mmu set 00120000, pos 00120000
- 1162 mmu set 00130000, pos 00130000
- 1162 mmu set 00140000, pos 00140000
- 1162 mmu set 00150000, pos 00150000
- 1162 mmu set 00160000, pos 00160000
- 1162 mmu set 00170000, pos 00170000
- 1162 mmu set 00180000, pos 00180000
- 1162 mmu set 00190000, pos 00190000
- 1162 mmu set 001a0000, pos 001a0ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:512
- ho 0 tail 12 room 4
- load:0x00540b00,len:1346457687
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:516
- load:0x50415057,len:4194573
- 1162 mmu set 00010000, pos 00010000
- 1162 mmu set 00020000, pos 00020000
- 1162 mmu set 00030000, pos 00030000
- 1162 mmu set 00040000, pos 00040000
- 1162 mmu set 00050000, pos 00050000
- 1162 mmu set 00060000, pos 00060000
- 1162 mmu set 00070000, pos 00070000
- 1162 mmu set 00080000, pos 00080000
- 1162 mmu set 00090000, pos 00090000
- 1162 mmu set 000a0000, pos 000a0000
- 1162 mmu set 000b0000, pos 000b0000
- 1162 mmu set 000c0000, pos 000c0000
- 1162 mmu set 000d0000, pos 000d0000
- 1162 mmu set 000e0000, pos 000e0000
- 1162 mmu set 000f0000, pos 000f0000
- 1162 mmu set 00100000, pos 00100000
- 1162 mmu set 00110000, pos 00110000
- 1162 mmu set 00120000, pos 00120000
- 1162 mmu set 00130000, pos 00130000
- 1162 mmu set 00140000, pos 00140000
- 1162 mmu set 00150000, pos 00150000
- 1162 mmu set 00160000, pos 00160000
- 1162 mmu set 00170000, pos 00170000
- 1162 mmu set 00180000, pos 00180000
- 1162 mmu set 00190000, pos 00190000
- 1162 mmu set 001a0000, pos 001a0ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:512
- ho 0 tail 12 room 4
- load:0x00544b00,len:1346457687
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3fff001c,len:6948
- load:0x40078000,len:13772
- load:0x40080400,len:4532
- entry 0x400806a0
- I (63) boot: Chip Revision: 1
- I (33) boot: ESP-IDF v4.0.2-206-g5630b17e1 2nd stage bootloader
- I (33) boot: compile time 07:30:49
- I (36) boot: Enabling RNG early entropy source...
- I (39) qio_mode: Enabling default flash chip QIO
- E (44) qio_mode: Failed to set QIE bit, not enabling QIO mode
- I (50) boot: SPI Speed : 80MHz
- I (55) boot: SPI Mode : DIO
- I (59) boot: SPI Flash Size : 4MB
- E (63) flash_parts: partition 0 invalid magic number 0x102a
- E (69) boot: Failed to verify partition table
- E (74) boot: load partition table error!
- ets Jun 8 2016 00:22:57
- rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:512
- ho 0 tail 12 room 4
- load:0x00540b00,len:1346457687
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1f7f0004,len:516
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4612
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:516
- load:0x50415157,len:4194573
- 1162 mmu set 00010000, pos 00010000
- 1162 mmu set 00020000, pos 00020000
- 1162 mmu set 00030000, pos 00030000
- 1162 mmu set 00040000, pos 00040000
- 1162 mmu set 00050000, pos 00050000
- 1162 mmu set 00060000, pos 00060000
- 1162 mmu set 00070000, pos 00070000
- 1162 mmu set 00080000, pos 00080000
- 1162 mmu set 00090000, pos 00090000
- 1162 mmu set 000a0000, pos 000a0000
- 1162 mmu set 000b0000, pos 000b0000
- 1162 mmu set 000c0000, pos 000c0000
- 1162 mmu set 000d0000, pos 000d0000
- 1162 mmu set 000e0000, pos 000e0000
- 1162 mmu set 000f0000, pos 000f0000
- 1162 mmu set 00100000, pos 00100000
- 1162 mmu set 00110000, pos 00110000
- 1162 mmu set 00120000, pos 00120000
- 1162 mmu set 00130000, pos 00130000
- 1162 mmu set 00140000, pos 00140000
- 1162 mmu set 00150000, pos 00150000
- 1162 mmu set 00160000, pos 00160000
- 1162 mmu set 00170000, pos 00170000
- 1162 mmu set 00180000, pos 00180000
- 1162 mmu set 00190000, pos 00190000
- 1162 mmu set 001a0000, pos 001a0ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:6912
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:768
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4868
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:6912
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:512
- ho 0 tail 12 room 4
- load:0x00540b00,len:1346457687
- ets Jun 8 2016 00:22:57
- rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3fff001c,len:6948
- load:0x40078000,len:13772
- load:0x40080400,len:4532
- entry 0x400806a0
- I (63) boot: Chip Revision: 1
- I (33) boot: ESP-IDF v4.0.2-206-g5630b17e1 2nd stage bootloader
- I (33) boot: compile time 07:30:49
- I (36) boot: Enabling RNG early entropy source...
- I (39) qio_mode: Enabling default flash chip QIO
- E (44) qio_mode: Failed to set QIE bit, not enabling QIO mode
- I (50) boot: SPI Speed : 80MHz
- I (55) boot: SPI Mode : DIO
- I (59) boot: SPI Flash Size : 4MB
- E (63) flash_parts: partition 0 invalid magic number 0x502a
- E (69) boot: Failed to verify partition table
- E (74) boot: load partition table error!
- ets Jun 8 2016 00:22:57
- rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1f3f0004,len:516
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4864
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:548
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4608
- ets Jun 8 2016 00:22:57
- rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3fff001c,len:6948
- load:0x40078000,len:13772
- load:0x40080400,len:4532
- entry 0x400806a0
- I (63) boot: Chip Revision: 1
- I (33) boot: ESP-IDF v4.0.2-206-g5630b17e1 2nd stage bootloader
- I (33) boot: compile time 07:30:49
- I (36) boot: Enabling RNG early entropy source...
- I (39) qio_mode: Enabling default flash chip QIO
- E (44) qio_mode: Failed to set QIE bit, not enabling QIO mode
- I (50) boot: SPI Speed : 80MHz
- I (55) boot: SPI Mode : DIO
- I (59) boot: SPI Flash Size : 4MB
- E (63) flash_parts: partition 0 invalid magic number 0x102a
- E (69) boot: Failed to verify partition table
- E (74) boot: load partition table error!
- ets Jun 8 2016 00:22:57
- rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4864
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4608
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:516
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:516
- load:0x50415057,len:4194573
- 1162 mmu set 00010000, pos 00010000
- 1162 mmu set 00020000, pos 00020000
- 1162 mmu set 00030000, pos 00030000
- 1162 mmu set 00040000, pos 00040000
- 1162 mmu set 00050000, pos 00050000
- 1162 mmu set 00060000, pos 00060000
- 1162 mmu set 00070000, pos 00070000
- 1162 mmu set 00080000, pos 00080000
- 1162 mmu set 00090000, pos 00090000
- 1162 mmu set 000a0000, pos 000a0000
- 1162 mmu set 000b0000, pos 000b0000
- 1162 mmu set 000c0000, pos 000c0000
- 1162 mmu set 000d0000, pos 000d0000
- 1162 mmu set 000e0000, pos 000e0000
- 1162 mmu set 000f0000, pos 000f0000
- 1162 mmu set 00100000, pos 00100000
- 1162 mmu set 00110000, pos 00110000
- 1162 mmu set 00120000, pos 00120000
- 1162 mmu set 00130000, pos 00130000
- 1162 mmu set 00140000, pos 00140000
- 1162 mmu set 00150000, pos 00150000
- 1162 mmu set 00160000, pos 00160000
- 1162 mmu set 00170000, pos 00170000
- 1162 mmu set 00180000, pos 00180000
- 1162 mmu set 00190000, pos 00190000
- 1162 mmu set 001a0000, pos 001a0ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4612
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:768
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3fff001c,len:6948
- load:0x40078000,len:13772
- load:0x40080400,len:4532
- csum err:0xf6!=0xfe
- ets_main.c 371
- ets Jun 8 2016 00:22:57
- rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3fff001c,len:6948
- load:0x40078000,len:13772
- load:0x40080400,len:4532
- entry 0x400806a0
- I (63) boot: Chip Revision: 1
- I (33) boot: ESP-IDF v4.0.2-206-g5630b17e1 2nd stage bootloader
- I (33) boot: compile time 07:30:49
- I (36) boot: Enabling RNG early entropy source...
- I (39) qio_mode: Enabling default flash chip QIO
- E (44) qio_mode: Failed to set QIE bit, not enabling QIO mode
- I (50) boot: SPI Speed : 80MHz
- I (55) boot: SPI Mode : DIO
- I (59) boot: SPI Flash Size : 4MB
- E (63) flash_parts: partition 0 invalid magic number 0x102a
- E (69) boot: Failed to verify partition table
- E (74) boot: load partition table error!
- ets Jun 8 2016 00:22:57
- rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:516
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:2816
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:516
- load:0x50455157,len:4194573
- 1162 mmu set 00010000, pos 00010000
- 1162 mmu set 00020000, pos 00020000
- 1162 mmu set 00030000, pos 00030000
- 1162 mmu set 00040000, pos 00040000
- 1162 mmu set 00050000, pos 00050000
- 1162 mmu set 00060000, pos 00060000
- 1162 mmu set 00070000, pos 00070000
- 1162 mmu set 00080000, pos 00080000
- 1162 mmu set 00090000, pos 00090000
- 1162 mmu set 000a0000, pos 000a0000
- 1162 mmu set 000b0000, pos 000b0000
- 1162 mmu set 000c0000, pos 000c0000
- 1162 mmu set 000d0000, pos 000d0000
- 1162 mmu set 000e0000, pos 000e0000
- 1162 mmu set 000f0000, pos 000f0000
- 1162 mmu set 00100000, pos 00100000
- 1162 mmu set 00110000, pos 00110000
- 1162 mmu set 00120000, pos 00120000
- 1162 mmu set 00130000, pos 00130000
- 1162 mmu set 00140000, pos 00140000
- 1162 mmu set 00150000, pos 00150000
- 1162 mmu set 00160000, pos 00160000
- 1162 mmu set 00170000, pos 00170000
- 1162 mmu set 00180000, pos 00180000
- 1162 mmu set 00190000, pos 00190000
- 1162 mmu set 001a0000, pos 001a0ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3fff001c,len:6948
- load:0x40078000,len:13772
- load:0x40080400,len:4532
- entry 0x400806a0
- I (63) boot: Chip Revision: 1
- I (33) boot: ESP-IDF v4.0.2-206-g5630b17e1 2nd stage bootloader
- I (33) boot: compile time 07:30:49
- I (33) boot: Enabling RNG early entropy source...
- I (39) qio_mode: Enabling default flash chip QIO
- E (44) qio_mode: Failed to set QIE bit, not enabling QIO mode
- I (50) boot: SPI Speed : 80MHz
- I (55) boot: SPI Mode : DIO
- I (59) boot: SPI Flash Size : 4MB
- E (63) flash_parts: partition 0 invalid magic number 0x502a
- E (69) boot: Failed to verify partition table
- E (74) boot: load partition table error!
- ets Jun 8 2016 00:22:57
- rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4612
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:2816
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:768
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4612
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:512
- ho 0 tail 12 room 4
- load:0x00540b00,len:1346457687
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:2816
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f001c,len:512
- ets Jun 8 2016 00:22:57
- rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3fff001c,len:6948
- load:0x40078000,len:13772
- load:0x40080400,len:4532
- entry 0x400806a0
- I (63) boot: Chip Revision: 1
- I (33) boot: ESP-IDF v4.0.2-206-g5630b17e1 2nd stage bootloader
- I (33) boot: compile time 07:30:49
- I (33) boot: Enabling RNG early entropy source...
- I (39) qio_mode: Enabling default flash chip QIO
- E (44) qio_mode: Failed to set QIE bit, not enabling QIO mode
- I (50) boot: SPI Speed : 80MHz
- I (55) boot: SPI Mode : DIO
- I (59) boot: SPI Flash Size : 4MB
- E (63) flash_parts: partition 0 invalid magic number 0x102a
- E (69) boot: Failed to verify partition table
- E (74) boot: load partition table error!
- ets Jun 8 2016 00:22:57
- rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:6912
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:516
- load:0x50415057,len:4194573
- 1162 mmu set 00010000, pos 00010000
- 1162 mmu set 00020000, pos 00020000
- 1162 mmu set 00030000, pos 00030000
- 1162 mmu set 00040000, pos 00040000
- 1162 mmu set 00050000, pos 00050000
- 1162 mmu set 00060000, pos 00060000
- 1162 mmu set 00070000, pos 00070000
- 1162 mmu set 00080000, pos 00080000
- 1162 mmu set 00090000, pos 00090000
- 1162 mmu set 000a0000, pos 000a0000
- 1162 mmu set 000b0000, pos 000b0000
- 1162 mmu set 000c0000, pos 000c0000
- 1162 mmu set 000d0000, pos 000d0000
- 1162 mmu set 000e0000, pos 000e0000
- 1162 mmu set 000f0000, pos 000f0000
- 1162 mmu set 00100000, pos 00100000
- 1162 mmu set 00110000, pos 00110000
- 1162 mmu set 00120000, pos 00120000
- 1162 mmu set 00130000, pos 00130000
- 1162 mmu set 00140000, pos 00140000
- 1162 mmu set 00150000, pos 00150000
- 1162 mmu set 00160000, pos 00160000
- 1162 mmu set 00170000, pos 00170000
- 1162 mmu set 00180000, pos 00180000
- 1162 mmu set 00190000, pos 00190000
- 1162 mmu set 001a0000, pos 001a0ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:2816
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4608
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:6912
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4608
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4608
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3fff001c,len:6948
- load:0x40078000,len:13772
- load:0x40080400,len:4532
- entry 0x400806a0
- I (63) boot: Chip Revision: 1
- I (33) boot: ESP-IDF v4.0.2-206-g5630b17e1 2nd stage bootloader
- I (33) boot: compile time 07:30:49
- I (36) boot: Enabling RNG early entropy source...
- I (39) qio_mode: Enabling default flash chip QIO
- E (44) qio_mode: Failed to set QIE bit, not enabling QIO mode
- I (50) boot: SPI Speed : 80MHz
- I (55) boot: SPI Mode : DIO
- I (59) boot: SPI Flash Size : 4MB
- E (63) flash_parts: partition 0 invalid magic number 0x102a
- E (69) boot: Failed to verify partition table
- E (74) boot: load partition table error!
- ets Jun 8 2016 00:22:57
- rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:768
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:516
- load:0x71415057,len:4194573
- 1162 mmu set 00010000, pos 00010000
- 1162 mmu set 00020000, pos 00020000
- 1162 mmu set 00030000, pos 00030000
- 1162 mmu set 00040000, pos 00040000
- 1162 mmu set 00050000, pos 00050000
- 1162 mmu set 00060000, pos 00060000
- 1162 mmu set 00070000, pos 00070000
- 1162 mmu set 00080000, pos 00080000
- 1162 mmu set 00090000, pos 00090000
- 1162 mmu set 000a0000, pos 000a0000
- 1162 mmu set 000b0000, pos 000b0000
- 1162 mmu set 000c0000, pos 000c0000
- 1162 mmu set 000d0000, pos 000d0000
- 1162 mmu set 000e0000, pos 000e0000
- 1162 mmu set 000f0000, pos 000f0000
- 1162 mmu set 00100000, pos 00100000
- 1162 mmu set 00110000, pos 00110000
- 1162 mmu set 00120000, pos 00120000
- 1162 mmu set 00130000, pos 00130000
- 1162 mmu set 00140000, pos 00140000
- 1162 mmu set 00150000, pos 00150000
- 1162 mmu set 00160000, pos 00160000
- 1162 mmu set 00170000, pos 00170000
- 1162 mmu set 00180000, pos 00180000
- 1162 mmu set 00190000, pos 00190000
- 1162 mmu set 001a0000, pos 001a0ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:512
- ho 0 tail 12 room 4
- load:0x00540b00,len:1346457687
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3fff001c,len:6948
- load:0x40078000,len:13772
- load:0x40080400,len:4532
- entry 0x400806a0
- I (63) boot: Chip Revision: 1
- I (33) boot: ESP-IDF v4.0.2-206-g5630b17e1 2nd stage bootloader
- I (33) boot: compile time 07:30:49
- I (33) boot: Enabling RNG early entropy source...
- I (39) qio_mode: Enabling default flash chip QIO
- E (44) qio_mode: Failed to set QIE bit, not enabling QIO mode
- I (50) boot: SPI Speed : 80MHz
- I (55) boot: SPI Mode : DIO
- I (59) boot: SPI Flash Size : 4MB
- E (63) flash_parts: partition 0 invalid magic number 0x502a
- E (69) boot: Failed to verify partition table
- E (74) boot: load partition table error!
- ets Jun 8 2016 00:22:57
- rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:516
- load:0x50415057,len:4194573
- 1162 mmu set 00010000, pos 00010000
- 1162 mmu set 00020000, pos 00020000
- 1162 mmu set 00030000, pos 00030000
- 1162 mmu set 00040000, pos 00040000
- 1162 mmu set 00050000, pos 00050000
- 1162 mmu set 00060000, pos 00060000
- 1162 mmu set 00070000, pos 00070000
- 1162 mmu set 00080000, pos 00080000
- 1162 mmu set 00090000, pos 00090000
- 1162 mmu set 000a0000, pos 000a0000
- 1162 mmu set 000b0000, pos 000b0000
- 1162 mmu set 000c0000, pos 000c0000
- 1162 mmu set 000d0000, pos 000d0000
- 1162 mmu set 000e0000, pos 000e0000
- 1162 mmu set 000f0000, pos 000f0000
- 1162 mmu set 00100000, pos 00100000
- 1162 mmu set 00110000, pos 00110000
- 1162 mmu set 00120000, pos 00120000
- 1162 mmu set 00130000, pos 00130000
- 1162 mmu set 00140000, pos 00140000
- 1162 mmu set 00150000, pos 00150000
- 1162 mmu set 00160000, pos 00160000
- 1162 mmu set 00170000, pos 00170000
- 1162 mmu set 00180000, pos 00180000
- 1162 mmu set 00190000, pos 00190000
- 1162 mmu set 001a0000, pos 001a0ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f000c,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4864
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4612
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:768
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4864
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4612
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:6912
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:516
- load:0x50415057,len:4194573
- 1162 mmu set 00010000, pos 00010000
- 1162 mmu set 00020000, pos 00020000
- 1162 mmu set 00030000, pos 00030000
- 1162 mmu set 00040000, pos 00040000
- 1162 mmu set 00050000, pos 00050000
- 1162 mmu set 00060000, pos 00060000
- 1162 mmu set 00070000, pos 00070000
- 1162 mmu set 00080000, pos 00080000
- 1162 mmu set 00090000, pos 00090000
- 1162 mmu set 000a0000, pos 000a0000
- 1162 mmu set 000b0000, pos 000b0000
- 1162 mmu set �ets Jun 8 2016 00:22:57
- rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3fff001c,len:6948
- load:0x40078000,len:13772
- load:0x40080400,len:4532
- entry 0x400806a0
- I (63) boot: Chip Revision: 1
- I (33) boot: ESP-IDF v4.0.2-206-g5630b17e1 2nd stage bootloader
- I (33) boot: compile time 07:30:49
- I (36) boot: Enabling RNG early entropy source...
- I (39) qio_mode: Enabling default flash chip QIO
- E (44) qio_mode: Failed to set QIE bit, not enabling QIO mode
- I (50) boot: SPI Speed : 80MHz
- I (55) boot: SPI Mode : DIO
- I (59) boot: SPI Flash Size : 4MB
- E (63) flash_parts: partition 1 invalid magic number 0x502a
- E (69) boot: Failed to verify partition table
- E (74) boot: load partition table error!
- ets Jun 8 2016 00:22:57
- rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4612
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:6912
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f001c,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:768
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:512
- ho 0 tail 12 room 4
- load:0x40540b00,len:1346457687
- 1162 mmu set 00010000, pos 00010000
- 1162 mmu set 00020000, pos 00020000
- 1162 mmu set 00030000, pos 00030000
- 1162 mmu set 00040000, pos 00040000
- 1162 mmu set 00050000, pos 00050000
- 1162 mmu set 00060000, pos 00060000
- 1162 mmu set 00070000, pos 00070000
- 1162 mmu set 00080000, pos 00080000
- 1162 mmu set 00090000, pos 00090000
- 1162 mmu set 000a0000, pos 000a0000
- 1162 mmu set 000b0000, pos 000b0000
- 1162 mmu set 000c0000, pos 000c0000
- 1162 mmu set 000d0000, pos 000d0000
- 1162 mmu set 000e0000, pos 000e0000
- 1162 mmu set 000f0000, pos 000f0000
- 1162 mmu set 00100000, pos 00100000
- 1162 mmu set 00110000, pos 00110000
- 1162 mmu set 00120000, pos 00120000
- 1162 mmu set 00130000, pos 00130000
- 1162 mmu set 00140000, pos 00140000
- 1162 mmu set 00150000, pos 00150000
- 1162 mmu set 00160000, pos 00160000
- 1162 mmu set 00170000, pos 00170000
- 1162 mmu set 00180000, pos 00180000
- 1162 mmu set 00190000, pos 00190000
- 1162 mmu set 001a0000, pos 001a0000
- 1162 mmu set 001b0000, pos 001b0000
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3fff001c,len:6948
- load:0x40078000,len:13772
- load:0x40080400,len:4532
- entry 0x400806a0
- I (63) boot: Chip Revision: 1
- I (33) boot: ESP-IDF v4.0.2-206-g5630b17e1 2nd stage bootloader
- I (33) boot: compile time 07:30:49
- I (36) boot: Enabling RNG early entropy source...
- I (39) qio_mode: Enabling default flash chip QIO
- I (44) boot: SPI Speed : 80MHz
- I (48) boot: SPI Mode : QIO
- I (52) boot: SPI Flash Size : 4MB
- E (56) flash_parts: partition 0 invalid magic number 0x888a
- E (62) boot: Failed to verify partition table
- E (67) boot: load partition table error!
- ets Jun 8 2016 00:22:57
- rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:768
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:516
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f001c,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:516
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:768
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4864
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:516
- load:0x50415057,len:4194573
- 1162 mmu set 00010000, pos 00010000
- 1162 mmu set 00020000, pos 00020000
- 1162 mmu set 00030000, pos 00030000
- 1162 mmu set 00040000, pos 00040000
- 1162 mmu set 00050000, pos 00050000
- 1162 mmu set 00060000, pos 00060000
- 1162 mmu set 00070000, pos 00070000
- 1162 mmu set 00080000, pos 00080000
- 1162 mmu set 00090000, pos 00090000
- 1162 mmu set 000a0000, pos 000a0000
- 1162 mmu set 000b0000, pos 000b0000
- 1162 mmu set 000c0000, pos 000c0000
- ets Jun 8 2016 00:22:57
- rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3fff001c,len:6948
- load:0x40078000,len:13772
- load:0x40080400,len:4532
- csum err:0xde!=0xfe
- ets_main.c 371
- ets Jun 8 2016 00:22:57
- rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3fff001c,len:6948
- load:0x40078000,len:13772
- load:0x40080400,len:4532
- entry 0x400806a0
- I (63) boot: Chip Revision: 1
- I (33) boot: ESP-IDF v4.0.2-206-g5630b17e1 2nd stage bootloader
- I (33) boot: compile time 07:30:49
- I (33) boot: Enabling RNG early entropy source...
- I (39) qio_mode: Enabling default flash chip QIO
- I (44) boot: SPI Speed : 80MHz
- I (48) boot: SPI Mode : QIO
- I (52) boot: SPI Flash Size : 4MB
- E (56) flash_parts: partition 0 invalid magic number 0x888a
- E (62) boot: Failed to verify partition table
- E (67) boot: load partition table error!
- ets Jun 8 2016 00:22:57
- rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4608
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:516
- load:0x50415057,len:4194573
- 1162 mmu set 00010000, pos 00010000
- 1162 mmu set 00020000, pos 00020000
- 1162 mmu set 00030000, pos 00030000
- 1162 mmu set 00040000, pos 00040000
- 1162 mmu set 00050000, pos 00050000
- 1162 mmu set 00060000, pos 00060000
- 1162 mmu set 00070000, pos 00070000
- 1162 mmu set 00080000, pos 00080000
- 1162 mmu set 00090000, pos 00090000
- 1162 mmu set 000a0000, pos 000a0000
- 1162 mmu set 000b0000, pos 000b0000
- 1162 mmu set 000c0000, pos 000c0000
- 1162 mmu set 000d0000, pos 000d0000
- 1162 mmu set 000e0000, pos 000e0000
- 1162 mmu set 000f0000, pos 000f0000
- 1162 mmu set 00100000, pos 00100000
- 1162 mmu set 00110000, pos 00110000
- 1162 mmu set 00120000, pos 00120000
- 1162 mmu set 00130000, pos 00130000
- 1162 mmu set 00140000, pos 00140000
- 1162 mmu set 00150000, pos 00150000
- 1162 mmu set 00160000, pos 00160000
- 1162 mmu set 00170000, pos 00170000
- 1162 mmu set 00180000, pos 00180000
- 1162 mmu set 00190000, pos 00190000
- 1162 mmu set 001a0000, pos 001a0ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4868
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:768
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:516
- load:0x50415057,len:4194573
- 1162 mmu set 00010000, pos 00010000
- 1162 mmu set 00020000, pos 00020000
- 1162 mmu set 00030000, pos 00030000
- 1162 mmu set 00040000, pos 00040000
- 1162 mmu set 00050000, pos 00050000
- 1162 mmu set 00060000, pos 00060000
- 1162 mmu set 00070000, pos 00070000
- 1162 mmu set 00080000, pos 00080000
- 1162 mmu set 00090000, pos 00090000
- 1162 mmu set 000a0000, pos 000a0000
- 1162 mmu set 000b0000, pos 000b0000
- 1162 mmu set 000c0000, pos 000c0000
- 1162 mmu set 000d0000, pos 000d0000
- 1162 mmu set 000e0000, pos 000e0000
- 1162 mmu set 000f0000, pos 000f0000
- 1162 mmu set 00100000, pos 00100000
- 1162 mmu set 00110000, pos 00110000
- 1162 mmu set 00120000, pos 00120000
- 1162 mmu set 00130000, pos 00130000
- 1162 mmu set 00140000, pos 00140000
- 1162 mmu set 00150000, pos 00150000
- 1162 mmu set 00160000, pos 00160000
- 1162 mmu set 00170000, pos 00170000
- 1162 mmu set 00180000, pos 00180000
- 1162 mmu set 00190000, pos 00190000
- 1162 mmu set 001a0000, pos 001a0ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3fff001c,len:6948
- load:0x40078000,len:13772
- load:0x40080400,len:4532
- entry 0x400806a0
- I (63) boot: Chip Revision: 1
- I (33) boot: ESP-IDF v4.0.2-206-g5630b17e1 2nd stage bootloader
- I (33) boot: compile time 07:30:49
- I (36) boot: Enabling RNG early entropy source...
- I (39) qio_mode: Enabling default flash chip QIO
- E (44) qio_mode: Failed to set QIE bit, not enabling QIO mode
- I (50) boot: SPI Speed : 80MHz
- I (55) boot: SPI Mode : DIO
- I (59) boot: SPI Flash Size : 4MB
- E (63) flash_parts: partition 0 invalid magic number 0x502a
- E (69) boot: Failed to verify partition table
- E (74) boot: load partition table error!
- ets Jun 8 2016 00:22:57
- rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:512
- ho 0 tail 12 room 4
- load:0x00540b00,len:1346457687
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4644
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3fff001c,len:6948
- load:0x40078000,len:13772
- load:0x40080400,len:4532
- entry 0x400806a0
- I (63) boot: Chip Revision: 1
- I (33) boot: ESP-IDF v4.0.2-206-g5630b17e1 2nd stage bootloader
- I (33) boot: compile time 07:30:49
- I (36) boot: Enabling RNG early entropy source...
- I (39) qio_mode: Enabling default flash chip QIO
- E (44) qio_mode: Failed to set QIE bit, not enabling QIO mode
- I (50) boot: SPI Speed : 80MHz
- I (55) boot: SPI Mode : DIO
- I (59) boot: SPI Flash Size : 4MB
- E (63) flash_parts: partition 0 invalid magic number 0x102a
- E (69) boot: Failed to verify partition table
- E (74) boot: load partition table error!
- ets Jun 8 2016 00:22:57
- rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:548
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0014,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:516
- load:0x50415057,len:4195597
- 1162 mmu set 00010000, pos 00010000
- 1162 mmu set 00020000, pos 00020000
- 1162 mmu set 00030000, pos 00030000
- 1162 mmu set 00040000, pos 00040000
- 1162 mmu set 00050000, pos 00050000
- 1162 mmu set 00060000, pos 00060000
- 1162 mmu set 00070000, pos 00070000
- 1162 mmu set 00080000, pos 00080000
- 1162 mmu set 00090000, pos 00090000
- 1162 mmu set 000a0000, pos 000a0000
- 1162 mmu set 000b0000, pos 000b0000
- 1162 mmu set 000c0000, pos 000c0000
- 1162 mmu set 000d0000, pos 000d0000
- 1162 mmu set 000e0000, pos 000e0000
- 1162 mmu set 000f0000, pos 000f0000
- 1162 mmu set 00100000, pos 00100000
- 1162 mmu set 00110000, pos 00110000
- 1162 mmu set 00120000, pos 00120000
- 1162 mmu set 00130000, pos 00130000
- 1162 mmu set 00140000, pos 00140000
- 1162 mmu set 00150000, pos 00150000
- 1162 mmu set 00160000, pos 00160000
- 1162 mmu set 00170000, pos 00170000
- 1162 mmu set 00180000, pos 00180000
- 1162 mmu set 00190000, pos 00190000
- 1162 mmu set 001a0000, pos 001a0ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x1f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:516
- load:0x50415057,len:4194573
- 1162 mmu set 00010000, pos 00010000
- 1162 mmu set 00020000, pos 00020000
- 1162 mmu set 00030000, pos 00030000
- 1162 mmu set 00040000, pos 00040000
- 1162 mmu set 00050000, pos 00050000
- 1162 mmu set 00060000, pos 00060000
- 1162 mmu set 00070000, pos 00070000
- 1162 mmu set 00080000, pos 00080000
- 1162 mmu set 00090000, pos 00090000
- 1162 mmu set 000a0000, pos 000a0000
- 1162 mmu set 000b0000, pos 000b0000
- 1162 mmu set 000c0000, pos 000c0000
- 1162 mmu set 000d0000, pos 000d0000
- 1162 mmu set 000e0000, pos 000e0000
- 1162 mmu set 000f0000, pos 000f0000
- 1162 mmu set 00100000, pos 00100000
- 1162 mmu set 00110000, pos 00110000
- 1162 mmu set 00120000, pos 00120000
- 1162 mmu set 00130000, pos 00130000
- 1162 mmu set 00140000, pos 00140000
- 1162 mmu set 00150000, pos 00150000
- 1162 mmu set 00160000, pos 00160000
- 1162 mmu set 00170000, pos 00170000
- 1162 mmu set 00180000, pos 00180000
- 1162 mmu set 00190000, pos 00190000
- 1162 mmu set 001a0000, pos 001a0ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:768
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3f3f0004,len:512
- ho 0 tail 12 room 4
- load:0x41540b00,len:1346457687
- 1162 mmu set 00010000, pos 00010000
- 1162 mmu set 00020000, pos 00020000
- 1162 mmu set 00030000, pos 00030000
- 1162 mmu set 00040000, pos 00040000
- 1162 mmu set 00050000, pos 00050000
- 1162 mmu set 00060000, pos 00060000
- 1162 mmu set 00070000, pos 00070000
- 1162 mmu set 00080000, pos 00080000
- 1162 mmu set 00090000, pos 00090000
- 1162 mmu set 000a0000, pos 000a0000
- 1162 mmu set 000b0000, pos 000b0000
- 1162 mmu set 000c0000, pos 000c0000
- 1162 mmu set 000d0000, pos 000d0000
- 1162 mmu set 000e0000, pos 000e0000
- 1162 mmu set 000f0000, pos 000f0000
- 1162 mmu set 00100000, pos 00100000
- 1162 mmu set 00110000, pos 00110000
- 1162 mmu set 00120000, pos 00120000
- 1162 mmu set 00130000, pos 00130000
- 1162 mmu set 00140000, pos 00140000
- 1162 mmu set 00150000, pos 00150000
- 1162 mmu set 00160000, pos 00160000
- 1162 mmu set 00170000, pos 00170000
- 1162 mmu set 00180000, pos 00180000
- 1162 mmu set 00190000, pos 00190000
- 1162 mmu set 001a0000, pos 001a0000
- 1162 mmu set 001b0000, pos 001b0000
- 1162 mmu set 001c0000, pos 001c0000
- 1162 mmu set 001d0000, pos 001d0000
- 1162 mmu set 001e0000, pos 001e0000
- 1162 mmu set 001f0000, pos 001f0000
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:516
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:768
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4900
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4608
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4864
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:516
- ets Jun 8 2016 00:22:57
- rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3fff001c,len:6948
- load:0x40078000,len:13772
- load:0x40080400,len:4532
- csum err:0x7e!=0xfe
- ets_main.c 371
- ets Jun 8 2016 00:22:57
- rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x3fff001c,len:6948
- load:0x40078000,len:13772
- load:0x40080400,len:4532
- entry 0x400806a0
- I (63) boot: Chip Revision: 1
- I (33) boot: ESP-IDF v4.0.2-206-g5630b17e1 2nd stage bootloader
- I (33) boot: compile time 07:30:49
- I (33) boot: Enabling RNG early entropy source...
- I (39) qio_mode: Enabling default flash chip QIO
- E (44) qio_mode: Failed to set QIE bit, not enabling QIO mode
- I (50) boot: SPI Speed : 80MHz
- I (55) boot: SPI Mode : DIO
- I (59) boot: SPI Flash Size : 4MB
- E (63) flash_parts: partition 0 invalid magic number 0x102a
- E (69) boot: Failed to verify partition table
- E (74) boot: load partition table error!
- ets Jun 8 2016 00:22:57
- rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0fff0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:516
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f001c,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4608
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f7f0004,len:512
- ets Jun 8 2016 00:22:57
- rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
- configsip: 0, SPIWP:0xee
- clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
- mode:DIO, clock div:1
- load:0x3fff0018,len:4
- load:0x0f3f0004,len:4864
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