----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date:    11:10:12 01/28/2020
-- Design Name:
-- Module Name:    progetto_TD_vhdl - Bank_entrance
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity progetto_TD_vhdl is
    Port ( --Inputs:
			  buttonA : in  STD_LOGIC;			--pulsante apertura portaA
           buttonB : in  STD_LOGIC;			--pulsante apertura portaB
           sensorA : in STD_LOGIC;			--sensore passaggio porta A
			  sensorB : in STD_LOGIC;			--sensore passaggio porta B
			  sensorC : in STD_LOGIC;			--rilevazione persona tra le due porte
			  md_detection : in STD_LOGIC;	--rilevazione metal detector

			  --Outputs:
           doorA : out  STD_LOGIC;			--apertura porta A
           doorB : out  STD_LOGIC;			--apertura porta B
           alarm : out  STD_LOGIC;			--attivazione allarme di sicurezza

			  clk : in  STD_LOGIC;
           rst : in  STD_LOGIC);
end progetto_TD_vhdl;

architecture Bank_entrance of progetto_TD_vhdl is
type state is ( s0, s1, s2, s3, s4, s5, s6, s7 );			--dichiarazione stati automa
signal current_state, next_state : state;
signal count, new_count: integer range 0 to 65;
signal timeover : STD_LOGIC := '0';


begin

	process(clk)
	begin
		if ( rising_edge ( clk ) ) then
			if ( rst = '1' ) then
				current_state <= s0;
				count<=0;
			else
				current_state <= next_state;
				count<=new_count;
			end if;
		end if;
	end process;


	--Processo per l'aggiornamento degli stati
	next_state_update : process( clk,buttonA, buttonB, current_state,sensorA, sensorB, sensorC, md_detection, timeover )
	begin
		case current_state is
			when s0 =>	if( buttonB = '1' )then
								next_state <= s5;
							elsif( buttonB = '0' and buttonA = '1' )then
								next_state <= s1;
							else
									next_state <= s0;
							end if;
			when s1 =>	if ( timeover = '1' and (sensorA = '0' or sensorC='0' ) ) then
								next_state <= s0;
							else
								if( timeover='0' and sensorC = '1' and sensorA = '0' ) then
									next_state <= s2;
								else
 										next_state <= s1;
 								end if;
							end if;
			when s2 =>	if(md_detection='0')then
									next_state<=s3;
								else
									next_state<=s4;
							end if;
			when s3 =>	if (sensorC = '0' and sensorB = '0' ) then
								next_state<=s0;
							else
								next_state<=s3;
							end if;
			when s4 =>	if(sensorC = '0' and sensorA = '0' ) then
								next_state <= s0;
							else
								next_state <= s4;
							end if;
			when s5 => 	if ( timeover = '1' and (sensorB = '0' and sensorC = '0') ) then
								next_state <= s0;
							else
								if ( sensorC = '1' and sensorB = '0' ) then
									next_state <= s6;
								else
									next_state <= s5;
								end if;
							end if;
			when s6 => 	-- timeover per aspettare più tempo per chiudere correttamente B e aprire A
							if(timeover='1') then
								next_state<=s7;
							else
								next_state<=s6;
							end if;
			when s7 => 	if( sensorC = '0' and sensorA = '0' )  then
								next_state <= s0;
							else
								next_state <= s7;
							end if;
		end case;
	end process;


	--Timer per mantenere la porta aperta in caso di entrata/uscita
	timer : process ( current_state, count )
	begin
		if ( current_state = s1 or current_state = s5  or current_state=s6) then
			if count = 3  then
				new_count <= 0;
				timeover <= '1';
			else
				new_count <= count+1;
				timeover <= '0';
			end if;
		else
			new_count <= 0;
			timeover <= '0';
		end if;
	end process;


	--Processo aggiornamento uscite
	output_update: process(current_state)
	begin
		case current_state is
				  --Uscite per s0
		   when s0=>     doorA<='0';
					        doorB<='0';
					        alarm<='0';
				  --Uscite per s1
		   when s1=> 	  doorA<='1';
					        doorB<='0';
					        alarm<='0';
				  --Uscite per s2
		   when s2=>     doorA<='0';
					        doorB<='0';
					        alarm<='0';
				  --Uscite per s3
			when s3=> 	  doorA<='0';
					        doorB<='1';
					        alarm<='0';
				  --Uscite per s4
			when s4=> 	  doorA<='1';
					        doorB<='0';
					        alarm<='1';
				  --Uscite per s5
			when s5=> 	  doorA<='0';
							  doorB<='1';
							  alarm<='0';
				  --Uscite per s6
			when s6=> 	  doorA<='0';
					        doorB<='0';
					        alarm<='0';
				  --Uscite per s7
			when s7=> 	  doorA<='1';
							  doorB<='0';
							  alarm<='0';
			end case;
	end process;

end Bank_entrance;