SHARE
TWEET

Register package example

milanmetal Aug 27th, 2019 224 Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
  1. \usepackage{register}
  2.  
  3. % document: http://tug.ctan.org/tex-archive/macros/latex/contrib/register/register.pdf
  4. ...
  5.  
  6. \begin{register}{H}{Example}{0x250}% name=example
  7. \label{example}%
  8. \regfield{FIFO depth}{6}{58}{{random}}%
  9. \regfield{Something}{4}{54}{1100}%
  10. \regfield{Status}{21}{33}{{uninitialized}}%
  11. \regfield{Enable}{1}{32}{1}%
  12. \reglabel{Reset}\regnewline%
  13. \regfield{Counter}{10}{22}{{0x244}}% READ_ONLY
  14. \regfield{Howdy}{5}{17}{1_1010}%
  15. \regfield{Control}{1}{16}{-}%
  16. \regfield{Hardfail}{1}{15}{1}%
  17. \regfield{Data}{15}{0}{{uninitialized}}%
  18. \reglabel{Reset}%\regnewline%
  19. \end{register}
  20.  
  21. \begin{register}{htbp}{Configuration}{0x2848}% name=CONFIG
  22. \label{Configuration}%
  23. \regfield{soft reset perf}{1}{63}{0}% STATUS
  24. \regfield{reserved}{30}{33}{0}%
  25. \regfield{Test mode}{1}{32}{0}%
  26. \reglabel{Reset}\regnewline%
  27. \regfield{reserved}{13}{19}{0}%
  28. \regfield{\parbox[b]{0pt}{Request Depth}}{7}{12}{1}%
  29. \regfield{reserved}{3}{9}{0}%
  30. \regfield{line\_2x\_L}{1}{8}{?}% STATUS
  31. \regfield{reserved}{1}{7}{0}%
  32. \regfield{ill\_cmd\_enable}{1}{6}{0}%
  33. \regfield{LPCE}{1}{5}{0}%
  34. \regfield{DVI disable}{1}{4}{0}%
  35. \regfield{SBA enable}{1}{3}{0}%
  36. \regfield{reserved}{2}{1}{0}%
  37. \regfield{line\_2x\_enable}{1}{0}{0}% READ_ONLY
  38. \reglabel{Reset}\regnewline%
  39. \begin{regdesc}\begin{reglist}[Request~Depth]
  40. \item [line\_2x\_enable]Setting this bit enables the chip
  41. to utilize a second connected data line.
  42. \item [SBA~enable]Setting this bit activates the sideband-address port.
  43. The SBA port is only useable in a double-line configuration.
  44. \item [DVI~disable]Setting this bit \emph{turns off} DVI extraction for
  45. DMA requests.
  46. \item [LPCE]Line Parity Check Enable.
  47. \item [ill\_cmd\_enable]\TR{3}Illegal Command enable.
  48. This bit is new for TR3.
  49. \item [line\_2x\_L](Read only) Indicates whether this chip is connected
  50. to a second data line. When this bit is 0, a second line
  51. is available.
  52. \item [Request~Depth]Controls number of outstanding DMA requests.
  53. \item [Test~mode]Activates data line test mode.
  54. \item [soft~reset~perf]\TR{4}Indicates that a soft reset has been
  55. performed. This bit is new for TR4.
  56. \end{reglist}\end{regdesc}\end{register}
RAW Paste Data
We use cookies for various purposes including analytics. By continuing to use Pastebin, you agree to our use of cookies as described in the Cookies Policy. OK, I Understand
Top