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GNUBS'D MIPSel MTWIFI4421+DDWRT 4.14.69-SE [CRISPIN] bootlog

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  1. bootlog of the latest DD-WRT 4.14.69 for MIPSEL routers (currently running on an MT7621AT+MT7615x2 [DIR882]).
  2.  
  3. special edition because it uses The Crispy One John Crispin aka blogic's (i am sure he hates the moniker, but as he is aware: nicks aren't always chosen ;)) mediatek ethernet driver (now with hardware nat), just to have everything up and running.
  4.  
  5. the ethernet driver is now about good as RAETH, but Countrymen Crispin and Burton have pulled multiple-magnitudes of their weight for many years, so this will have to do as a "proof of concept". ideally, with RAETH, we shave a few more megabytes with respect to working memory.
  6.  
  7. ignore the iptables missing rules, as the serial log below is produced without an internet connection due to physical constraints:
  8.  
  9. wifi driver is now at 4.4.2.1 with newer ramcodes than what is offered via GPL. i think you will like this build even more than the previous ones. i think the update is worth it for teh wifi driver alone!
  10.  
  11. some additions from the recent update:
  12. -DBDC mode is now enabled, WSC is disabled.
  13.  
  14. i think the mt_wifi driver is near-optimal now. would love input on usefulness of RRM if anyone knows (remote radio management).
  15.  
  16. i've also added rt_timer, just to see if it will improve operation. i will remove it if there are some peculiar hangs, but i don't think that will happen.
  17.  
  18. debating on removing the mt7621 gpio if i'm using ralink's GPIO, but again i'm not sure if this would be received well since the former can export pins using /proc but the latter cannot. even so, there may be small leaks using the former when DD-WRT uses the latter. still, since it's benign out of the box, i am not too concerned.
  19.  
  20. .............................................................
  21. .................................................................................................................................................................................................................................................
  22. .
  23. .
  24. 3: System Boot system code via Flash.
  25. ## Booting image at bc060000 ...
  26.    Image Name:  
  27.    Image Type:   MIPS Linux Kernel Image (lzma compressed)
  28.    Data Size:    3585470 Bytes =  3.4 MB
  29.    Load Address: 80001000
  30.    Entry Point:  806d71fc
  31.    Verifying Checksum ... OK
  32.    Uncompressing Kernel Image ... OK
  33. No initrd
  34. ## Transferring control to Linux (at address 806d71fc) ...
  35. ## Giving linux memsize in MB, 128
  36.  
  37. Starting kernel ...
  38.  
  39. RLinux version 4.14.69 (Gagan@GagansMacPro) (gcc version 8.2.0 (GCC)) #2221 SMP PREEMPT Wed Sep 12 13:58:42 MDT 2018
  40. USoC Type: MediaTek MT7621 ver:1 eco:3
  41. Lbootconsole [early0] enabled
  42. ECPU0 revision is: 0001992f (MIPS 1004Kc)
  43. BMIPS: machine is D-Link DIR-882 rev. A1
  44. RDetermined physical RAM map:
  45. I memory: 08000000 @ 00000000 (usable)
  46. TVPE topology {2,2} total 4
  47. APrimary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
  48. NPrimary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
  49. NMIPS secondary cache 256kB, 8-way, linesize 32 bytes.
  50. IZone ranges:
  51. A  DMA      [mem 0x0000000000000000-0x0000000000ffffff]
  52.   Normal   [mem 0x0000000001000000-0x0000000007ffffff]
  53.   HighMem  empty
  54. Movable zone start for each node
  55. Early memory node ranges
  56.   node   0: [mem 0x0000000000000000-0x0000000007ffffff]
  57. Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff]
  58. percpu: Embedded 15 pages/cpu @8110e000 s31536 r8192 d21712 u61440
  59. Built 1 zonelists, mobility grouping on.  Total pages: 32512
  60. Kernel command line: console=ttyS0,57600n8 rootfstype=squashfs root=/dev/mtdblock5
  61. log_buf_len individual max cpu contribution: 4096 bytes
  62. log_buf_len total cpu_extra contributions: 12288 bytes
  63. log_buf_len min size: 16384 bytes
  64. log_buf_len: 32768 bytes
  65. early log buf free: 14184(86%)
  66. PID hash table entries: 512 (order: -1, 2048 bytes)
  67. Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
  68. Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
  69. Writing ErrCtl register=00023600
  70. Readback ErrCtl register=00023600
  71. Memory: 118988K/131072K available (7034K kernel code, 968K rwdata, 1448K rodata, 264K init, 873K bss, 12084K reserved, 0K cma-reserved, 0K highmem)
  72. SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
  73. Preemptible hierarchical RCU implementation.
  74.         Tasks RCU enabled.
  75. NR_IRQS: 256
  76. clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
  77. sched_clock: 32 bits at 250 Hz, resolution 4000000ns, wraps every 8589934590000000ns
  78. Calibrating delay loop... 583.68 BogoMIPS (lpj=1167360)
  79. pid_max: default: 4096 minimum: 301
  80. Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
  81. Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
  82. Hierarchical SRCU implementation.
  83. smp: Bringing up secondary CPUs ...
  84. Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
  85. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
  86. MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
  87. CPU1 revision is: 0001992f (MIPS 1004Kc)
  88. Synchronize counters for CPU 1: done.
  89. Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
  90. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
  91. MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
  92. CPU2 revision is: 0001992f (MIPS 1004Kc)
  93. Synchronize counters for CPU 2: done.
  94. Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
  95. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
  96. MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
  97. CPU3 revision is: 0001992f (MIPS 1004Kc)
  98. Synchronize counters for CPU 3: done.
  99. smp: Brought up 1 node, 4 CPUs
  100. devtmpfs: initialized
  101. random: get_random_u32 called from bucket_table_alloc+0x2b8/0x36c with crng_init=0
  102. clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
  103. futex hash table entries: 16 (order: -3, 512 bytes)
  104. pinctrl core: initialized pinctrl subsystem
  105. NET: Registered protocol family 16
  106. pull PCIe RST: RALINK_RSTCTRL = 4000000
  107. release PCIe RST: RALINK_RSTCTRL = 7000000
  108. ***** Xtal 40MHz *****
  109. release PCIe RST: RALINK_RSTCTRL = 7000000
  110. Port 0 N_FTS = 1b105000
  111. Port 1 N_FTS = 1b105000
  112. Port 2 N_FTS = 1b102800
  113. PCIE2 no card, disable it(RST&CLK)
  114.  -> 21007f2
  115. PCIE0 enabled
  116. PCIE1 enabled
  117. PCI host bridge /pcie@1e140000 ranges:
  118.  MEM 0x0000000060000000..0x000000006fffffff
  119.   IO 0x000000001e160000..0x000000001e16ffff
  120. PCI coherence region base: 0x87c3dce0, mask/settings: 0x60000000
  121. mt7621_gpio 1e000600.gpio: registering 32 gpios
  122. mt7621_gpio 1e000600.gpio: registering 32 gpios
  123. mt7621_gpio 1e000600.gpio: registering 32 gpios
  124. vgaarb: loaded
  125. SCSI subsystem initialized
  126. USB led has gpio 14
  127. USB led has gpio 13
  128. usbcore: registered new interface driver usbfs
  129. usbcore: registered new interface driver hub
  130. usbcore: registered new device driver usb
  131. i2c-mt7621 1e000900.i2c: clock 100KHz, re-start not support
  132. PCI host bridge to bus 0000:00
  133. pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
  134. pci_bus 0000:00: root bus resource [io  0xffffffff]
  135. pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
  136. pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
  137. pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
  138. pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
  139. pci 0000:00:01.0: BAR 0: no space for [mem size 0x80000000]
  140. pci 0000:00:01.0: BAR 0: failed to assign [mem size 0x80000000]
  141. pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
  142. pci 0000:00:01.0: BAR 8: assigned [mem 0x60100000-0x601fffff]
  143. pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff]
  144. pci 0000:00:01.0: BAR 1: assigned [mem 0x60210000-0x6021ffff]
  145. pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
  146. pci 0000:00:00.0: PCI bridge to [bus 01]
  147. pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
  148. pci 0000:02:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff 64bit]
  149. pci 0000:00:01.0: PCI bridge to [bus 02]
  150. pci 0000:00:01.0:   bridge window [mem 0x60100000-0x601fffff]
  151. clocksource: Switched to clocksource GIC
  152. NET: Registered protocol family 2
  153. TCP established hash table entries: 1024 (order: 0, 4096 bytes)
  154. TCP bind hash table entries: 1024 (order: 1, 8192 bytes)
  155. TCP: Hash tables configured (established 1024 bind 1024)
  156. UDP hash table entries: 128 (order: 0, 4096 bytes)
  157. UDP-Lite hash table entries: 128 (order: 0, 4096 bytes)
  158. NET: Registered protocol family 1
  159. workingset: timestamp_bits=30 max_order=15 bucket_order=0
  160. squashfs: version 4.0 (2009/01/31) Phillip Lougher
  161. io scheduler noop registered (default)
  162. io scheduler deadline registered
  163. io scheduler mq-deadline registered
  164. io scheduler kyber registered
  165. mtk_hsdma 1e007000.hsdma: Using 3 as missing dma-requests property
  166. mtk_hsdma 1e007000.hsdma: MediaTek HSDMA driver registered
  167. random: fast init done
  168. serial8250_init
  169. Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
  170. console [ttyS0] disabled
  171. 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 18, base_baud = 3125000) is a 16550A
  172. console [ttyS0] enabled
  173. console [ttyS0] enabled
  174. bootconsole [early0] disabled
  175. bootconsole [early0] disabled
  176. Ralink gpio driver initialized:power_gpio[8]
  177. cacheinfo: Unable to detect cache hierarchy for CPU 0
  178. physmap platform flash device: 01000000 at 1c000000
  179. virtual memory bc000000
  180. physmap-flash physmap-flash.0: map_probe failed
  181. flash manufacture id: c2, device id 20 18
  182. MX25L12805D(c2 2018c220) (16384 Kbytes)
  183. mtd .name = raspi, .size = 0x01000000 (16M) .erasesize = 0x00010000 (64K) .numeraseregions = 0
  184. Creating 6 MTD partitions on "raspi":
  185. 0x000000000000-0x000000030000 : "Bootloader"
  186. 0x000000030000-0x000000040000 : "Config"
  187. 0x000000040000-0x000000050000 : "Factory"
  188. 0x000000050000-0x000000060000 : "Config2"
  189. 0x000000060000-0x000001000000 : "sysv"
  190. scan from offset 60000
  191.  
  192. found squashfs at 3CC000
  193. 0x0000003cb000-0x00000136b000 : "rootfs"
  194. mtd: partition "rootfs" extends beyond the end of device "raspi" -- size truncated to 0xc35000
  195. mtd: device 5 (rootfs) set to be root filesystem
  196. libphy: Fixed MDIO Bus: probed
  197. tun: Universal TUN/TAP device driver, 1.6
  198. netif_napi_add() called with weight 128 on device eth%d
  199. mtk_soc_eth 1e100000.ethernet: generated random MAC address 5a:4d:86:a6:e4:76
  200. libphy: mdio: probed
  201. mtk_soc_eth 1e100000.ethernet: loaded mt7530 driver
  202. mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21
  203. PPP generic driver version 2.4.2
  204. PPP BSD Compression module registered
  205. PPP Deflate Compression module registered
  206. PPP MPPE Compression module registered
  207. NET: Registered protocol family 24
  208. register mt_drv
  209. bus=0x1, slot = 0x0, irq=0x0
  210.  
  211.  
  212. === pAd = c0101000, size = 3649360 ===
  213.  
  214. <-- RTMPAllocAdapterBlock, Status=0
  215. pAd->PciHif.CSRBaseAddress =0xc0000000, csr_addr=0xc0000000!
  216. RTMPInitPCIeDevice():device_id=0x7615
  217. DriverOwn()::Try to Clear FW Own...
  218. DriverOwn()::Success to clear FW Own
  219. mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615
  220. mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001
  221. RtmpChipOpsHook(493): Not support for HIF_MT yet! MACVersion=0x0
  222. mt7615_init()-->
  223. Use 1st iPAiLNA default bin.
  224. Use 0st /etc/wlan/MT7615_2G_cal_MT.bin default bin.
  225. <--mt7615_init()
  226. ChipOpsMCUHook
  227. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  228. cut_through_token_list_init(): 876cfe08,876cfe08
  229. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  230. cut_through_token_list_init(): 876cfe18,876cfe18
  231. <-- RTMPAllocTxRxRingMemory, Status=0
  232. [MTWF][mesh_module_init]: init hook functions.
  233. bus=0x2, slot = 0x1, irq=0x0
  234.  
  235.  
  236. === pAd = c0581000, size = 3649360 ===
  237.  
  238. <-- RTMPAllocAdapterBlock, Status=0
  239. pAd->PciHif.CSRBaseAddress =0xc0480000, csr_addr=0xc0480000!
  240. RTMPInitPCIeDevice():device_id=0x7615
  241. DriverOwn()::Try to Clear FW Own...
  242. DriverOwn()::Success to clear FW Own
  243. mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615
  244. mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001
  245. RtmpChipOpsHook(493): Not support for HIF_MT yet! MACVersion=0x0
  246. mt7615_init()-->
  247. Use 2nd iPAiLNA default bin.
  248. Use 1st /etc/wlan/MT7615_5G_cal_MT.bin default bin.
  249. <--mt7615_init()
  250. ChipOpsMCUHook
  251. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  252. cut_through_token_list_init(): 86c70708,86c70708
  253. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  254. cut_through_token_list_init(): 86c70718,86c70718
  255. <-- RTMPAllocTxRxRingMemory, Status=0
  256. rdm_major = 255
  257. xhci-mtk 1e1c0000.xhci: xHCI Host Controller
  258. xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 1
  259. xhci-mtk 1e1c0000.xhci: hcc params 0x01401198 hci version 0x96 quirks 0x00210010
  260. xhci-mtk 1e1c0000.xhci: irq 20, io mem 0x1e1c0000
  261. hub 1-0:1.0: USB hub found
  262. hub 1-0:1.0: 2 ports detected
  263. xhci-mtk 1e1c0000.xhci: xHCI Host Controller
  264. xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 2
  265. xhci-mtk 1e1c0000.xhci: Host supports USB 3.0  SuperSpeed
  266. usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
  267. hub 2-0:1.0: USB hub found
  268. hub 2-0:1.0: 1 port detected
  269. usbcore: registered new interface driver usb-storage
  270. rtc-pcf8563 0-0051: rtc core: registered rtc-pcf8563 as rtc0
  271. i2c /dev entries driver
  272. Ralink APSoC Hardware Watchdog Timer
  273. Enable MTK AesEngine Module (verson=00000401)
  274. reg_int_mask = 0,          INT_MASK = 0
  275. phy_tx_ring0 = 0x00c00000, tx_ring0 = 0xa0c00000
  276. phy_rx_ring0 = 0x00c01000, rx_ring0 = 0xa0c01000
  277. TX_CTX_IDX0 = 0,           TX_DTX_IDX0 = 0
  278. RX_CRX_IDX0 = 0,           RX_DRX_IDX0 = 800080
  279. set burstmode = 00,        AES_GLO_CFG = 0
  280. Registering MediaTek AES-cbc engine to kernel
  281. Registering MediaTek AES engine to kernel
  282. usbcore: registered new interface driver usbhid
  283. usbhid: USB HID core driver
  284. u32 classifier
  285.    Performance counters on
  286.    Actions configured
  287. Netfilter messages via NETLINK v0.30.
  288. nf_conntrack version 0.5.0 (2048 buckets, 8192 max)
  289. ctnetlink v0.93: registering with nfnetlink.
  290. ipip: IPv4 and MPLS over IPv4 tunneling driver
  291. ip_tables: (C) 2000-2006 Netfilter Core Team
  292. ipt_CLUSTERIP: ClusterIP Version 0.8 loaded successfully
  293. NET: Registered protocol family 17
  294. Bridge firewalling registered
  295. NET4: DECnet for Linux: V.2.5.68s (C) 1995-2003 Linux DECnet Project Team
  296. DECnet: Routing cache hash table of 512 buckets, 4Kbytes
  297. NET: Registered protocol family 12
  298. 8021q: 802.1Q VLAN Support v1.8
  299. Key type dns_resolver registered
  300. nvram driver (major 251) installed
  301. rtc-pcf8563 0-0051: hctosys: unable to read the hardware clock
  302. List of all partitions:
  303. 1f00             192 mtdblock0
  304. (driver?)
  305. 1f01              64 mtdblock1
  306. (driver?)
  307. 1f02              64 mtdblock2
  308. (driver?)
  309. 1f03              64 mtdblock3
  310. (driver?)
  311. 1f04           16000 mtdblock4
  312. (driver?)
  313. 1f05           12500 mtdblock5
  314. (driver?)
  315. No filesystem could mount root, tried:
  316. squashfs
  317.  
  318. Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(31,5)
  319. ---[ end Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(31,5)
  320. mtk_soc_eth 1e100000.ethernet eth0: port 3 link up
  321.  
  322. ===================================================================
  323.                MT7621   stage1 code 10:33:55 (ASIC)
  324.                CPU=500000000 HZ BUS=166666666 HZ
  325. ==================================================================
  326. Change MPLL source from XTAL to CR...
  327. do MEMPLL setting..
  328. MEMPLL Config : 0x11100000
  329. 3PLL mode + External loopback
  330. === XTAL-40Mhz === DDR-1200Mhz ===
  331. PLL2 FB_DL: 0x8, 1/0 = 521/503 21000000
  332. PLL3 FB_DL: 0x9, 1/0 = 564/460 25000000
  333. PLL4 FB_DL: 0xc, 1/0 = 538/486 31000000
  334. do DDR setting..[01F40000]
  335. Apply DDR3 Setting...(use customer AC)
  336.          0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
  337.      --------------------------------------------------------------------------------
  338. 0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  339. 0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  340. 0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  341. 0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  342. 0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  343. 0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  344. 0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  345. 0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  346. 0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  347. 0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  348. 000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  349. 000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  350. 000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  351. 000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    1    1
  352. 000E:|    0    0    0    0    0    0    0    0    1    1    1    1    1    1    1    1
  353. 000F:|    0    0    0    1    1    1    1    1    1    1    1    1    1    0    0    0
  354. 0010:|    1    1    1    1    1    1    1    1    0    0    0    0    0    0    0    0
  355. 0011:|    1    1    1    0    0    0    0    0    0    0    0    0    0    0    0    0
  356. 0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  357. 0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  358. 0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  359. 0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  360. 0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  361. 0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  362. 0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  363. 0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  364. 001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  365. 001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  366. 001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  367. 001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  368. 001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  369. 001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  370. rank 0 coarse = 15
  371. rank 0 fine = 64
  372. B:|    0    0    0    0    0    0    0    0    1    1    1    0    0    0    0    0
  373. opt_dle value:9
  374. DRAMC_R0DELDLY[018]=00001F1F
  375. ==================================================================
  376.                RX      DQS perbit delay software calibration
  377. ==================================================================
  378. 1.0-15 bit dq delay value
  379. ==================================================================
  380. bit|     0  1  2  3  4  5  6  7  8  9
  381. --------------------------------------
  382. 0 |    8 6 7 9 6 6 9 6 7 7
  383. 10 |    8 9 9 11 9 10
  384. --------------------------------------
  385.  
  386. ==================================================================
  387. 2.dqs window
  388. x=pass dqs delay value (min~max)center
  389. y=0-7bit DQ of every group
  390. input delay:DQS0 =31 DQS1 = 31
  391. ==================================================================
  392. bit     DQS0     bit      DQS1
  393. 0  (1~58)29  8  (1~60)30
  394. 1  (1~57)29  9  (1~58)29
  395. 2  (1~56)28  10  (1~59)30
  396. 3  (1~61)31  11  (1~58)29
  397. 4  (1~59)30  12  (1~61)31
  398. 5  (1~60)30  13  (1~58)29
  399. 6  (1~59)30  14  (1~60)30
  400. 7  (1~60)30  15  (1~60)30
  401. ==================================================================
  402. 3.dq delay value last
  403. ==================================================================
  404. bit|    0  1  2  3  4  5  6  7  8   9
  405. --------------------------------------
  406. 0 |    10 8 10 9 7 7 10 7 8 9
  407. 10 |    9 11 9 13 10 11
  408. ==================================================================
  409. ==================================================================
  410.     TX  perbyte calibration
  411. ==================================================================
  412. DQS loop = 15, cmp_err_1 = ffff0000
  413. dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1
  414. dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2
  415. DQ loop=15, cmp_err_1 = ffff0082
  416. dqs_perbyte_dly.last_dqdly_pass[1]=15,  finish count=1
  417. DQ loop=14, cmp_err_1 = ffff0000
  418. dqs_perbyte_dly.last_dqdly_pass[0]=14,  finish count=2
  419. byte:0, (DQS,DQ)=(8,8)
  420. byte:1, (DQS,DQ)=(8,8)
  421. 20,data:88
  422. [EMI] DRAMC calibration passed
  423.  
  424. ===================================================================
  425.                MT7621   stage1 code done
  426.                CPU=500000000 HZ BUS=166666666 HZ
  427. ===================================================================
  428.  
  429.  
  430. U-Boot 1.1.3 (May 25 2017 - 11:37:13)
  431.  
  432. Board: Ralink APSoC DRAM:  128 MB
  433. relocate_code Pointer at: 87fb4000
  434.  
  435. Config XHCI 40M PLL
  436. flash manufacture id: c2, device id 20 18
  437. find flash: MX25L12805D
  438. ============================================
  439. Ralink UBoot Version: 5.0.0.0
  440. --------------------------------------------
  441. ASIC MT7621A DualCore (MAC to MT7530 Mode)
  442. DRAM_CONF_FROM: Auto-Detection
  443. DRAM_TYPE: DDR3
  444. DRAM bus: 16 bit
  445. Xtal Mode=3 OCP Ratio=1/3
  446. Flash component: SPI Flash
  447. Date:May 25 2017  Time:11:37:13
  448. ============================================
  449. icache: sets:256, ways:4, linesz:32 ,total:32768
  450. dcache: sets:256, ways:4, linesz:32 ,total:32768
  451.  
  452. ##### The CPU freq = 880 MHZ ####
  453. estimate memory size =128 Mbytes
  454. #Reset_MT7530
  455. set LAN/WAN LLLLW
  456.  
  457. Please choose the operation:
  458.   1: Load system code to SDRAM via TFTP.
  459.   2: Load system code then write to Flash via TFTP.
  460.   3: Boot system code via Flash (default).
  461.   4: Entr boot command line interface.
  462.   6: System Enter UBoot to Update Img or Bin.
  463.   7: Load Boot Loader code then write to Flash via Serial.
  464.   9: Load Boot Loader code then write to Flash via TFTP.
  465. default: 3
  466.  
  467. You choosed 2
  468.  
  469. 0
  470.  
  471.  
  472. 2: System Load Linux Kernel then write to Flash via TFTP.
  473. Warning!! Erase Linux in Flash then burn new one. Are you sure?(Y/N)
  474. Please Input new ones /or Ctrl-C to discard
  475.        Input device IP (192.168.1.1) ==:192.168.1.1
  476.        Input server IP (192.168.1.101) ==:192.168.1.101
  477.        Input Linux Kernel filename (aligned.uimage) ==:aligned.uimage
  478.  
  479. NetTxPacket = 0x87FE4D00
  480.  
  481. KSEG1ADDR(NetTxPacket) = 0xA7FE4D00
  482.  
  483. NetLoop,call eth_halt !
  484.  
  485. NetLoop,call eth_init !
  486. Trying Eth0 (10/100-M)
  487.  
  488. Waitting for RX_DMA_BUSY status Start... done
  489.  
  490.  
  491. ETH_STATE_ACTIVE!!
  492. TFTP from server 192.168.1.101; our IP address is 192.168.1.1
  493. Filename 'aligned.uimage'.
  494.  
  495. TIMEOUT_COUNT=10,Load address: 0x84000000
  496. Loading: Got ARP REQUEST, return our IP
  497. Got ARP REQUEST, return our IP
  498. Got ARP REPLY, set server/gtwy eth addr (40:6c:8f:b8:c9:d2)
  499. Got it
  500. #################################################################
  501.         #################################################################
  502.         #################################################################
  503.         #################################################################
  504.         #################################################################
  505.         #################################################################
  506.         #################################################################
  507.         #################################################################
  508.         #################################################################
  509.         #################################################################
  510.         #################################################################
  511.         #################################################################
  512.         #################################################################
  513.         #################################################################
  514.         #################################################################
  515.         #################################################################
  516.         #################################################################
  517.         #################################################################
  518.         #################################################################
  519.         #################################################################
  520.         #################################################################
  521.         #################################################################
  522.         #################################################################
  523.         #################################################################
  524.         #################################################################
  525.         #################################################################
  526.         #################################################################
  527.         #################################################################
  528.         #################################################################
  529.         #################################################################
  530.         #################################################################
  531.         #################################################################
  532.         #################################################################
  533.         #################################################################
  534.         #################################################################
  535.         #################################################################
  536.         #################################################################
  537.         #################################################################
  538.         #################################################################
  539.         #################################################################
  540.         #################################################################
  541.         #################################################################
  542.         #################################################################
  543.         #################################################################
  544.         #################################################################
  545.         #################################################################
  546.         #################################################################
  547.         ###############################
  548. done
  549. Bytes transferred = 15799073 (f11321 hex)
  550. LoadAddr=84000000 NetBootFileXferSize= 00f11321
  551. .................................................................................................................................................................................................................................................
  552. .................................................................................................................................................................................................................................................
  553. .
  554. .
  555. Done!
  556. ## Booting image at bc060000 ...
  557.   Image Name:  
  558.   Image Type:   MIPS Linux Kernel Image (lzma compressed)
  559.   Data Size:    3585388 Bytes =  3.4 MB
  560.   Load Address: 80001000
  561.   Entry Point:  806d71fc
  562.   Verifying Checksum ... OK
  563.   Uncompressing Kernel Image ... OK
  564. No initrd
  565. ## Transferring control to Linux (at address 806d71fc) ...
  566. ## Giving linux memsize in MB, 128
  567.  
  568. Starting kernel ...
  569.  
  570. Linux version 4.14.69 (Gagan@GagansMacPro) (gcc version 8.2.0 (GCC)) #2223 SMP PREEMPT Wed Sep 12 14:03:39 MDT 2018
  571. SoC Type: MediaTek MT7621 ver:1 eco:3
  572. bootconsole [early0] enabled
  573. CPU0 revision is: 0001992f (MIPS 1004Kc)
  574. MIPS: machine is D-Link DIR-882 rev. A1
  575. Determined physical RAM map:
  576. memory: 08000000 @ 00000000 (usable)
  577. VPE topology {2,2} total 4
  578. Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
  579. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
  580. MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
  581. Zone ranges:
  582.  DMA      [mem 0x0000000000000000-0x0000000000ffffff]
  583.  Normal   [mem 0x0000000001000000-0x0000000007ffffff]
  584.  HighMem  empty
  585. Movable zone start for each node
  586. Early memory node ranges
  587.  node   0: [mem 0x0000000000000000-0x0000000007ffffff]
  588. Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff]
  589. percpu: Embedded 15 pages/cpu @8110e000 s31536 r8192 d21712 u61440
  590. Built 1 zonelists, mobility grouping on.  Total pages: 32512
  591. Kernel command line: console=ttyS0,57600n8 rootfstype=squashfs root=/dev/mtdblock5
  592. log_buf_len individual max cpu contribution: 4096 bytes
  593. log_buf_len total cpu_extra contributions: 12288 bytes
  594. log_buf_len min size: 16384 bytes
  595. log_buf_len: 32768 bytes
  596. early log buf free: 14184(86%)
  597. PID hash table entries: 512 (order: -1, 2048 bytes)
  598. Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
  599. Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
  600. Writing ErrCtl register=0006260f
  601. Readback ErrCtl register=0006260f
  602. Memory: 118988K/131072K available (7034K kernel code, 968K rwdata, 1448K rodata, 264K init, 873K bss, 12084K reserved, 0K cma-reserved, 0K highmem)
  603. SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
  604. Preemptible hierarchical RCU implementation.
  605.        Tasks RCU enabled.
  606. NR_IRQS: 256
  607. clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
  608. sched_clock: 32 bits at 250 Hz, resolution 4000000ns, wraps every 8589934590000000ns
  609. Calibrating delay loop... 583.68 BogoMIPS (lpj=1167360)
  610. pid_max: default: 4096 minimum: 301
  611. Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
  612. Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
  613. Hierarchical SRCU implementation.
  614. smp: Bringing up secondary CPUs ...
  615. Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
  616. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
  617. MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
  618. CPU1 revision is: 0001992f (MIPS 1004Kc)
  619. Synchronize counters for CPU 1: done.
  620. Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
  621. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
  622. MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
  623. CPU2 revision is: 0001992f (MIPS 1004Kc)
  624. Synchronize counters for CPU 2: done.
  625. Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
  626. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
  627. MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
  628. CPU3 revision is: 0001992f (MIPS 1004Kc)
  629. Synchronize counters for CPU 3: done.
  630. smp: Brought up 1 node, 4 CPUs
  631. devtmpfs: initialized
  632. random: get_random_u32 called from bucket_table_alloc+0x2b8/0x36c with crng_init=0
  633. clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
  634. futex hash table entries: 16 (order: -3, 512 bytes)
  635. pinctrl core: initialized pinctrl subsystem
  636. NET: Registered protocol family 16
  637. pull PCIe RST: RALINK_RSTCTRL = 4000000
  638. release PCIe RST: RALINK_RSTCTRL = 7000000
  639. ***** Xtal 40MHz *****
  640. release PCIe RST: RALINK_RSTCTRL = 7000000
  641. Port 0 N_FTS = 1b102800
  642. Port 1 N_FTS = 1b102800
  643. Port 2 N_FTS = 1b102800
  644. PCIE2 no card, disable it(RST&CLK)
  645. -> 21007f2
  646. PCIE0 enabled
  647. PCIE1 enabled
  648. PCI host bridge /pcie@1e140000 ranges:
  649. MEM 0x0000000060000000..0x000000006fffffff
  650.  IO 0x000000001e160000..0x000000001e16ffff
  651. PCI coherence region base: 0x87c3dce0, mask/settings: 0x60000000
  652. mt7621_gpio 1e000600.gpio: registering 32 gpios
  653. mt7621_gpio 1e000600.gpio: registering 32 gpios
  654. mt7621_gpio 1e000600.gpio: registering 32 gpios
  655. vgaarb: loaded
  656. SCSI subsystem initialized
  657. USB led has gpio 14
  658. USB led has gpio 13
  659. usbcore: registered new interface driver usbfs
  660. usbcore: registered new interface driver hub
  661. usbcore: registered new device driver usb
  662. i2c-mt7621 1e000900.i2c: clock 100KHz, re-start not support
  663. PCI host bridge to bus 0000:00
  664. pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
  665. pci_bus 0000:00: root bus resource [io  0xffffffff]
  666. pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
  667. pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
  668. pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
  669. pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
  670. pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
  671. pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
  672. pci 0000:00:01.0: BAR 0: no space for [mem size 0x80000000]
  673. pci 0000:00:01.0: BAR 0: failed to assign [mem size 0x80000000]
  674. pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
  675. pci 0000:00:01.0: BAR 8: assigned [mem 0x60100000-0x601fffff]
  676. pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff]
  677. pci 0000:00:01.0: BAR 1: assigned [mem 0x60210000-0x6021ffff]
  678. pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
  679. pci 0000:00:00.0: PCI bridge to [bus 01]
  680. pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
  681. pci 0000:02:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff 64bit]
  682. pci 0000:00:01.0: PCI bridge to [bus 02]
  683. pci 0000:00:01.0:   bridge window [mem 0x60100000-0x601fffff]
  684. clocksource: Switched to clocksource GIC
  685. NET: Registered protocol family 2
  686. TCP established hash table entries: 1024 (order: 0, 4096 bytes)
  687. TCP bind hash table entries: 1024 (order: 1, 8192 bytes)
  688. TCP: Hash tables configured (established 1024 bind 1024)
  689. UDP hash table entries: 128 (order: 0, 4096 bytes)
  690. UDP-Lite hash table entries: 128 (order: 0, 4096 bytes)
  691. NET: Registered protocol family 1
  692. Load Ralink Timer0 Module
  693. workingset: timestamp_bits=30 max_order=15 bucket_order=0
  694. squashfs: version 4.0 (2009/01/31) Phillip Lougher
  695. io scheduler noop registered (default)
  696. io scheduler deadline registered
  697. io scheduler mq-deadline registered
  698. io scheduler kyber registered
  699. mtk_hsdma 1e007000.hsdma: Using 3 as missing dma-requests property
  700. mtk_hsdma 1e007000.hsdma: MediaTek HSDMA driver registered
  701. random: fast init done
  702. serial8250_init
  703. Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
  704. console [ttyS0] disabled
  705. 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 18, base_baud = 3125000) is a 16550A
  706. console [ttyS0] enabled
  707. console [ttyS0] enabled
  708. bootconsole [early0] disabled
  709. bootconsole [early0] disabled
  710. Ralink gpio driver initialized:power_gpio[8]
  711. cacheinfo: Unable to detect cache hierarchy for CPU 0
  712. physmap platform flash device: 01000000 at 1c000000
  713. virtual memory bc000000
  714. physmap-flash physmap-flash.0: map_probe failed
  715. flash manufacture id: c2, device id 20 18
  716. MX25L12805D(c2 2018c220) (16384 Kbytes)
  717. mtd .name = raspi, .size = 0x01000000 (16M) .erasesize = 0x00010000 (64K) .numeraseregions = 0
  718. Creating 6 MTD partitions on "raspi":
  719. 0x000000000000-0x000000030000 : "Bootloader"
  720. 0x000000030000-0x000000040000 : "Config"
  721. 0x000000040000-0x000000050000 : "Factory"
  722. 0x000000050000-0x000000060000 : "Config2"
  723. 0x000000060000-0x000001000000 : "sysv"
  724. scan from offset 60000
  725.  
  726. found squashfs at 3CC000
  727. 0x0000003cc000-0x00000136c000 : "rootfs"
  728. mtd: partition "rootfs" extends beyond the end of device "raspi" -- size truncated to 0xc34000
  729. mtd: device 5 (rootfs) set to be root filesystem
  730. libphy: Fixed MDIO Bus: probed
  731. tun: Universal TUN/TAP device driver, 1.6
  732. netif_napi_add() called with weight 128 on device eth%d
  733. mtk_soc_eth 1e100000.ethernet: generated random MAC address 06:c5:c2:2d:64:c6
  734. libphy: mdio: probed
  735. mtk_soc_eth 1e100000.ethernet: loaded mt7530 driver
  736. mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21
  737. PPP generic driver version 2.4.2
  738. PPP BSD Compression module registered
  739. PPP Deflate Compression module registered
  740. PPP MPPE Compression module registered
  741. NET: Registered protocol family 24
  742. register mt_drv
  743. bus=0x1, slot = 0x0, irq=0x0
  744. PCI: Enabling device 0000:00:00.0 (0004 -> 0006)
  745.  
  746.  
  747. === pAd = c0101000, size = 3649360 ===
  748.  
  749. <-- RTMPAllocAdapterBlock, Status=0
  750. pAd->PciHif.CSRBaseAddress =0xc0000000, csr_addr=0xc0000000!
  751. RTMPInitPCIeDevice():device_id=0x7615
  752. DriverOwn()::Try to Clear FW Own...
  753. DriverOwn()::Success to clear FW Own
  754. mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615
  755. mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001
  756. RtmpChipOpsHook(493): Not support for HIF_MT yet! MACVersion=0x0
  757. mt7615_init()-->
  758. Use 1st iPAiLNA default bin.
  759. Use 0st /etc/wlan/MT7615_2G_cal_MT.bin default bin.
  760. <--mt7615_init()
  761. ChipOpsMCUHook
  762. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  763. cut_through_token_list_init(): 876d2f08,876d2f08
  764. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  765. cut_through_token_list_init(): 876d2f18,876d2f18
  766. <-- RTMPAllocTxRxRingMemory, Status=0
  767. [MTWF][mesh_module_init]: init hook functions.
  768. bus=0x2, slot = 0x1, irq=0x0
  769. PCI: Enabling device 0000:00:01.0 (0004 -> 0006)
  770.  
  771.  
  772. === pAd = c0581000, size = 3649360 ===
  773.  
  774. <-- RTMPAllocAdapterBlock, Status=0
  775. pAd->PciHif.CSRBaseAddress =0xc0480000, csr_addr=0xc0480000!
  776. RTMPInitPCIeDevice():device_id=0x7615
  777. DriverOwn()::Try to Clear FW Own...
  778. DriverOwn()::Success to clear FW Own
  779. mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615
  780. mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001
  781. RtmpChipOpsHook(493): Not support for HIF_MT yet! MACVersion=0x0
  782. mt7615_init()-->
  783. Use 2nd iPAiLNA default bin.
  784. Use 1st /etc/wlan/MT7615_5G_cal_MT.bin default bin.
  785. <--mt7615_init()
  786. ChipOpsMCUHook
  787. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  788. cut_through_token_list_init(): 86c6c808,86c6c808
  789. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  790. cut_through_token_list_init(): 86c6c818,86c6c818
  791. <-- RTMPAllocTxRxRingMemory, Status=0
  792. rdm_major = 255
  793. xhci-mtk 1e1c0000.xhci: xHCI Host Controller
  794. xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 1
  795. xhci-mtk 1e1c0000.xhci: hcc params 0x01401198 hci version 0x96 quirks 0x00210010
  796. xhci-mtk 1e1c0000.xhci: irq 20, io mem 0x1e1c0000
  797. hub 1-0:1.0: USB hub found
  798. hub 1-0:1.0: 2 ports detected
  799. xhci-mtk 1e1c0000.xhci: xHCI Host Controller
  800. xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 2
  801. xhci-mtk 1e1c0000.xhci: Host supports USB 3.0  SuperSpeed
  802. usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
  803. hub 2-0:1.0: USB hub found
  804. hub 2-0:1.0: 1 port detected
  805. usbcore: registered new interface driver usb-storage
  806. rtc-pcf8563 0-0051: rtc core: registered rtc-pcf8563 as rtc0
  807. i2c /dev entries driver
  808. Ralink APSoC Hardware Watchdog Timer
  809. Enable MTK AesEngine Module (verson=00000401)
  810. reg_int_mask = 0,          INT_MASK = 0
  811. phy_tx_ring0 = 0x00c00000, tx_ring0 = 0xa0c00000
  812. phy_rx_ring0 = 0x00c01000, rx_ring0 = 0xa0c01000
  813. TX_CTX_IDX0 = 0,           TX_DTX_IDX0 = 0
  814. RX_CRX_IDX0 = 0,           RX_DRX_IDX0 = 800080
  815. set burstmode = 00,        AES_GLO_CFG = 0
  816. Registering MediaTek AES-cbc engine to kernel
  817. Registering MediaTek AES engine to kernel
  818. usbcore: registered new interface driver usbhid
  819. usbhid: USB HID core driver
  820. u32 classifier
  821.     Performance counters on
  822.     Actions configured
  823. Netfilter messages via NETLINK v0.30.
  824. nf_conntrack version 0.5.0 (2048 buckets, 8192 max)
  825. ctnetlink v0.93: registering with nfnetlink.
  826. ipip: IPv4 and MPLS over IPv4 tunneling driver
  827. ip_tables: (C) 2000-2006 Netfilter Core Team
  828. ipt_CLUSTERIP: ClusterIP Version 0.8 loaded successfully
  829. NET: Registered protocol family 17
  830. Bridge firewalling registered
  831. NET4: DECnet for Linux: V.2.5.68s (C) 1995-2003 Linux DECnet Project Team
  832. DECnet: Routing cache hash table of 512 buckets, 4Kbytes
  833. NET: Registered protocol family 12
  834. 8021q: 802.1Q VLAN Support v1.8
  835. Key type dns_resolver registered
  836. nvram driver (major 251) installed
  837. rtc-pcf8563 0-0051: hctosys: unable to read the hardware clock
  838. VFS: Mounted root (squashfs filesystem) readonly on device 31:5.
  839. devtmpfs: mounted
  840. Freeing unused kernel memory: 264K
  841. This architecture does not have kernel memory protection.
  842. mtk_soc_eth 1e100000.ethernet eth0: port 3 link up
  843. usb 2-1: new SuperSpeed USB device number 2 using xhci-mtk
  844. usb-storage 2-1:1.0: USB Mass Storage device detected
  845. scsi host0: usb-storage 2-1:1.0
  846. scsi 0:0:0:0: Direct-Access     SanDisk  Extreme          0001 PQ: 0 ANSI: 6
  847. sd 0:0:0:0: [sda] 122552320 512-byte logical blocks: (62.7 GB/58.4 GiB)
  848. start service
  849. sd 0:0:0:0: [sda] Write Protect is off
  850. starting Architesd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
  851. cture code for rt2880
  852. sda: sda1 sda2 sda3
  853. sd 0:0:0:0: [sda] Attached SCSI removable disk
  854. start MSTP Daemon
  855. 1970-01-01 00:00:10 main: Version - 0.0.6-7628920
  856.  
  857. 1970-01-01 00:00:10 main: Sanity checks succeeded
  858. done
  859. Started WatchDog Timer.
  860. configure mac address to xx:xx:xx:xx:xx:xx
  861. mtk_soc_eth 1e100000.ethernet: PPE started
  862. Set name-type for VLAN subsystem. Should be visible in /proc/net/vlan/config
  863. Added VLAN with VID == 1 to IF -:eth0:-
  864. WARNING:  VLAN 1 does not work with many switches,
  865. consider another number if you have problems.
  866. Added VLAN with VID == 2 to IF -:eth0:-
  867. [USB] checking...
  868. umount: /mnt: no mount point specified.
  869. cannot open /proc/sys/net/ipv4/ip_conntrack_max
  870. cannot open /proc/sys/net/ipv4/netfilter/ip_conntrack_max
  871. cannot open /proc/sys/net/ipv4/netfilter/ip_conntrack_tcp_timeout_established
  872. cannot open /proc/sys/net/ipv4/netfilter/ip_conntrack_udp_timeout
  873. cannot open /proc/sys/net/ipv4/ip_conntrack_max
  874. cannot open /proc/sys/net/ipv4/netfilter/ip_conntrack_max
  875. cannot open /proc/sys/net/ipv4/netfilter/ip_conntrack_tcp_timeout_established
  876. cannot open /proc/sys/net/ipv4/netfilter/ip_conntrack_udp_timeout
  877. Unknown server error
  878. ifconfig: `--help' gives usage information.
  879. device br0 entered promiscuous mode
  880. br0: port 1(vlan1) entered blocking state
  881. br0: port 1(vlan1) entered disabled state
  882. device vlan1 entered promiscuous mode
  883. device eth0 entered promiscuous mode
  884. DriverOwn()::Return since already in Driver Own...
  885. APWdsInitialize():WdsEntry[0]
  886. APWdsInitialize():WdsEntry[1]
  887. APWdsInitialize():WdsEntry[2]
  888. APWdsInitialize():WdsEntry[3]
  889. APWdsInitialize():WdsEntry[4]
  890. APWdsInitialize():WdsEntry[5]
  891. APWdsInitialize():WdsEntry[6]
  892. APWdsInitialize():WdsEntry[7]
  893. APWdsInitialize():WdsEntry[8]
  894. APWdsInitialize():WdsEntry[9]
  895. RtmpOSFileOpen(): Error 2 opening /etc/Wireless/RT2860/RT2860_5G.dat
  896. Open file "/etc/Wireless/RT2860/RT2860_5G.dat" failed!
  897. RtmpOSFileOpen(): Error 2 opening /tmp/RT2860.dat
  898. Open file "/tmp/RT2860.dat" failed!
  899. RTMPReadParametersHook failed, Status[=0x00000001]
  900. <---HwCtrlThread
  901. !!! mt_wifi_init  fail !!!
  902. DriverOwn()::Return since already in Driver Own...
  903. APWdsInitialize():WdsEntry[0]
  904. APWdsInitialize():WdsEntry[1]
  905. APWdsInitialize():WdsEntry[2]
  906. APWdsInitialize():WdsEntry[3]
  907. APWdsInitialize():WdsEntry[4]
  908. APWdsInitialize():WdsEntry[5]
  909. APWdsInitialize():WdsEntry[6]
  910. APWdsInitialize():WdsEntry[7]
  911. APWdsInitialize():WdsEntry[8]
  912. APWdsInitialize():WdsEntry[9]
  913. RtmpOSFileOpen(): Error 2 opening /etc/Wireless/iNIC/iNIC_ap_5G.dat
  914. Open file "/etc/Wireless/iNIC/iNIC_ap_5G.dat" failed!
  915. RtmpOSFileOpen(): Error 2 opening /tmp/RT2860_pci.dat
  916. Open file "/tmp/RT2860_pci.dat" failed!
  917. RTMPReadParametersHook failed, Status[=0x00000001]
  918. <---HwCtrlThread
  919. !!! mt_wifi_init  fail !!!
  920. br0: port 1(vlan1) entered blocking state
  921. br0: port 1(vlan1) entered forwarding state
  922. device br0 left promiscuous mode
  923. device br0 entered promiscuous mode
  924. SIOCSIFFLAGS: Cannot assign requested address
  925. device br0 left promiscuous mode
  926. ra1: ERROR while getting interface flags: No such device
  927. ra2: ERROR while getting interface flags: No such device
  928. ra3: ERROR while getting interface flags: No such device
  929. ra4: ERROR while getting interface flags: No such device
  930. ra5: ERROR while getting interface flags: No such device
  931. ra6: ERROR while getting interface flags: No such device
  932. ra7: ERROR while getting interface flags: No such device
  933. wds0: ERROR while getting interface flags: No such device
  934. wds1: ERROR while getting interface flags: No such device
  935. wds2: ERROR while getting interface flags: No such device
  936. wds3: ERROR while getting interface flags: No such device
  937. wds4: ERROR while getting interface flags: No such device
  938. wds5: ERROR while getting interface flags: No such device
  939. wds6: ERROR while getting interface flags: No such device
  940. wds7: ERROR while getting interface flags: No such device
  941. wds8: ERROR while getting interface flags: No such device
  942. wds9: ERROR while getting interface flags: No such device
  943. apcli0: ERROR while getting interface flags: No such device
  944. Interface doesn't accept private ioctl...
  945. set (8BE2): Network is down
  946. ba1: ERROR while getting interface flags: No such device
  947. ba2: ERROR while getting interface flags: No such device
  948. ba3: ERROR while getting interface flags: No such device
  949. ba4: ERROR while getting interface flags: No such device
  950. ba5: ERROR while getting interface flags: No such device
  951. ba6: ERROR while getting interface flags: No such device
  952. ba7: ERROR while getting interface flags: No such device
  953. wdsi0: ERROR while getting interface flags: No such device
  954. wdsi1: ERROR while getting interface flags: No such device
  955. wdsi2: ERROR while getting interface flags: No such device
  956. wdsi3: ERROR while getting interface flags: No such device
  957. wdsi4: ERROR while getting interface flags: No such device
  958. wdsi5: ERROR while getting interface flags: No such device
  959. wdsi6: ERROR while getting interface flags: No such device
  960. wdsi7: ERROR while getting interface flags: No such device
  961. wdsi8: ERROR while getting interface flags: No such device
  962. wdsi9: ERROR while getting interface flags: No such device
  963. apclii0: ERROR while getting interface flags: No such device
  964. Interface doesn't accept private ioctl...
  965. set (8BE2): Network is down
  966. DriverOwn()::Return since already in Driver Own...
  967. APWdsInitialize():WdsEntry[0]
  968. APWdsInitialize():WdsEntry[1]
  969. APWdsInitialize():WdsEntry[2]
  970. APWdsInitialize():WdsEntry[3]
  971. APWdsInitialize():WdsEntry[4]
  972. APWdsInitialize():WdsEntry[5]
  973. APWdsInitialize():WdsEntry[6]
  974. APWdsInitialize():WdsEntry[7]
  975. APWdsInitialize():WdsEntry[8]
  976. APWdsInitialize():WdsEntry[9]
  977. RtmpOSFileOpen(): Error 2 opening /etc/Wireless/RT2860/RT2860_5G.dat
  978. Open file "/etc/Wireless/RT2860/RT2860_5G.dat" failed!
  979. E2pAccessMode=2
  980. SSID[0]=AGT1337-2.4G, EdcaIdx=0
  981. cfg_mode=7
  982. cfg_mode=7
  983. wmode_band_equal(): Band Equal!
  984. [TxPower] BAND0: 100
  985. APEdca0
  986. APEdca1
  987. APEdca2
  988. APEdca3
  989. [RTMPSetProfileParameters]Disable DFS/Zero wait=0/0
  990. rtmp_read_wds_from_file(): WDS Profile
  991. APWdsInitialize():WdsEntry[0]
  992. APWdsInitialize():WdsEntry[1]
  993. APWdsInitialize():WdsEntry[2]
  994. APWdsInitialize():WdsEntry[3]
  995. APWdsInitialize():WdsEntry[4]
  996. APWdsInitialize():WdsEntry[5]
  997. APWdsInitialize():WdsEntry[6]
  998. APWdsInitialize():WdsEntry[7]
  999. APWdsInitialize():WdsEntry[8]
  1000. APWdsInitialize():WdsEntry[9]
  1001. WDS-Enable mode=0
  1002. HT: WDEV[0] Ext Channel = ABOVE
  1003. WtcSetMaxStaNum: MaxStaNum:81, BssidNum:1, WdsNum:10, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
  1004. Top Init Done!
  1005. Use alloc_skb
  1006. RX[0] DESC a7068000 size = 16384
  1007. RX[1] DESC a7066000 size = 8192
  1008. Hif Init Done!
  1009. ctl->txq = c0476e94
  1010. ctl->rxq = c0476ea0
  1011. ctl->ackq = c0476eac
  1012. ctl->kickq = c0476eb8
  1013. ctl->tx_doneq = c0476ec4
  1014. ctl->rx_doneq = c0476ed0
  1015. mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
  1016. mt7615_fw_prepare(2687): MT7615_E3, USE E3 patch and ram code binary image
  1017. AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(11102)
  1018. AndesRestartCheck: Current TOP_MISC2(0x1)
  1019. AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
  1020. 2
  1021. 0
  1022. 1
  1023. 7
  1024. 0
  1025. 8
  1026. 0
  1027. 9
  1028. 1
  1029. 9
  1030. 2
  1031. 7
  1032. 1
  1033. 8
  1034. a
  1035.  
  1036.  
  1037. platform =
  1038. A
  1039. L
  1040. P
  1041. S
  1042.  
  1043. hw/sw version =
  1044. 8a
  1045. 10
  1046. 8a
  1047. 10
  1048.  
  1049. patch version =
  1050. 00
  1051. 00
  1052. 00
  1053. 10
  1054.  
  1055. Patch SEM Status=2
  1056. MtCmdPatchSemGet:(ret = 0)
  1057.  
  1058. Patch is not ready && get semaphore success, SemStatus(2)
  1059. EventGenericEventHandler: CMD Success
  1060. MtCmdAddressLenReq:(ret = 0)
  1061. MtCmdPatchFinishReq
  1062. EventGenericEventHandler: CMD Success
  1063. Send checksum req..
  1064. Patch SEM Status=3
  1065. MtCmdPatchSemGet:(ret = 0)
  1066.  
  1067. Release patch semaphore, SemStatus(3)
  1068. AndesMTEraseRomPatch
  1069. WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
  1070. AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(462248)
  1071. Build Date:
  1072. _
  1073. 2
  1074. 0
  1075. 1
  1076. 7
  1077. 0
  1078. 8
  1079. 1
  1080. 9
  1081. 0
  1082. 3
  1083. 4
  1084. 6
  1085.  
  1086. Build Date:
  1087. _
  1088. 2
  1089. 0
  1090. 1
  1091. 7
  1092. 0
  1093. 8
  1094. 1
  1095. 9
  1096. 0
  1097. 3
  1098. 4
  1099. 6
  1100.  
  1101. AndesRestartCheck: Current TOP_MISC2(0x1)
  1102. AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
  1103. EventGenericEventHandler: CMD Success
  1104. MtCmdAddressLenReq:(ret = 0)
  1105. EventGenericEventHandler: CMD Success
  1106. MtCmdAddressLenReq:(ret = 0)
  1107. MtCmdFwStartReq: override = 1, address = 540672
  1108. EventGenericEventHandler: CMD Success
  1109. Build Date:
  1110. _
  1111. 2
  1112. 0
  1113. 1
  1114. 7
  1115. 0
  1116. 7
  1117. 2
  1118. 1
  1119. 1
  1120. 5
  1121. 2
  1122. 4
  1123.  
  1124. EventGenericEventHandler: CMD Success
  1125. MtCmdAddressLenReq:(ret = 0)
  1126. MtCmdFwStartReq: override = 4, address = 0
  1127. EventGenericEventHandler: CMD Success
  1128. WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
  1129. MCU Init Done!
  1130. efuse_probe: efuse = 10000212
  1131. RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
  1132. RtmpEepromGetDefault::e2p_dafault=1
  1133. RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
  1134. NVM is FLASH mode. dev_idx [0] FLASH OFFSET [0x0]
  1135. NICReadEEPROMParameters: EEPROM 0x52 b313
  1136. NICReadEEPROMParameters: EEPROM 0x52 b313
  1137. Country Region from e2p = 101
  1138. mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
  1139. mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2
  1140. mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2
  1141. rtmp_read_txpwr_from_eeprom(233): Don't Support this now!
  1142. RTMPReadTxPwrPerRate(1381): Don't Support this now!
  1143. RcRadioInit(): DbdcMode=0, ConcurrentBand=1
  1144. RcRadioInit(): pRadioCtrl=87d8c454,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf
  1145. MtCmdSetDbdcCtrl:(ret = 0)
  1146. Band Rf: 1, Phy Mode: 2
  1147. AntCfgInit(2766): Not support for HIF_MT yet!
  1148. MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
  1149. MtSingleSkuLoadParam: SINGLE SKU TABLE FILE /etc/Wireless/RT2860AP/SingleSKU_24G_IC.dat!!!
  1150. MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
  1151. MtBfBackOffLoadTable: BF SKU TABLE FILE /etc/Wireless/RT2860AP/SKU_24G_IC_BF.dat!!!
  1152. EEPROM Init Done!
  1153. mt_mac_init()-->
  1154. mt_mac_pse_init(2750): Don't Support this now!
  1155. mt7615_init_mac_cr()-->
  1156. mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
  1157. mt7615_init_mac_cr(): TMAC_TRCR1=0x82783c8c
  1158. MtAsicSetMacMaxLen(1300): Not finish Yet!
  1159. <--mt_mac_init()
  1160. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  1161. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  1162. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  1163. MAC Init Done!
  1164. MT7615BBPInit():BBP Initialization.....
  1165.        Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2
  1166.        Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0
  1167. MT7615BBPInit() todo
  1168. PHY Init Done!
  1169. tx_pwr_comp_init():NotSupportYet!
  1170. MtCmdSetMacTxRx:(ret = 0)
  1171. CountryCode(2.4G/5G)=5/7, RFIC=25, PHY mode(2.4G/5G)=12/12, support 14 channels
  1172. ApAutoChannelAtBootUp----------------->
  1173. ApAutoChannelAtBootUp: AutoChannelBootup = 1, AutoChannelFlag = 1
  1174. MtCmdSetMacTxRx:(ret = 0)
  1175. mt7615_apply_dcoc() : reload Central CH [1] BW [0] from cetral freq [2417]  offset [2200]
  1176. MtCmdGetRXDCOCCalResult:(ret = 0)
  1177. mt7615_apply_dpd() : reload Central CH [1] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1178. MtCmdGetTXDPDCalResult:(ret = 0)
  1179. MtCmdChannelSwitch: control_chl = 1,control_ch2=0, central_chl = 1 DBDCIdx= 0, Band= 0
  1180. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1181. mt7615_apply_dcoc() : reload Central CH [2] BW [0] from cetral freq [2417]  offset [2200]
  1182. MtCmdGetRXDCOCCalResult:(ret = 0)
  1183. mt7615_apply_dpd() : reload Central CH [2] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1184. MtCmdGetTXDPDCalResult:(ret = 0)
  1185. MtCmdChannelSwitch: control_chl = 2,control_ch2=0, central_chl = 2 DBDCIdx= 0, Band= 0
  1186. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1187. mt7615_apply_dcoc() : reload Central CH [3] BW [0] from cetral freq [2417]  offset [2200]
  1188. MtCmdGetRXDCOCCalResult:(ret = 0)
  1189. mt7615_apply_dpd() : reload Central CH [3] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1190. MtCmdGetTXDPDCalResult:(ret = 0)
  1191. MtCmdChannelSwitch: control_chl = 3,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0
  1192. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1193. mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432]  offset [2300]
  1194. MtCmdGetRXDCOCCalResult:(ret = 0)
  1195. mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1196. MtCmdGetTXDPDCalResult:(ret = 0)
  1197. MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0
  1198. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1199. mt7615_apply_dcoc() : reload Central CH [5] BW [0] from cetral freq [2432]  offset [2300]
  1200. MtCmdGetRXDCOCCalResult:(ret = 0)
  1201. mt7615_apply_dpd() : reload Central CH [5] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  1202. MtCmdGetTXDPDCalResult:(ret = 0)
  1203. MtCmdChannelSwitch: control_chl = 5,control_ch2=0, central_chl = 5 DBDCIdx= 0, Band= 0
  1204. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1205. mt7615_apply_dcoc() : reload Central CH [6] BW [0] from cetral freq [2432]  offset [2300]
  1206. MtCmdGetRXDCOCCalResult:(ret = 0)
  1207. mt7615_apply_dpd() : reload Central CH [6] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  1208. MtCmdGetTXDPDCalResult:(ret = 0)
  1209. MtCmdChannelSwitch: control_chl = 6,control_ch2=0, central_chl = 6 DBDCIdx= 0, Band= 0
  1210. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1211. mt7615_apply_dcoc() : reload Central CH [7] BW [0] from cetral freq [2447]  offset [2400]
  1212. MtCmdGetRXDCOCCalResult:(ret = 0)
  1213. mt7615_apply_dpd() : reload Central CH [7] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  1214. MtCmdGetTXDPDCalResult:(ret = 0)
  1215. MtCmdChannelSwitch: control_chl = 7,control_ch2=0, central_chl = 7 DBDCIdx= 0, Band= 0
  1216. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1217. mt7615_apply_dcoc() : reload Central CH [8] BW [0] from cetral freq [2447]  offset [2400]
  1218. MtCmdGetRXDCOCCalResult:(ret = 0)
  1219. mt7615_apply_dpd() : reload Central CH [8] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  1220. MtCmdGetTXDPDCalResult:(ret = 0)
  1221. MtCmdChannelSwitch: control_chl = 8,control_ch2=0, central_chl = 8 DBDCIdx= 0, Band= 0
  1222. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1223. mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400]
  1224. MtCmdGetRXDCOCCalResult:(ret = 0)
  1225. mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  1226. MtCmdGetTXDPDCalResult:(ret = 0)
  1227. MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0
  1228. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1229. mt7615_apply_dcoc() : reload Central CH [10] BW [0] from cetral freq [2467]  offset [2500]
  1230. MtCmdGetRXDCOCCalResult:(ret = 0)
  1231. mt7615_apply_dpd() : reload Central CH [10] BW [0] from cetral freq [2462] i[46] offset [4cd0]
  1232. MtCmdGetTXDPDCalResult:(ret = 0)
  1233. MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0
  1234. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1235. mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467]  offset [2500]
  1236. MtCmdGetRXDCOCCalResult:(ret = 0)
  1237. mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0]
  1238. MtCmdGetTXDPDCalResult:(ret = 0)
  1239. MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0
  1240. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1241. mt7615_apply_dcoc() : reload Central CH [12] BW [0] from cetral freq [2467]  offset [2500]
  1242. MtCmdGetRXDCOCCalResult:(ret = 0)
  1243. mt7615_apply_dpd() : reload Central CH [12] BW [0] from cetral freq [2462] i[46] offset [4cd0]
  1244. MtCmdGetTXDPDCalResult:(ret = 0)
  1245. MtCmdChannelSwitch: control_chl = 12,control_ch2=0, central_chl = 12 DBDCIdx= 0, Band= 0
  1246. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1247. mt7615_apply_dcoc() : reload Central CH [13] BW [0] from cetral freq [2467]  offset [2500]
  1248. MtCmdGetRXDCOCCalResult:(ret = 0)
  1249. mt7615_apply_dpd() : reload Central CH [13] BW [0] from cetral freq [2462] i[46] offset [4cd0]
  1250. MtCmdGetTXDPDCalResult:(ret = 0)
  1251. MtCmdChannelSwitch: control_chl = 13,control_ch2=0, central_chl = 13 DBDCIdx= 0, Band= 0
  1252. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1253. ====================================================================
  1254. Channel   1 : Busy Time =  39449, Skip Channel = FALSE, BwCap = TRUE
  1255. Channel   2 : Busy Time =   9087, Skip Channel = FALSE, BwCap = TRUE
  1256. Channel   3 : Busy Time =  12673, Skip Channel = FALSE, BwCap = TRUE
  1257. Channel   4 : Busy Time =  10986, Skip Channel = FALSE, BwCap = TRUE
  1258. Channel   5 : Busy Time =  20112, Skip Channel = FALSE, BwCap = TRUE
  1259. Channel   6 : Busy Time =  46343, Skip Channel = FALSE, BwCap = TRUE
  1260. Channel   7 : Busy Time =  23919, Skip Channel = FALSE, BwCap = TRUE
  1261. Channel   8 : Busy Time =  25521, Skip Channel = FALSE, BwCap = TRUE
  1262. Channel   9 : Busy Time =  13966, Skip Channel = FALSE, BwCap = TRUE
  1263. Channel  10 : Busy Time =  19138, Skip Channel = FALSE, BwCap = TRUE
  1264. Channel  11 : Busy Time =  35273, Skip Channel = FALSE, BwCap = TRUE
  1265. Channel  12 : Busy Time =  12735, Skip Channel = FALSE, BwCap = TRUE
  1266. Channel  13 : Busy Time =   5026, Skip Channel = FALSE, BwCap = TRUE
  1267. ====================================================================
  1268. Rule 3 Channel Busy time value : Select Primary Channel 13
  1269. Rule 3 Channel Busy time value : Min Channel Busy = 5026
  1270. Rule 3 Channel Busy time value : BW = 20
  1271. AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 12,Channel = 13  
  1272. ApAutoChannelAtBootUp<-----------------
  1273. WifiSysOpen(), wdev idx = 0
  1274. wdev_attr_update(): wdevId0 = xx:xx:xx:xx:xx:xx
  1275. MtCmdSetDbdcCtrl:(ret = 0)
  1276. Current Channel is 13. DfsZeroWaitSupport=0
  1277. MtAsicSetChBusyStat(840): Not support for HIF_MT yet!
  1278. [PMF]APPMFInit:: apidx=0, MFPC=0, MFPR=0, SHA256=0
  1279. [PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
  1280. HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:12,Channel=13
  1281. RTMPSetPhyMode(): channel out of range, use first ch=1
  1282. Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
  1283. MtCmdSetMacTxRx:(ret = 0)
  1284. mt7615_apply_dcoc() : reload Central CH [1] BW [0] from cetral freq [2417]  offset [2200]
  1285. MtCmdGetRXDCOCCalResult:(ret = 0)
  1286. mt7615_apply_dpd() : reload Central CH [1] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1287. MtCmdGetTXDPDCalResult:(ret = 0)
  1288. MtCmdChannelSwitch: control_chl = 1,control_ch2=0, central_chl = 1 DBDCIdx= 0, Band= 0
  1289. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1290. AP OBSS SYNC - BBP R4 to 20MHz.l
  1291. mt7615_apply_dcoc() : reload Central CH [2] BW [0] from cetral freq [2417]  offset [2200]
  1292. MtCmdGetRXDCOCCalResult:(ret = 0)
  1293. mt7615_apply_dpd() : reload Central CH [2] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1294. MtCmdGetTXDPDCalResult:(ret = 0)
  1295. MtCmdChannelSwitch: control_chl = 2,control_ch2=0, central_chl = 2 DBDCIdx= 0, Band= 0
  1296. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1297. AP OBSS SYNC - BBP R4 to 20MHz.l
  1298. :MtCmdPktBudgetCtrl: bssid(255),wcid(65535),type(0)
  1299. mt7615_apply_dcoc() : reload Central CH [3] BW [0] from cetral freq [2417]  offset [2200]
  1300. MtCmdGetRXDCOCCalResult:(ret = 0)
  1301. mt7615_apply_dpd() : reload Central CH [3] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1302. MtCmdGetTXDPDCalResult:(ret = 0)
  1303. MtCmdChannelSwitch: control_chl = 3,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0
  1304. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1305. AP OBSS SYNC - BBP R4 to 20MHz.l
  1306. mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432]  offset [2300]
  1307. MtCmdGetRXDCOCCalResult:(ret = 0)
  1308. mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1309. MtCmdGetTXDPDCalResult:(ret = 0)
  1310. MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0
  1311. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1312. AP OBSS SYNC - BBP R4 to 20MHz.l
  1313. wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
  1314. LinkToOmacIdx = 0, LinkToWdevType = 1
  1315. bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 8192,                 CmdBssInfoBmcRate.u2McTransmit = 8196
  1316. [RadarStateCheck]Set into RD_NORMAL_MODE  
  1317. MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 0, BandIdx: 0
  1318. MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 0, BandIdx: 0
  1319. MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 0, BandIdx: 0
  1320. mt7615_bbp_adjust():rf_bw=0, ext_ch=0, PrimCh=1, HT-CentCh=1, VHT-CentCh=0
  1321. mt7615_apply_dcoc() : reload Central CH [1] BW [0] from cetral freq [2417]  offset [2200]
  1322. MtCmdGetRXDCOCCalResult:(ret = 0)
  1323. mt7615_apply_dpd() : reload Central CH [1] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1324. MtCmdGetTXDPDCalResult:(ret = 0)
  1325. MtCmdChannelSwitch: control_chl = 1,control_ch2=0, central_chl = 1 DBDCIdx= 0, Band= 0
  1326. BW = 0,TXStream = 4, RXStream = 4, scan(0)
  1327. ap_phy_rrm_init_byRf(): AP Set CentralFreq at 1(Prim=1, HT-CentCh=1, VHT-CentCh=0, BBP_BW=0)
  1328. LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
  1329. MtAsicSetRalinkBurstMode(2605): Not support for HIF_MT yet!
  1330. MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
  1331. MtAsicSetTxPreamble(2584): Not support for HIF_MT yet!
  1332. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=1, LED_CMD=2!
  1333. AndesLedEnhanceOP: Success!
  1334. ap_ftkd> Initialize FT KDP Module...
  1335. Main bssid = xx:xx:xx:xx:xx:xx
  1336. AsicRadioOnOffCtrl(): DbdcIdx=0 RadioOn
  1337. MtCmdSetMacTxRx:(ret = 0)
  1338. fdb_enable()
  1339. MCS Set = ff ff ff ff 01
  1340. <==== mt_wifi_init, Status=0
  1341. MtCmdEDCCACtrl: BandIdx: 0, EDCCACtrl: 1
  1342. MtCmdEDCCACtrl: BandIdx: 1, EDCCACtrl: 1
  1343. WDS_Init():
  1344. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1345.  MacTabMatchWCID = 0
  1346. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1347.  MacTabMatchWCID = 0
  1348. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1349.  MacTabMatchWCID = 0
  1350. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1351.  MacTabMatchWCID = 0
  1352. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1353.  MacTabMatchWCID = 0
  1354. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1355.  MacTabMatchWCID = 0
  1356. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1357.  MacTabMatchWCID = 0
  1358. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1359.  MacTabMatchWCID = 0
  1360. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1361.  MacTabMatchWCID = 0
  1362. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1363.  MacTabMatchWCID = 0
  1364. Total allocated 10 WDS interfaces!
  1365. WtcSetMaxStaNum: MaxStaNum:81, BssidNum:1, WdsNum:10, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
  1366. random: crng init done
  1367. red_is_enabled: set CR4/N9 RED Enable to 1.
  1368. cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
  1369. WifiSysClose(), wdev idx = 0
  1370. ExtEventBeaconLostHandler::FW LOG, Beacon lost (xx:xx:xx:xx:xx:xx), Reason 0x10
  1371.  Beacon lost - AP disabled!!!
  1372. WifiSysGetBssInfoState(): BssInfoIdx 0 not found!!!
  1373. WifiSysUpdateBssInfoState(): BssInfoIdx 0 not found!!!
  1374. MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
  1375. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=0, LED_CMD=0!
  1376. AndesLedEnhanceOP: Success!
  1377. ap_ftkd> Release FT KDP Module...
  1378. MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
  1379. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=0, LED_CMD=0!
  1380. AndesLedEnhanceOP: Success!
  1381. WifiSysClose(), wdev idx = 0
  1382. kill LoopBackTxTask task failed!
  1383. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=4, LED_CMD=1!
  1384. AndesLedEnhanceOP: Success!
  1385. AndesRestartCheck: Current TOP_MISC2(0x7)
  1386. CmdReStartDLRsp: Status Success!, Status(0)
  1387. AndesRestartCheck:  TOP_MISC2(1)
  1388. EventExtEventHandler: Unknown Ext Event(6f)
  1389. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=2, LED_CMD=1!
  1390. AndesLedEnhanceOP: Success!
  1391. RT28xxPciAsicRadioOff(): Not support for HIF_MT yet!
  1392. RTMPDrvClose call RT28xxPciAsicRadioOff fail !!
  1393. tx_kickout_fail_count = 0
  1394. tx_timeout_fail_count = 0
  1395. rx_receive_fail_count = 0
  1396. alloc_cmd_msg = 1343
  1397. free_cmd_msg = 1343
  1398. cut_through_token_list_destroy(): 876d2f08,876d2f08
  1399. cut_through_token_list_destroy(): 876d2f18,876d2f18
  1400. FwOwn()::Set Fw Own
  1401. RTMP_AllTimerListRelease: Size=0
  1402. FwOwn()::Return since already in Fw Own...
  1403. <---HwCtrlThread
  1404. DriverOwn()::Try to Clear FW Own...
  1405. DriverOwn()::Success to clear FW Own
  1406. APWdsInitialize():WdsEntry[0]
  1407. APWdsInitialize():WdsEntry[1]
  1408. APWdsInitialize():WdsEntry[2]
  1409. APWdsInitialize():WdsEntry[3]
  1410. APWdsInitialize():WdsEntry[4]
  1411. APWdsInitialize():WdsEntry[5]
  1412. APWdsInitialize():WdsEntry[6]
  1413. APWdsInitialize():WdsEntry[7]
  1414. APWdsInitialize():WdsEntry[8]
  1415. APWdsInitialize():WdsEntry[9]
  1416. RtmpOSFileOpen(): Error 2 opening /etc/Wireless/RT2860/RT2860_5G.dat
  1417. Open file "/etc/Wireless/RT2860/RT2860_5G.dat" failed!
  1418. E2pAccessMode=2
  1419. SSID[0]=AGT1337-2.4G, EdcaIdx=0
  1420. cfg_mode=7
  1421. cfg_mode=7
  1422. wmode_band_equal(): Band Equal!
  1423. [TxPower] BAND0: 100
  1424. APEdca0
  1425. APEdca1
  1426. APEdca2
  1427. APEdca3
  1428. [RTMPSetProfileParameters]Disable DFS/Zero wait=0/0
  1429. rtmp_read_wds_from_file(): WDS Profile
  1430. APWdsInitialize():WdsEntry[0]
  1431. APWdsInitialize():WdsEntry[1]
  1432. APWdsInitialize():WdsEntry[2]
  1433. APWdsInitialize():WdsEntry[3]
  1434. APWdsInitialize():WdsEntry[4]
  1435. APWdsInitialize():WdsEntry[5]
  1436. APWdsInitialize():WdsEntry[6]
  1437. APWdsInitialize():WdsEntry[7]
  1438. APWdsInitialize():WdsEntry[8]
  1439. APWdsInitialize():WdsEntry[9]
  1440. WDS-Enable mode=0
  1441. HT: WDEV[0] Ext Channel = ABOVE
  1442. WtcSetMaxStaNum: MaxStaNum:81, BssidNum:1, WdsNum:10, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
  1443. Top Init Done!
  1444. Use alloc_skb
  1445. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  1446. cut_through_token_list_init(): 855a7988,855a7988
  1447. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  1448. cut_through_token_list_init(): 855a7998,855a7998
  1449. RX[0] DESC a7068000 size = 16384
  1450. RX[1] DESC a7066000 size = 8192
  1451. Hif Init Done!
  1452. ctl->txq = c0476e94
  1453. ctl->rxq = c0476ea0
  1454. ctl->ackq = c0476eac
  1455. ctl->kickq = c0476eb8
  1456. ctl->tx_doneq = c0476ec4
  1457. ctl->rx_doneq = c0476ed0
  1458. mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
  1459. mt7615_fw_prepare(2687): MT7615_E3, USE E3 patch and ram code binary image
  1460. AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(11102)
  1461. AndesRestartCheck: Current TOP_MISC2(0x1)
  1462. AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
  1463. 2
  1464. 0
  1465. 1
  1466. 7
  1467. 0
  1468. 8
  1469. 0
  1470. 9
  1471. 1
  1472. 9
  1473. 2
  1474. 7
  1475. 1
  1476. 8
  1477. a
  1478.  
  1479.  
  1480. platform =
  1481. A
  1482. L
  1483. P
  1484. S
  1485.  
  1486. hw/sw version =
  1487. 8a
  1488. 10
  1489. 8a
  1490. 10
  1491.  
  1492. patch version =
  1493. 00
  1494. 00
  1495. 00
  1496. 10
  1497.  
  1498. Patch SEM Status=1
  1499. MtCmdPatchSemGet:(ret = 0)
  1500.  
  1501. Patch is ready, continue to ILM/DLM DL, SemStatus(1)
  1502. Patch SEM Status=3
  1503. MtCmdPatchSemGet:(ret = 0)
  1504.  
  1505. Release patch semaphore, SemStatus(3)
  1506. AndesMTEraseRomPatch
  1507. WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
  1508. AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(462248)
  1509. Build Date:
  1510. _
  1511. 2
  1512. 0
  1513. 1
  1514. 7
  1515. 0
  1516. 8
  1517. 1
  1518. 9
  1519. 0
  1520. 3
  1521. 4
  1522. 6
  1523.  
  1524. Build Date:
  1525. _
  1526. 2
  1527. 0
  1528. 1
  1529. 7
  1530. 0
  1531. 8
  1532. 1
  1533. 9
  1534. 0
  1535. 3
  1536. 4
  1537. 6
  1538.  
  1539. AndesRestartCheck: Current TOP_MISC2(0x1)
  1540. AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
  1541. EventGenericEventHandler: CMD Success
  1542. MtCmdAddressLenReq:(ret = 0)
  1543. EventGenericEventHandler: CMD Success
  1544. MtCmdAddressLenReq:(ret = 0)
  1545. MtCmdFwStartReq: override = 1, address = 540672
  1546. EventGenericEventHandler: CMD Success
  1547. Build Date:
  1548. _
  1549. 2
  1550. 0
  1551. 1
  1552. 7
  1553. 0
  1554. 7
  1555. 2
  1556. 1
  1557. 1
  1558. 5
  1559. 2
  1560. 4
  1561.  
  1562. EventGenericEventHandler: CMD Success
  1563. MtCmdAddressLenReq:(ret = 0)
  1564. MtCmdFwStartReq: override = 4, address = 0
  1565. EventGenericEventHandler: CMD Success
  1566. WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
  1567. MCU Init Done!
  1568. efuse_probe: efuse = 10000212
  1569. RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
  1570. RtmpEepromGetDefault::e2p_dafault=1
  1571. RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
  1572. NVM is FLASH mode. dev_idx [0] FLASH OFFSET [0x0]
  1573. NICReadEEPROMParameters: EEPROM 0x52 b313
  1574. NICReadEEPROMParameters: EEPROM 0x52 b313
  1575. Country Region from e2p = 101
  1576. mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
  1577. mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2
  1578. mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2
  1579. rtmp_read_txpwr_from_eeprom(233): Don't Support this now!
  1580. RTMPReadTxPwrPerRate(1381): Don't Support this now!
  1581. RcRadioInit(): DbdcMode=0, ConcurrentBand=1
  1582. RcRadioInit(): pRadioCtrl=87d8c454,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf
  1583. MtCmdSetDbdcCtrl:(ret = 0)
  1584. Band Rf: 1, Phy Mode: 2
  1585. AntCfgInit(2766): Not support for HIF_MT yet!
  1586. MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
  1587. MtSingleSkuLoadParam: SINGLE SKU TABLE FILE /etc/Wireless/RT2860AP/SingleSKU_24G_IC.dat!!!
  1588. MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
  1589. MtBfBackOffLoadTable: BF SKU TABLE FILE /etc/Wireless/RT2860AP/SKU_24G_IC_BF.dat!!!
  1590. EEPROM Init Done!
  1591. mt_mac_init()-->
  1592. mt_mac_pse_init(2750): Don't Support this now!
  1593. mt7615_init_mac_cr()-->
  1594. mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
  1595. mt7615_init_mac_cr(): TMAC_TRCR1=0x82783c8c
  1596. MtAsicSetMacMaxLen(1300): Not finish Yet!
  1597. <--mt_mac_init()
  1598. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  1599. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  1600. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  1601. MAC Init Done!
  1602. MT7615BBPInit():BBP Initialization.....
  1603.         Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2
  1604.         Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0
  1605. MT7615BBPInit() todo
  1606. PHY Init Done!
  1607. tx_pwr_comp_init():NotSupportYet!
  1608. MtCmdSetMacTxRx:(ret = 0)
  1609. CountryCode(2.4G/5G)=5/7, RFIC=25, PHY mode(2.4G/5G)=12/12, support 14 channels
  1610. ApAutoChannelAtBootUp----------------->
  1611. ApAutoChannelAtBootUp: AutoChannelBootup = 1, AutoChannelFlag = 1
  1612. MtCmdSetMacTxRx:(ret = 0)
  1613. mt7615_apply_dcoc() : reload Central CH [1] BW [0] from cetral freq [2417]  offset [2200]
  1614. MtCmdGetRXDCOCCalResult:(ret = 0)
  1615. mt7615_apply_dpd() : reload Central CH [1] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1616. MtCmdGetTXDPDCalResult:(ret = 0)
  1617. MtCmdChannelSwitch: control_chl = 1,control_ch2=0, central_chl = 1 DBDCIdx= 0, Band= 0
  1618. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1619. mt7615_apply_dcoc() : reload Central CH [2] BW [0] from cetral freq [2417]  offset [2200]
  1620. MtCmdGetRXDCOCCalResult:(ret = 0)
  1621. mt7615_apply_dpd() : reload Central CH [2] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1622. MtCmdGetTXDPDCalResult:(ret = 0)
  1623. MtCmdChannelSwitch: control_chl = 2,control_ch2=0, central_chl = 2 DBDCIdx= 0, Band= 0
  1624. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1625. mt7615_apply_dcoc() : reload Central CH [3] BW [0] from cetral freq [2417]  offset [2200]
  1626. MtCmdGetRXDCOCCalResult:(ret = 0)
  1627. mt7615_apply_dpd() : reload Central CH [3] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1628. MtCmdGetTXDPDCalResult:(ret = 0)
  1629. MtCmdChannelSwitch: control_chl = 3,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0
  1630. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1631. mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432]  offset [2300]
  1632. MtCmdGetRXDCOCCalResult:(ret = 0)
  1633. mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1634. MtCmdGetTXDPDCalResult:(ret = 0)
  1635. MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0
  1636. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1637. mt7615_apply_dcoc() : reload Central CH [5] BW [0] from cetral freq [2432]  offset [2300]
  1638. MtCmdGetRXDCOCCalResult:(ret = 0)
  1639. mt7615_apply_dpd() : reload Central CH [5] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  1640. MtCmdGetTXDPDCalResult:(ret = 0)
  1641. MtCmdChannelSwitch: control_chl = 5,control_ch2=0, central_chl = 5 DBDCIdx= 0, Band= 0
  1642. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1643. mt7615_apply_dcoc() : reload Central CH [6] BW [0] from cetral freq [2432]  offset [2300]
  1644. MtCmdGetRXDCOCCalResult:(ret = 0)
  1645. mt7615_apply_dpd() : reload Central CH [6] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  1646. MtCmdGetTXDPDCalResult:(ret = 0)
  1647. MtCmdChannelSwitch: control_chl = 6,control_ch2=0, central_chl = 6 DBDCIdx= 0, Band= 0
  1648. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1649. mt7615_apply_dcoc() : reload Central CH [7] BW [0] from cetral freq [2447]  offset [2400]
  1650. MtCmdGetRXDCOCCalResult:(ret = 0)
  1651. mt7615_apply_dpd() : reload Central CH [7] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  1652. MtCmdGetTXDPDCalResult:(ret = 0)
  1653. MtCmdChannelSwitch: control_chl = 7,control_ch2=0, central_chl = 7 DBDCIdx= 0, Band= 0
  1654. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1655. mt7615_apply_dcoc() : reload Central CH [8] BW [0] from cetral freq [2447]  offset [2400]
  1656. MtCmdGetRXDCOCCalResult:(ret = 0)
  1657. mt7615_apply_dpd() : reload Central CH [8] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  1658. MtCmdGetTXDPDCalResult:(ret = 0)
  1659. MtCmdChannelSwitch: control_chl = 8,control_ch2=0, central_chl = 8 DBDCIdx= 0, Band= 0
  1660. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1661. mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400]
  1662. MtCmdGetRXDCOCCalResult:(ret = 0)
  1663. mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  1664. MtCmdGetTXDPDCalResult:(ret = 0)
  1665. MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0
  1666. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1667. mt7615_apply_dcoc() : reload Central CH [10] BW [0] from cetral freq [2467]  offset [2500]
  1668. MtCmdGetRXDCOCCalResult:(ret = 0)
  1669. mt7615_apply_dpd() : reload Central CH [10] BW [0] from cetral freq [2462] i[46] offset [4cd0]
  1670. MtCmdGetTXDPDCalResult:(ret = 0)
  1671. MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0
  1672. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1673. mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467]  offset [2500]
  1674. MtCmdGetRXDCOCCalResult:(ret = 0)
  1675. mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0]
  1676. MtCmdGetTXDPDCalResult:(ret = 0)
  1677. MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0
  1678. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1679. mt7615_apply_dcoc() : reload Central CH [12] BW [0] from cetral freq [2467]  offset [2500]
  1680. MtCmdGetRXDCOCCalResult:(ret = 0)
  1681. mt7615_apply_dpd() : reload Central CH [12] BW [0] from cetral freq [2462] i[46] offset [4cd0]
  1682. MtCmdGetTXDPDCalResult:(ret = 0)
  1683. MtCmdChannelSwitch: control_chl = 12,control_ch2=0, central_chl = 12 DBDCIdx= 0, Band= 0
  1684. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1685. mt7615_apply_dcoc() : reload Central CH [13] BW [0] from cetral freq [2467]  offset [2500]
  1686. MtCmdGetRXDCOCCalResult:(ret = 0)
  1687. mt7615_apply_dpd() : reload Central CH [13] BW [0] from cetral freq [2462] i[46] offset [4cd0]
  1688. MtCmdGetTXDPDCalResult:(ret = 0)
  1689. MtCmdChannelSwitch: control_chl = 13,control_ch2=0, central_chl = 13 DBDCIdx= 0, Band= 0
  1690. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1691. ====================================================================
  1692. Channel   1 : Busy Time =  36577, Skip Channel = FALSE, BwCap = TRUE
  1693. Channel   2 : Busy Time =  11178, Skip Channel = FALSE, BwCap = TRUE
  1694. Channel   3 : Busy Time =  35947, Skip Channel = FALSE, BwCap = TRUE
  1695. Channel   4 : Busy Time =  11296, Skip Channel = FALSE, BwCap = TRUE
  1696. Channel   5 : Busy Time =  16485, Skip Channel = FALSE, BwCap = TRUE
  1697. Channel   6 : Busy Time =  46970, Skip Channel = FALSE, BwCap = TRUE
  1698. Channel   7 : Busy Time =  26628, Skip Channel = FALSE, BwCap = TRUE
  1699. Channel   8 : Busy Time =  21730, Skip Channel = FALSE, BwCap = TRUE
  1700. Channel   9 : Busy Time =  14148, Skip Channel = FALSE, BwCap = TRUE
  1701. Channel  10 : Busy Time =  17867, Skip Channel = FALSE, BwCap = TRUE
  1702. Channel  11 : Busy Time =  35027, Skip Channel = FALSE, BwCap = TRUE
  1703. Channel  12 : Busy Time =  11602, Skip Channel = FALSE, BwCap = TRUE
  1704. Channel  13 : Busy Time =   6564, Skip Channel = FALSE, BwCap = TRUE
  1705. ====================================================================
  1706. Rule 3 Channel Busy time value : Select Primary Channel 13
  1707. Rule 3 Channel Busy time value : Min Channel Busy = 6564
  1708. Rule 3 Channel Busy time value : BW = 20
  1709.  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 12,Channel = 13  
  1710. ApAutoChannelAtBootUp<-----------------
  1711. WifiSysOpen(), wdev idx = 0
  1712. wdev_attr_update(): wdevId0 = xx:xx:xx:xx:xx:xx
  1713. MtCmdSetDbdcCtrl:(ret = 0)
  1714. Current Channel is 13. DfsZeroWaitSupport=0
  1715. [PMF]APPMFInit:: apidx=0, MFPC=0, MFPR=0, SHA256=0
  1716. [PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
  1717. HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:12,Channel=13
  1718. RTMPSetPhyMode(): channel out of range, use first ch=1
  1719. Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
  1720. MtCmdSetMacTxRx:(ret = 0)
  1721. mt7615_apply_dcoc() : reload Central CH [1] BW [0] from cetral freq [2417]  offset [2200]
  1722. MtCmdGetRXDCOCCalResult:(ret = 0)
  1723. mt7615_apply_dpd() : reload Central CH [1] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1724. MtCmdGetTXDPDCalResult:(ret = 0)
  1725. MtCmdChannelSwitch: control_chl = 1,control_ch2=0, central_chl = 1 DBDCIdx= 0, Band= 0
  1726. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1727. AP OBSS SYNC - BBP R4 to 20MHz.l
  1728. :MtCmdPktBudgetCtrl: bssid(255),wcid(65535),type(0)
  1729. mt7615_apply_dcoc() : reload Central CH [2] BW [0] from cetral freq [2417]  offset [2200]
  1730. MtCmdGetRXDCOCCalResult:(ret = 0)
  1731. mt7615_apply_dpd() : reload Central CH [2] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1732. MtCmdGetTXDPDCalResult:(ret = 0)
  1733. MtCmdChannelSwitch: control_chl = 2,control_ch2=0, central_chl = 2 DBDCIdx= 0, Band= 0
  1734. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1735. AP OBSS SYNC - BBP R4 to 20MHz.l
  1736. mt7615_apply_dcoc() : reload Central CH [3] BW [0] from cetral freq [2417]  offset [2200]
  1737. MtCmdGetRXDCOCCalResult:(ret = 0)
  1738. mt7615_apply_dpd() : reload Central CH [3] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1739. MtCmdGetTXDPDCalResult:(ret = 0)
  1740. MtCmdChannelSwitch: control_chl = 3,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0
  1741. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1742. AP OBSS SYNC - BBP R4 to 20MHz.l
  1743. mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432]  offset [2300]
  1744. MtCmdGetRXDCOCCalResult:(ret = 0)
  1745. mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1746. MtCmdGetTXDPDCalResult:(ret = 0)
  1747. MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0
  1748. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1749. AP OBSS SYNC - BBP R4 to 20MHz.l
  1750. wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
  1751.  LinkToOmacIdx = 0, LinkToWdevType = 1
  1752. bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 8192,                 CmdBssInfoBmcRate.u2McTransmit = 8196
  1753.  [RadarStateCheck]Set into RD_NORMAL_MODE  
  1754. MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 0, BandIdx: 0
  1755. MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 0, BandIdx: 0
  1756. MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 0, BandIdx: 0
  1757. mt7615_bbp_adjust():rf_bw=0, ext_ch=0, PrimCh=1, HT-CentCh=1, VHT-CentCh=0
  1758. mt7615_apply_dcoc() : reload Central CH [1] BW [0] from cetral freq [2417]  offset [2200]
  1759. MtCmdGetRXDCOCCalResult:(ret = 0)
  1760. mt7615_apply_dpd() : reload Central CH [1] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1761. MtCmdGetTXDPDCalResult:(ret = 0)
  1762. MtCmdChannelSwitch: control_chl = 1,control_ch2=0, central_chl = 1 DBDCIdx= 0, Band= 0
  1763. BW = 0,TXStream = 4, RXStream = 4, scan(0)
  1764. ExtEventBeaconLostHandler::FW LOG, Beacon lost (xx:xx:xx:xx:xx:xx), Reason 0x10
  1765.   Beacon lost - AP disabled!!!
  1766. ap_phy_rrm_init_byRf(): AP Set CentralFreq at 1(Prim=1, HT-CentCh=1, VHT-CentCh=0, BBP_BW=0)
  1767. LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
  1768. MtAsicSetRalinkBurstMode(2605): Not support for HIF_MT yet!
  1769. MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
  1770. MtAsicSetTxPreamble(2584): Not support for HIF_MT yet!
  1771. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=1, LED_CMD=2!
  1772. AndesLedEnhanceOP: Success!
  1773. ap_ftkd> Initialize FT KDP Module...
  1774. Main bssid = xx:xx:xx:xx:xx:xx
  1775. AsicRadioOnOffCtrl(): DbdcIdx=0 RadioOn
  1776. MtCmdSetMacTxRx:(ret = 0)
  1777. fdb_enable()
  1778. MCS Set = ff ff ff ff 01
  1779. <==== mt_wifi_init, Status=0
  1780. MtCmdEDCCACtrl: BandIdx: 0, EDCCACtrl: 1
  1781. MtCmdEDCCACtrl: BandIdx: 1, EDCCACtrl: 1
  1782. WtcSetMaxStaNum: MaxStaNum:81, BssidNum:1, WdsNum:10, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
  1783. red_is_enabled: set CR4/N9 RED Enable to 1.
  1784. cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
  1785. br0: port 2(ra0) entered blocking state
  1786. br0: port 2(ra0) entered disabled state
  1787. device ra0 entered promiscuous mode
  1788. br0: port 2(ra0) entered blocking state
  1789. br0: port 2(ra0) entered forwarding state
  1790. DriverOwn()::Return since already in Driver Own...
  1791. APWdsInitialize():WdsEntry[0]
  1792. APWdsInitialize():WdsEntry[1]
  1793. APWdsInitialize():WdsEntry[2]
  1794. APWdsInitialize():WdsEntry[3]
  1795. APWdsInitialize():WdsEntry[4]
  1796. APWdsInitialize():WdsEntry[5]
  1797. APWdsInitialize():WdsEntry[6]
  1798. APWdsInitialize():WdsEntry[7]
  1799. APWdsInitialize():WdsEntry[8]
  1800. APWdsInitialize():WdsEntry[9]
  1801. RtmpOSFileOpen(): Error 2 opening /etc/Wireless/iNIC/iNIC_ap_5G.dat
  1802. Open file "/etc/Wireless/iNIC/iNIC_ap_5G.dat" failed!
  1803. E2pAccessMode=2
  1804. SSID[0]=AGT1337-5.0G, EdcaIdx=0
  1805. cfg_mode=15
  1806. cfg_mode=15
  1807. wmode_band_equal(): Band Equal!
  1808. [TxPower] BAND0: 100
  1809. APEdca0
  1810. APEdca1
  1811. APEdca2
  1812. APEdca3
  1813. [RTMPSetProfileParameters]Disable DFS/Zero wait=0/0
  1814. rtmp_read_wds_from_file(): WDS Profile
  1815. APWdsInitialize():WdsEntry[0]
  1816. APWdsInitialize():WdsEntry[1]
  1817. APWdsInitialize():WdsEntry[2]
  1818. APWdsInitialize():WdsEntry[3]
  1819. APWdsInitialize():WdsEntry[4]
  1820. APWdsInitialize():WdsEntry[5]
  1821. APWdsInitialize():WdsEntry[6]
  1822. APWdsInitialize():WdsEntry[7]
  1823. APWdsInitialize():WdsEntry[8]
  1824. APWdsInitialize():WdsEntry[9]
  1825. WDS-Enable mode=0
  1826. HT: WDEV[0] Ext Channel = BELOW
  1827. WtcSetMaxStaNum: MaxStaNum:81, BssidNum:1, WdsNum:10, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
  1828. Top Init Done!
  1829. Use alloc_skb
  1830. RX[0] DESC a6e80000 size = 16384
  1831. RX[1] DESC a6dfe000 size = 8192
  1832. Hif Init Done!
  1833. ctl->txq = c08f6e94
  1834. ctl->rxq = c08f6ea0
  1835. ctl->ackq = c08f6eac
  1836. ctl->kickq = c08f6eb8
  1837. ctl->tx_doneq = c08f6ec4
  1838. ctl->rx_doneq = c08f6ed0
  1839. mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
  1840. mt7615_fw_prepare(2687): MT7615_E3, USE E3 patch and ram code binary image
  1841. AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(11102)
  1842. AndesRestartCheck: Current TOP_MISC2(0x1)
  1843. AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
  1844. 2
  1845. 0
  1846. 1
  1847. 7
  1848. 0
  1849. 8
  1850. 0
  1851. 9
  1852. 1
  1853. 9
  1854. 2
  1855. 7
  1856. 1
  1857. 8
  1858. a
  1859.  
  1860.  
  1861. platform =
  1862. A
  1863. L
  1864. P
  1865. S
  1866.  
  1867. hw/sw version =
  1868. 8a
  1869. 10
  1870. 8a
  1871. 10
  1872.  
  1873. patch version =
  1874. 00
  1875. 00
  1876. 00
  1877. 10
  1878.  
  1879. Patch SEM Status=2
  1880. MtCmdPatchSemGet:(ret = 0)
  1881.  
  1882. Patch is not ready && get semaphore success, SemStatus(2)
  1883. EventGenericEventHandler: CMD Success
  1884. MtCmdAddressLenReq:(ret = 0)
  1885. MtCmdPatchFinishReq
  1886. EventGenericEventHandler: CMD Success
  1887. Send checksum req..
  1888. Patch SEM Status=3
  1889. MtCmdPatchSemGet:(ret = 0)
  1890.  
  1891. Release patch semaphore, SemStatus(3)
  1892. AndesMTEraseRomPatch
  1893. WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
  1894. AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(462248)
  1895. Build Date:
  1896. _
  1897. 2
  1898. 0
  1899. 1
  1900. 7
  1901. 0
  1902. 8
  1903. 1
  1904. 9
  1905. 0
  1906. 3
  1907. 4
  1908. 6
  1909.  
  1910. Build Date:
  1911. _
  1912. 2
  1913. 0
  1914. 1
  1915. 7
  1916. 0
  1917. 8
  1918. 1
  1919. 9
  1920. 0
  1921. 3
  1922. 4
  1923. 6
  1924.  
  1925. AndesRestartCheck: Current TOP_MISC2(0x1)
  1926. AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
  1927. EventGenericEventHandler: CMD Success
  1928. MtCmdAddressLenReq:(ret = 0)
  1929. EventGenericEventHandler: CMD Success
  1930. MtCmdAddressLenReq:(ret = 0)
  1931. MtCmdFwStartReq: override = 1, address = 540672
  1932. EventGenericEventHandler: CMD Success
  1933. Build Date:
  1934. _
  1935. 2
  1936. 0
  1937. 1
  1938. 7
  1939. 0
  1940. 7
  1941. 2
  1942. 1
  1943. 1
  1944. 5
  1945. 2
  1946. 4
  1947.  
  1948. EventGenericEventHandler: CMD Success
  1949. MtCmdAddressLenReq:(ret = 0)
  1950. MtCmdFwStartReq: override = 4, address = 0
  1951. EventGenericEventHandler: CMD Success
  1952. WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
  1953. MCU Init Done!
  1954. efuse_probe: efuse = 10000212
  1955. RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
  1956. RtmpEepromGetDefault::e2p_dafault=1
  1957. RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
  1958. NVM is FLASH mode. dev_idx [1] FLASH OFFSET [0x8000]
  1959. NICReadEEPROMParameters: EEPROM 0x52 b313
  1960. NICReadEEPROMParameters: EEPROM 0x52 b313
  1961. Country Region from e2p = 101
  1962. mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
  1963. mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2
  1964. mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2
  1965. rtmp_read_txpwr_from_eeprom(233): Don't Support this now!
  1966. RTMPReadTxPwrPerRate(1381): Don't Support this now!
  1967. RcRadioInit(): DbdcMode=0, ConcurrentBand=1
  1968. RcRadioInit(): pRadioCtrl=87d8e454,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf
  1969. MtCmdSetDbdcCtrl:(ret = 0)
  1970. Band Rf: 1, Phy Mode: 2
  1971. AntCfgInit(2766): Not support for HIF_MT yet!
  1972. MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
  1973. MtSingleSkuLoadParam: SINGLE SKU TABLE FILE /etc/Wireless/RT2860AP/SingleSKU_5G_IC.dat!!!
  1974. MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
  1975. MtBfBackOffLoadTable: BF SKU TABLE FILE /etc/Wireless/RT2860AP/SKU_5G_IC_BF.dat!!!
  1976. EEPROM Init Done!
  1977. mt_mac_init()-->
  1978. mt_mac_pse_init(2750): Don't Support this now!
  1979. mt7615_init_mac_cr()-->
  1980. mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
  1981. mt7615_init_mac_cr(): TMAC_TRCR1=0x82783c8c
  1982. MtAsicSetMacMaxLen(1300): Not finish Yet!
  1983. <--mt_mac_init()
  1984. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  1985. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  1986. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  1987. MAC Init Done!
  1988. MT7615BBPInit():BBP Initialization.....
  1989.        Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2
  1990.        Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0
  1991. MT7615BBPInit() todo
  1992. PHY Init Done!
  1993. tx_pwr_comp_init():NotSupportYet!
  1994. MtCmdSetMacTxRx:(ret = 0)
  1995. CountryCode(2.4G/5G)=5/7, RFIC=25, PHY mode(2.4G/5G)=48/48, support 24 channels
  1996. ApAutoChannelAtBootUp----------------->
  1997. ApAutoChannelAtBootUp: AutoChannelBootup = 1, AutoChannelFlag = 1
  1998. MtCmdSetMacTxRx:(ret = 0)
  1999. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2000. MtCmdGetRXDCOCCalResult:(ret = 0)
  2001. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2002. MtCmdGetRXDCOCCalResult:(ret = 0)
  2003. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2004. MtCmdGetTXDPDCalResult:(ret = 0)
  2005. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2006. MtCmdGetTXDPDCalResult:(ret = 0)
  2007. MtCmdChannelSwitch: control_chl = 36,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2008. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2009. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2010. MtCmdGetRXDCOCCalResult:(ret = 0)
  2011. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2012. MtCmdGetRXDCOCCalResult:(ret = 0)
  2013. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2014. MtCmdGetTXDPDCalResult:(ret = 0)
  2015. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2016. MtCmdGetTXDPDCalResult:(ret = 0)
  2017. MtCmdChannelSwitch: control_chl = 40,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2018. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2019. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2020. MtCmdGetRXDCOCCalResult:(ret = 0)
  2021. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2022. MtCmdGetRXDCOCCalResult:(ret = 0)
  2023. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2024. MtCmdGetTXDPDCalResult:(ret = 0)
  2025. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2026. MtCmdGetTXDPDCalResult:(ret = 0)
  2027. MtCmdChannelSwitch: control_chl = 44,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2028. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2029. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2030. MtCmdGetRXDCOCCalResult:(ret = 0)
  2031. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2032. MtCmdGetRXDCOCCalResult:(ret = 0)
  2033. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2034. MtCmdGetTXDPDCalResult:(ret = 0)
  2035. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2036. MtCmdGetTXDPDCalResult:(ret = 0)
  2037. MtCmdChannelSwitch: control_chl = 48,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2038. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2039. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2040. MtCmdGetRXDCOCCalResult:(ret = 0)
  2041. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2042. MtCmdGetRXDCOCCalResult:(ret = 0)
  2043. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2044. MtCmdGetTXDPDCalResult:(ret = 0)
  2045. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2046. MtCmdGetTXDPDCalResult:(ret = 0)
  2047. MtCmdChannelSwitch: control_chl = 52,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2048. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2049. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2050. MtCmdGetRXDCOCCalResult:(ret = 0)
  2051. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2052. MtCmdGetRXDCOCCalResult:(ret = 0)
  2053. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2054. MtCmdGetTXDPDCalResult:(ret = 0)
  2055. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2056. MtCmdGetTXDPDCalResult:(ret = 0)
  2057. MtCmdChannelSwitch: control_chl = 56,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2058. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2059. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2060. MtCmdGetRXDCOCCalResult:(ret = 0)
  2061. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2062. MtCmdGetRXDCOCCalResult:(ret = 0)
  2063. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2064. MtCmdGetTXDPDCalResult:(ret = 0)
  2065. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2066. MtCmdGetTXDPDCalResult:(ret = 0)
  2067. MtCmdChannelSwitch: control_chl = 60,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2068. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2069. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2070. MtCmdGetRXDCOCCalResult:(ret = 0)
  2071. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2072. MtCmdGetRXDCOCCalResult:(ret = 0)
  2073. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2074. MtCmdGetTXDPDCalResult:(ret = 0)
  2075. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2076. MtCmdGetTXDPDCalResult:(ret = 0)
  2077. MtCmdChannelSwitch: control_chl = 64,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2078. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2079. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2080. MtCmdGetRXDCOCCalResult:(ret = 0)
  2081. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2082. MtCmdGetRXDCOCCalResult:(ret = 0)
  2083. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2084. MtCmdGetTXDPDCalResult:(ret = 0)
  2085. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2086. MtCmdGetTXDPDCalResult:(ret = 0)
  2087. MtCmdChannelSwitch: control_chl = 100,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2088. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2089. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2090. MtCmdGetRXDCOCCalResult:(ret = 0)
  2091. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2092. MtCmdGetRXDCOCCalResult:(ret = 0)
  2093. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2094. MtCmdGetTXDPDCalResult:(ret = 0)
  2095. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2096. MtCmdGetTXDPDCalResult:(ret = 0)
  2097. MtCmdChannelSwitch: control_chl = 104,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2098. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2099. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2100. MtCmdGetRXDCOCCalResult:(ret = 0)
  2101. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2102. MtCmdGetRXDCOCCalResult:(ret = 0)
  2103. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2104. MtCmdGetTXDPDCalResult:(ret = 0)
  2105. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2106. MtCmdGetTXDPDCalResult:(ret = 0)
  2107. MtCmdChannelSwitch: control_chl = 108,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2108. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2109. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2110. MtCmdGetRXDCOCCalResult:(ret = 0)
  2111. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2112. MtCmdGetRXDCOCCalResult:(ret = 0)
  2113. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2114. MtCmdGetTXDPDCalResult:(ret = 0)
  2115. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2116. MtCmdGetTXDPDCalResult:(ret = 0)
  2117. MtCmdChannelSwitch: control_chl = 112,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2118. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2119. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2120. MtCmdGetRXDCOCCalResult:(ret = 0)
  2121. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2122. MtCmdGetRXDCOCCalResult:(ret = 0)
  2123. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2124. MtCmdGetTXDPDCalResult:(ret = 0)
  2125. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2126. MtCmdGetTXDPDCalResult:(ret = 0)
  2127. MtCmdChannelSwitch: control_chl = 116,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2128. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2129. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2130. MtCmdGetRXDCOCCalResult:(ret = 0)
  2131. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2132. MtCmdGetRXDCOCCalResult:(ret = 0)
  2133. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2134. MtCmdGetTXDPDCalResult:(ret = 0)
  2135. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2136. MtCmdGetTXDPDCalResult:(ret = 0)
  2137. MtCmdChannelSwitch: control_chl = 120,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2138. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2139. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2140. MtCmdGetRXDCOCCalResult:(ret = 0)
  2141. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2142. MtCmdGetRXDCOCCalResult:(ret = 0)
  2143. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2144. MtCmdGetTXDPDCalResult:(ret = 0)
  2145. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2146. MtCmdGetTXDPDCalResult:(ret = 0)
  2147. MtCmdChannelSwitch: control_chl = 124,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2148. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2149. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2150. MtCmdGetRXDCOCCalResult:(ret = 0)
  2151. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2152. MtCmdGetRXDCOCCalResult:(ret = 0)
  2153. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2154. MtCmdGetTXDPDCalResult:(ret = 0)
  2155. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2156. MtCmdGetTXDPDCalResult:(ret = 0)
  2157. MtCmdChannelSwitch: control_chl = 128,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2158. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2159. ====================================================================
  2160. Channel  36 : Busy Time =  19665, Skip Channel = FALSE, BwCap = TRUE
  2161. Channel  40 : Busy Time =  16608, Skip Channel = FALSE, BwCap = TRUE
  2162. Channel  44 : Busy Time =  22306, Skip Channel = FALSE, BwCap = TRUE
  2163. Channel  48 : Busy Time =  18067, Skip Channel = FALSE, BwCap = TRUE
  2164. Channel  52 : Busy Time =   6145, Skip Channel = FALSE, BwCap = TRUE
  2165. Channel  56 : Busy Time =   2310, Skip Channel = FALSE, BwCap = TRUE
  2166. Channel  60 : Busy Time =   2622, Skip Channel = FALSE, BwCap = TRUE
  2167. Channel  64 : Busy Time =  12223, Skip Channel = FALSE, BwCap = TRUE
  2168. Channel 100 : Busy Time =   8586, Skip Channel = FALSE, BwCap = TRUE
  2169. Channel 104 : Busy Time =   3880, Skip Channel = FALSE, BwCap = TRUE
  2170. Channel 108 : Busy Time =   6762, Skip Channel = FALSE, BwCap = TRUE
  2171. Channel 112 : Busy Time =   2220, Skip Channel = FALSE, BwCap = TRUE
  2172. Channel 116 : Busy Time =      2, Skip Channel = FALSE, BwCap = TRUE
  2173. Channel 120 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
  2174. Channel 124 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
  2175. Channel 128 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
  2176. ====================================================================
  2177. Rule 3 Channel Busy time value : Select Primary Channel 120
  2178. Rule 3 Channel Busy time value : Min Channel Busy = 8586
  2179. Rule 3 Channel Busy time value : BW = 160
  2180. AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 48,Channel = 120  
  2181. ApAutoChannelAtBootUp<-----------------
  2182. WifiSysOpen(), wdev idx = 0
  2183. wdev_attr_update(): wdevId0 = xx:xx:xx:xx:xx:xx
  2184. MtCmdSetDbdcCtrl:(ret = 0)
  2185. Current Channel is 120. DfsZeroWaitSupport=0
  2186. MtAsicSetChBusyStat(840): Not support for HIF_MT yet!
  2187. [PMF]APPMFInit:: apidx=0, MFPC=0, MFPR=0, SHA256=0
  2188. [PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
  2189. HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:48,Channel=120
  2190. Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
  2191. wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
  2192. LinkToOmacIdx = 0, LinkToWdevType = 1
  2193. bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 8192,                 CmdBssInfoBmcRate.u2McTransmit = 8196
  2194. [RadarStateCheck]Set into RD_NORMAL_MODE  
  2195. MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 0, BandIdx: 0
  2196. MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 0, BandIdx: 0
  2197. MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 0, BandIdx: 0
  2198. mt7615_bbp_adjust():rf_bw=3, ext_ch=3, PrimCh=120, HT-CentCh=118, VHT-CentCh=114
  2199. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2200. MtCmdGetRXDCOCCalResult:(ret = 0)
  2201. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2202. MtCmdGetRXDCOCCalResult:(ret = 0)
  2203. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2204. MtCmdGetTXDPDCalResult:(ret = 0)
  2205. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2206. MtCmdGetTXDPDCalResult:(ret = 0)
  2207. MtCmdChannelSwitch: control_chl = 120,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2208. BW = 3,TXStream = 4, RXStream = 4, scan(0)
  2209. :MtCmdPktBudgetCtrl: bssid(255),wcid(65535),type(0)
  2210. ap_phy_rrm_init_byRf(): AP Set CentralFreq at 114(Prim=120, HT-CentCh=118, VHT-CentCh=114, BBP_BW=3)
  2211. [WrapDfsRadarDetectStart]: Band0Ch is 120
  2212. [WrapDfsRadarDetectStart]: Band1Ch is 0
  2213. LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
  2214. MtAsicSetRalinkBurstMode(2605): Not support for HIF_MT yet!
  2215. MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
  2216. MtAsicSetTxPreamble(2584): Not support for HIF_MT yet!
  2217. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=1, LED_CMD=2!
  2218. AndesLedEnhanceOP: Success!
  2219. ap_ftkd> Initialize FT KDP Module...
  2220. Main bssid = xx:xx:xx:xx:xx:xx
  2221. AsicRadioOnOffCtrl(): DbdcIdx=0 RadioOn
  2222. MtCmdSetMacTxRx:(ret = 0)
  2223. fdb_enable()
  2224. MCS Set = ff ff ff ff 01
  2225. <==== mt_wifi_init, Status=0
  2226. MtCmdEDCCACtrl: BandIdx: 0, EDCCACtrl: 1
  2227. MtCmdEDCCACtrl: BandIdx: 1, EDCCACtrl: 1
  2228. WDS_Init():
  2229. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  2230.  MacTabMatchWCID = 0
  2231. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  2232.  MacTabMatchWCID = 0
  2233. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  2234.  MacTabMatchWCID = 0
  2235. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  2236.  MacTabMatchWCID = 0
  2237. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  2238.  MacTabMatchWCID = 0
  2239. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  2240.  MacTabMatchWCID = 0
  2241. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  2242.  MacTabMatchWCID = 0
  2243. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  2244.  MacTabMatchWCID = 0
  2245. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  2246.  MacTabMatchWCID = 0
  2247. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  2248.  MacTabMatchWCID = 0
  2249. Total allocated 10 WDS interfaces!
  2250. WtcSetMaxStaNum: MaxStaNum:81, BssidNum:1, WdsNum:10, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
  2251. red_is_enabled: set CR4/N9 RED Enable to 1.
  2252. cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
  2253. WifiSysClose(), wdev idx = 0
  2254. ExtEventBeaconLostHandler::FW LOG, Beacon lost (xx:xx:xx:xx:xx:xx), Reason 0x10
  2255.  Beacon lost - AP disabled!!!
  2256. WifiSysGetBssInfoState(): BssInfoIdx 0 not found!!!
  2257. WifiSysUpdateBssInfoState(): BssInfoIdx 0 not found!!!
  2258. MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
  2259. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=0, LED_CMD=0!
  2260. AndesLedEnhanceOP: Success!
  2261. WifiSysClose(), wdev idx = 0
  2262. ap_ftkd> Release FT KDP Module...
  2263. MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
  2264. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=0, LED_CMD=0!
  2265. AndesLedEnhanceOP: Success!
  2266. kill LoopBackTxTask task failed!
  2267. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=4, LED_CMD=1!
  2268. AndesLedEnhanceOP: Success!
  2269. AndesRestartCheck: Current TOP_MISC2(0x7)
  2270. CmdReStartDLRsp: Status Success!, Status(0)
  2271. AndesRestartCheck:  TOP_MISC2(1)
  2272. EventExtEventHandler: Unknown Ext Event(6f)
  2273. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=2, LED_CMD=1!
  2274. AndesLedEnhanceOP: Success!
  2275. RT28xxPciAsicRadioOff(): Not support for HIF_MT yet!
  2276. RTMPDrvClose call RT28xxPciAsicRadioOff fail !!
  2277. tx_kickout_fail_count = 0
  2278. tx_timeout_fail_count = 0
  2279. rx_receive_fail_count = 0
  2280. alloc_cmd_msg = 1398
  2281. free_cmd_msg = 1398
  2282. cut_through_token_list_destroy(): 86c6c808,86c6c808
  2283. cut_through_token_list_destroy(): 86c6c818,86c6c818
  2284. FwOwn()::Set Fw Own
  2285. RTMP_AllTimerListRelease: Size=0
  2286. FwOwn()::Return since already in Fw Own...
  2287. <---HwCtrlThread
  2288. DriverOwn()::Try to Clear FW Own...
  2289. DriverOwn()::Success to clear FW Own
  2290. APWdsInitialize():WdsEntry[0]
  2291. APWdsInitialize():WdsEntry[1]
  2292. APWdsInitialize():WdsEntry[2]
  2293. APWdsInitialize():WdsEntry[3]
  2294. APWdsInitialize():WdsEntry[4]
  2295. APWdsInitialize():WdsEntry[5]
  2296. APWdsInitialize():WdsEntry[6]
  2297. APWdsInitialize():WdsEntry[7]
  2298. APWdsInitialize():WdsEntry[8]
  2299. APWdsInitialize():WdsEntry[9]
  2300. RtmpOSFileOpen(): Error 2 opening /etc/Wireless/iNIC/iNIC_ap_5G.dat
  2301. Open file "/etc/Wireless/iNIC/iNIC_ap_5G.dat" failed!
  2302. E2pAccessMode=2
  2303. SSID[0]=AGT1337-5.0G, EdcaIdx=0
  2304. cfg_mode=15
  2305. cfg_mode=15
  2306. wmode_band_equal(): Band Equal!
  2307. [TxPower] BAND0: 100
  2308. APEdca0
  2309. APEdca1
  2310. APEdca2
  2311. APEdca3
  2312. [RTMPSetProfileParameters]Disable DFS/Zero wait=0/0
  2313. rtmp_read_wds_from_file(): WDS Profile
  2314. APWdsInitialize():WdsEntry[0]
  2315. APWdsInitialize():WdsEntry[1]
  2316. APWdsInitialize():WdsEntry[2]
  2317. APWdsInitialize():WdsEntry[3]
  2318. APWdsInitialize():WdsEntry[4]
  2319. APWdsInitialize():WdsEntry[5]
  2320. APWdsInitialize():WdsEntry[6]
  2321. APWdsInitialize():WdsEntry[7]
  2322. APWdsInitialize():WdsEntry[8]
  2323. APWdsInitialize():WdsEntry[9]
  2324. WDS-Enable mode=0
  2325. HT: WDEV[0] Ext Channel = BELOW
  2326. WtcSetMaxStaNum: MaxStaNum:81, BssidNum:1, WdsNum:10, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
  2327. Top Init Done!
  2328. Use alloc_skb
  2329. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  2330. cut_through_token_list_init(): 86cbdc88,86cbdc88
  2331. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  2332. cut_through_token_list_init(): 86cbdc98,86cbdc98
  2333. RX[0] DESC a6e80000 size = 16384
  2334. RX[1] DESC a6dfe000 size = 8192
  2335. Hif Init Done!
  2336. ctl->txq = c08f6e94
  2337. ctl->rxq = c08f6ea0
  2338. ctl->ackq = c08f6eac
  2339. ctl->kickq = c08f6eb8
  2340. ctl->tx_doneq = c08f6ec4
  2341. ctl->rx_doneq = c08f6ed0
  2342. mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
  2343. mt7615_fw_prepare(2687): MT7615_E3, USE E3 patch and ram code binary image
  2344. AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(11102)
  2345. AndesRestartCheck: Current TOP_MISC2(0x1)
  2346. AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
  2347. 2
  2348. 0
  2349. 1
  2350. 7
  2351. 0
  2352. 8
  2353. 0
  2354. 9
  2355. 1
  2356. 9
  2357. 2
  2358. 7
  2359. 1
  2360. 8
  2361. a
  2362.  
  2363.  
  2364. platform =
  2365. A
  2366. L
  2367. P
  2368. S
  2369.  
  2370. hw/sw version =
  2371. 8a
  2372. 10
  2373. 8a
  2374. 10
  2375.  
  2376. patch version =
  2377. 00
  2378. 00
  2379. 00
  2380. 10
  2381.  
  2382. Patch SEM Status=1
  2383. MtCmdPatchSemGet:(ret = 0)
  2384.  
  2385. Patch is ready, continue to ILM/DLM DL, SemStatus(1)
  2386. Patch SEM Status=3
  2387. MtCmdPatchSemGet:(ret = 0)
  2388.  
  2389. Release patch semaphore, SemStatus(3)
  2390. AndesMTEraseRomPatch
  2391. WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
  2392. AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(462248)
  2393. Build Date:
  2394. _
  2395. 2
  2396. 0
  2397. 1
  2398. 7
  2399. 0
  2400. 8
  2401. 1
  2402. 9
  2403. 0
  2404. 3
  2405. 4
  2406. 6
  2407.  
  2408. Build Date:
  2409. _
  2410. 2
  2411. 0
  2412. 1
  2413. 7
  2414. 0
  2415. 8
  2416. 1
  2417. 9
  2418. 0
  2419. 3
  2420. 4
  2421. 6
  2422.  
  2423. AndesRestartCheck: Current TOP_MISC2(0x1)
  2424. AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
  2425. EventGenericEventHandler: CMD Success
  2426. MtCmdAddressLenReq:(ret = 0)
  2427. EventGenericEventHandler: CMD Success
  2428. MtCmdAddressLenReq:(ret = 0)
  2429. MtCmdFwStartReq: override = 1, address = 540672
  2430. EventGenericEventHandler: CMD Success
  2431. Build Date:
  2432. _
  2433. 2
  2434. 0
  2435. 1
  2436. 7
  2437. 0
  2438. 7
  2439. 2
  2440. 1
  2441. 1
  2442. 5
  2443. 2
  2444. 4
  2445.  
  2446. EventGenericEventHandler: CMD Success
  2447. MtCmdAddressLenReq:(ret = 0)
  2448. MtCmdFwStartReq: override = 4, address = 0
  2449. EventGenericEventHandler: CMD Success
  2450. WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
  2451. MCU Init Done!
  2452. efuse_probe: efuse = 10000212
  2453. RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
  2454. RtmpEepromGetDefault::e2p_dafault=1
  2455. RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
  2456. NVM is FLASH mode. dev_idx [1] FLASH OFFSET [0x8000]
  2457. NICReadEEPROMParameters: EEPROM 0x52 b313
  2458. NICReadEEPROMParameters: EEPROM 0x52 b313
  2459. Country Region from e2p = 101
  2460. mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
  2461. mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2
  2462. mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2
  2463. rtmp_read_txpwr_from_eeprom(233): Don't Support this now!
  2464. RTMPReadTxPwrPerRate(1381): Don't Support this now!
  2465. RcRadioInit(): DbdcMode=0, ConcurrentBand=1
  2466. RcRadioInit(): pRadioCtrl=87d8e454,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf
  2467. MtCmdSetDbdcCtrl:(ret = 0)
  2468. Band Rf: 1, Phy Mode: 2
  2469. AntCfgInit(2766): Not support for HIF_MT yet!
  2470. MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
  2471. MtSingleSkuLoadParam: SINGLE SKU TABLE FILE /etc/Wireless/RT2860AP/SingleSKU_5G_IC.dat!!!
  2472. MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
  2473. MtBfBackOffLoadTable: BF SKU TABLE FILE /etc/Wireless/RT2860AP/SKU_5G_IC_BF.dat!!!
  2474. EEPROM Init Done!
  2475. mt_mac_init()-->
  2476. mt_mac_pse_init(2750): Don't Support this now!
  2477. mt7615_init_mac_cr()-->
  2478. mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
  2479. mt7615_init_mac_cr(): TMAC_TRCR1=0x82783c8c
  2480. MtAsicSetMacMaxLen(1300): Not finish Yet!
  2481. <--mt_mac_init()
  2482. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  2483. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  2484. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  2485. MAC Init Done!
  2486. MT7615BBPInit():BBP Initialization.....
  2487.         Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2
  2488.         Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0
  2489. MT7615BBPInit() todo
  2490. PHY Init Done!
  2491. tx_pwr_comp_init():NotSupportYet!
  2492. MtCmdSetMacTxRx:(ret = 0)
  2493. CountryCode(2.4G/5G)=5/7, RFIC=25, PHY mode(2.4G/5G)=48/48, support 24 channels
  2494. ApAutoChannelAtBootUp----------------->
  2495. ApAutoChannelAtBootUp: AutoChannelBootup = 1, AutoChannelFlag = 1
  2496. MtCmdSetMacTxRx:(ret = 0)
  2497. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2498. MtCmdGetRXDCOCCalResult:(ret = 0)
  2499. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2500. MtCmdGetRXDCOCCalResult:(ret = 0)
  2501. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2502. MtCmdGetTXDPDCalResult:(ret = 0)
  2503. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2504. MtCmdGetTXDPDCalResult:(ret = 0)
  2505. MtCmdChannelSwitch: control_chl = 36,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2506. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2507. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2508. MtCmdGetRXDCOCCalResult:(ret = 0)
  2509. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2510. MtCmdGetRXDCOCCalResult:(ret = 0)
  2511. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2512. MtCmdGetTXDPDCalResult:(ret = 0)
  2513. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2514. MtCmdGetTXDPDCalResult:(ret = 0)
  2515. MtCmdChannelSwitch: control_chl = 40,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2516. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2517. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2518. MtCmdGetRXDCOCCalResult:(ret = 0)
  2519. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2520. MtCmdGetRXDCOCCalResult:(ret = 0)
  2521. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2522. MtCmdGetTXDPDCalResult:(ret = 0)
  2523. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2524. MtCmdGetTXDPDCalResult:(ret = 0)
  2525. MtCmdChannelSwitch: control_chl = 44,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2526. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2527. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2528. MtCmdGetRXDCOCCalResult:(ret = 0)
  2529. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2530. MtCmdGetRXDCOCCalResult:(ret = 0)
  2531. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2532. MtCmdGetTXDPDCalResult:(ret = 0)
  2533. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2534. MtCmdGetTXDPDCalResult:(ret = 0)
  2535. MtCmdChannelSwitch: control_chl = 48,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2536. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2537. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2538. MtCmdGetRXDCOCCalResult:(ret = 0)
  2539. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2540. MtCmdGetRXDCOCCalResult:(ret = 0)
  2541. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2542. MtCmdGetTXDPDCalResult:(ret = 0)
  2543. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2544. MtCmdGetTXDPDCalResult:(ret = 0)
  2545. MtCmdChannelSwitch: control_chl = 52,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2546. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2547. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2548. MtCmdGetRXDCOCCalResult:(ret = 0)
  2549. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2550. MtCmdGetRXDCOCCalResult:(ret = 0)
  2551. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2552. MtCmdGetTXDPDCalResult:(ret = 0)
  2553. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2554. MtCmdGetTXDPDCalResult:(ret = 0)
  2555. MtCmdChannelSwitch: control_chl = 56,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2556. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2557. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2558. MtCmdGetRXDCOCCalResult:(ret = 0)
  2559. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2560. MtCmdGetRXDCOCCalResult:(ret = 0)
  2561. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2562. MtCmdGetTXDPDCalResult:(ret = 0)
  2563. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2564. MtCmdGetTXDPDCalResult:(ret = 0)
  2565. MtCmdChannelSwitch: control_chl = 60,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2566. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2567. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2568. MtCmdGetRXDCOCCalResult:(ret = 0)
  2569. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2570. MtCmdGetRXDCOCCalResult:(ret = 0)
  2571. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2572. MtCmdGetTXDPDCalResult:(ret = 0)
  2573. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2574. MtCmdGetTXDPDCalResult:(ret = 0)
  2575. MtCmdChannelSwitch: control_chl = 64,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2576. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2577. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2578. MtCmdGetRXDCOCCalResult:(ret = 0)
  2579. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2580. MtCmdGetRXDCOCCalResult:(ret = 0)
  2581. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2582. MtCmdGetTXDPDCalResult:(ret = 0)
  2583. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2584. MtCmdGetTXDPDCalResult:(ret = 0)
  2585. MtCmdChannelSwitch: control_chl = 100,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2586. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2587. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2588. MtCmdGetRXDCOCCalResult:(ret = 0)
  2589. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2590. MtCmdGetRXDCOCCalResult:(ret = 0)
  2591. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2592. MtCmdGetTXDPDCalResult:(ret = 0)
  2593. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2594. MtCmdGetTXDPDCalResult:(ret = 0)
  2595. MtCmdChannelSwitch: control_chl = 104,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2596. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2597. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2598. MtCmdGetRXDCOCCalResult:(ret = 0)
  2599. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2600. MtCmdGetRXDCOCCalResult:(ret = 0)
  2601. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2602. MtCmdGetTXDPDCalResult:(ret = 0)
  2603. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2604. MtCmdGetTXDPDCalResult:(ret = 0)
  2605. MtCmdChannelSwitch: control_chl = 108,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2606. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2607. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2608. MtCmdGetRXDCOCCalResult:(ret = 0)
  2609. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2610. MtCmdGetRXDCOCCalResult:(ret = 0)
  2611. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2612. MtCmdGetTXDPDCalResult:(ret = 0)
  2613. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2614. MtCmdGetTXDPDCalResult:(ret = 0)
  2615. MtCmdChannelSwitch: control_chl = 112,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2616. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2617. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2618. MtCmdGetRXDCOCCalResult:(ret = 0)
  2619. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2620. MtCmdGetRXDCOCCalResult:(ret = 0)
  2621. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2622. MtCmdGetTXDPDCalResult:(ret = 0)
  2623. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2624. MtCmdGetTXDPDCalResult:(ret = 0)
  2625. MtCmdChannelSwitch: control_chl = 116,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2626. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2627. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2628. MtCmdGetRXDCOCCalResult:(ret = 0)
  2629. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2630. MtCmdGetRXDCOCCalResult:(ret = 0)
  2631. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2632. MtCmdGetTXDPDCalResult:(ret = 0)
  2633. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2634. MtCmdGetTXDPDCalResult:(ret = 0)
  2635. MtCmdChannelSwitch: control_chl = 120,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2636. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2637. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2638. MtCmdGetRXDCOCCalResult:(ret = 0)
  2639. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2640. MtCmdGetRXDCOCCalResult:(ret = 0)
  2641. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2642. MtCmdGetTXDPDCalResult:(ret = 0)
  2643. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2644. MtCmdGetTXDPDCalResult:(ret = 0)
  2645. MtCmdChannelSwitch: control_chl = 124,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2646. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2647. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2648. MtCmdGetRXDCOCCalResult:(ret = 0)
  2649. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2650. MtCmdGetRXDCOCCalResult:(ret = 0)
  2651. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2652. MtCmdGetTXDPDCalResult:(ret = 0)
  2653. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2654. MtCmdGetTXDPDCalResult:(ret = 0)
  2655. MtCmdChannelSwitch: control_chl = 128,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2656. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2657. ====================================================================
  2658. Channel  36 : Busy Time =  21018, Skip Channel = FALSE, BwCap = TRUE
  2659. Channel  40 : Busy Time =  21645, Skip Channel = FALSE, BwCap = TRUE
  2660. Channel  44 : Busy Time =  28937, Skip Channel = FALSE, BwCap = TRUE
  2661. Channel  48 : Busy Time =  22616, Skip Channel = FALSE, BwCap = TRUE
  2662. Channel  52 : Busy Time =   5644, Skip Channel = FALSE, BwCap = TRUE
  2663. Channel  56 : Busy Time =   1554, Skip Channel = FALSE, BwCap = TRUE
  2664. Channel  60 : Busy Time =   2082, Skip Channel = FALSE, BwCap = TRUE
  2665. Channel  64 : Busy Time =   8884, Skip Channel = FALSE, BwCap = TRUE
  2666. Channel 100 : Busy Time =   7385, Skip Channel = FALSE, BwCap = TRUE
  2667. Channel 104 : Busy Time =  12018, Skip Channel = FALSE, BwCap = TRUE
  2668. Channel 108 : Busy Time =   6430, Skip Channel = FALSE, BwCap = TRUE
  2669. Channel 112 : Busy Time =   1402, Skip Channel = FALSE, BwCap = TRUE
  2670. Channel 116 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
  2671. Channel 120 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
  2672. Channel 124 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
  2673. Channel 128 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
  2674. ====================================================================
  2675. Rule 3 Channel Busy time value : Select Primary Channel 116
  2676. Rule 3 Channel Busy time value : Min Channel Busy = 12018
  2677. Rule 3 Channel Busy time value : BW = 160
  2678.  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 48,Channel = 116  
  2679. ApAutoChannelAtBootUp<-----------------
  2680. WifiSysOpen(), wdev idx = 0
  2681. wdev_attr_update(): wdevId0 = xx:xx:xx:xx:xx:xx
  2682. MtCmdSetDbdcCtrl:(ret = 0)
  2683. Current Channel is 116. DfsZeroWaitSupport=0
  2684. [PMF]APPMFInit:: apidx=0, MFPC=0, MFPR=0, SHA256=0
  2685. [PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
  2686. HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:48,Channel=116
  2687. Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
  2688. wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
  2689.  LinkToOmacIdx = 0, LinkToWdevType = 1
  2690. bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 8192,                 CmdBssInfoBmcRate.u2McTransmit = 8196
  2691.  [RadarStateCheck]Set into RD_NORMAL_MODE  
  2692. MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 0, BandIdx: 0
  2693. MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 0, BandIdx: 0
  2694. MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 0, BandIdx: 0
  2695. mt7615_bbp_adjust():rf_bw=3, ext_ch=1, PrimCh=116, HT-CentCh=118, VHT-CentCh=114
  2696. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2697. MtCmdGetRXDCOCCalResult:(ret = 0)
  2698. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2699. MtCmdGetRXDCOCCalResult:(ret = 0)
  2700. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2701. MtCmdGetTXDPDCalResult:(ret = 0)
  2702. :MtCmdPktBudgetCtrl: bssid(255),wcid(65535),type(0)
  2703. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2704. MtCmdGetTXDPDCalResult:(ret = 0)
  2705. MtCmdChannelSwitch: control_chl = 116,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2706. BW = 3,TXStream = 4, RXStream = 4, scan(0)
  2707. ap_phy_rrm_init_byRf(): AP Set CentralFreq at 114(Prim=116, HT-CentCh=118, VHT-CentCh=114, BBP_BW=3)
  2708. [WrapDfsRadarDetectStart]: Band0Ch is 116
  2709. [WrapDfsRadarDetectStart]: Band1Ch is 0
  2710. LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
  2711. MtAsicSetRalinkBurstMode(2605): Not support for HIF_MT yet!
  2712. MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
  2713. MtAsicSetTxPreamble(2584): Not support for HIF_MT yet!
  2714. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=1, LED_CMD=2!
  2715. AndesLedEnhanceOP: Success!
  2716. ap_ftkd> Initialize FT KDP Module...
  2717. Main bssid = xx:xx:xx:xx:xx:xx
  2718. AsicRadioOnOffCtrl(): DbdcIdx=0 RadioOn
  2719. MtCmdSetMacTxRx:(ret = 0)
  2720. fdb_enable()
  2721. MCS Set = ff ff ff ff 01
  2722. <==== mt_wifi_init, Status=0
  2723. MtCmdEDCCACtrl: BandIdx: 0, EDCCACtrl: 1
  2724. MtCmdEDCCACtrl: BandIdx: 1, EDCCACtrl: 1
  2725. WtcSetMaxStaNum: MaxStaNum:81, BssidNum:1, WdsNum:10, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
  2726. red_is_enabled: set CR4/N9 RED Enable to 1.
  2727. cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
  2728. br0: port 3(rai0) entered blocking state
  2729. br0: port 3(rai0) entered disabled state
  2730. device rai0 entered promiscuous mode
  2731. br0: port 3(rai0) entered blocking state
  2732. br0: port 3(rai0) entered forwarding state
  2733. wland: No such file or directory
  2734. syslogd: Already running.
  2735. klogd: Already running.
  2736. device vlan2 entered promiscuous mode
  2737. cp: cannot stat '/tmp/mycron.d/*': No such file or directory
  2738. cp: cannot stat '/jffs/mycron.d/*': No such file or directory
  2739. cp: cannot stat '/mmc/mycron.d/*': No such file or directory
  2740. Key is a ssh-rsa key
  2741. Wrote key to '/tmp/root/.ssh/ssh_host_rsa_key'
  2742. NET: Registered protocol family 10
  2743. Segment Routing with IPv6
  2744. fast-classifier: starting up
  2745. fast-classifier: registered
  2746. cat: /proc/net/ip_conntrack_flush: No such file or directory
  2747. 0
  2748. /etc/config/eop-tunnel.firewall: line 16: [: -eq: unary operator expected
  2749. iptables: No chain/target/match by that name.
  2750. iptables: No chain/target/match by that name.
  2751. iptables: No chain/target/match by that name.
  2752. device vlan2 left promiscuous mode
  2753. ==>Set_RadioOn_Proc (ON) equal to current state, ignore!!! (wdev_idx 0)
  2754. ==>Set_RadioOn_Proc (ON) equal to current state, ignore!!! (wdev_idx 0)
  2755. /opt/etc/init.d/rcS: No such file or directory
  2756. /jffs/etc/init.d/rcS: No such file or directory
  2757. /mmc/etc/init.d/rcS: No such file or directory
  2758. rmmod: ERROR: Module eoip is not currently loaded
  2759. /etc/config/eop-tunnel.startup: line 18: [: -eq: unary operator expected
  2760. proxywatchdog.sh: no process found
  2761. /mnt/smbshare
  2762. umount: /mnt/smbshare: no mount point specified.
  2763. rmmod: ERROR: Module cifs is not currently loaded
  2764. rmmod: ERROR: Module fscache is not currently loaded
  2765. schedulerb.sh: no process found
  2766. shatd: no process found
  2767. wdswatchdog.sh: no process found
  2768. The Milkfish Router Services
  2769. ERROR: Necessary service setting not found: milkfish_username - aborting.
  2770. The Milkfish Router Services
  2771. Restoring SIP ddsubscriber database from NVRAM...
  2772. Empty.
  2773. The Milkfish Router Services
  2774. Restoring SIP ddaliases database from NVRAM...
  2775. Empty.
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