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Sep 25th, 2021
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  1. #ifndef __SPI_FLASH_CONFIG_H
  2. #define __SPI_FLASH_CONFIG_H
  3.  
  4. #include "stm32f4xx.h"
  5.  
  6. #define USE_DMA
  7.  
  8. /* M25P SPI Flash supported commands */
  9. #define sFLASH_CMD_WRITE        0x02 /* Write to Memory instruction */
  10. #define sFLASH_CMD_WRSR         0x01 /* Write Status Register instruction */
  11. #define sFLASH_CMD_WREN         0x06 /* Write enable instruction */
  12. #define sFLASH_CMD_READ         0x03 /* Read from Memory instruction */
  13. #define sFLASH_CMD_RDSR         0x05 /* Read Status Register instruction  */
  14. #define sFLASH_CMD_RDID         0x9F /* Read identification */
  15. #define sFLASH_CMD_SE           0xD8 /* Sector Erase instruction */
  16. #define sFLASH_CMD_SSE          0x20 /* Small Sector Erase instruction (4K-byte) */
  17. #define sFLASH_CMD_BE           0xC7 /* Bulk Erase instruction */
  18.  
  19. #define sFLASH_WIP_FLAG         0x01 /* Write In Progress (WIP) flag */
  20.  
  21. #define sFLASH_DUMMY_BYTE       0xFF /* Just a high level */
  22. #define sFLASH_SPI_PAGESIZE     0x100
  23. #define sFLASH_SPI_MASK         (sFLASH_SPI_PAGESIZE - 1U)
  24.  
  25. #define sFLASH_M25P128_ID       0x202018
  26. #define sFLASH_M25P64_ID        0x202017
  27. #define sFLASH_GD25Q127C_ID     0xC84018
  28.  
  29. /* DMA defs */
  30. #define sFLASH_DMA                      DMA2
  31. #define sFLASH_DMA_CLK                  RCC_AHB1Periph_DMA2
  32. #define sFLASH_DMA_CLK_ENR              RCC->AHB1ENR
  33.  
  34. #define sFLASH_DMA_TX_FLAG_HT           DMA_FLAG_HTIF3
  35. #define sFLASH_DMA_TX_FLAG_TC           DMA_FLAG_TCIF3
  36. #define sFLASH_DMA_TX_FLAG_GL           (DMA_FLAG_HTIF3 | DMA_FLAG_TCIF3)
  37.  
  38. #define sFLASH_DMA_RX_FLAG_HT           DMA_FLAG_HTIF0
  39. #define sFLASH_DMA_RX_FLAG_TC           DMA_FLAG_TCIF0
  40. #define sFLASH_DMA_RX_FLAG_GL           (DMA_FLAG_HTIF0 | DMA_FLAG_TCIF0)
  41.  
  42. #define sFLASH_DMA_TX_CHANNEL           DMA_Channel_3
  43. #define sFLASH_DMA_RX_CHANNEL           DMA_Channel_3
  44. #define sFLASH_DMA_TX_STREAM            DMA2_Stream3
  45. #define sFLASH_DMA_RX_STREAM            DMA2_Stream0
  46.  
  47. #define sFLASH_DMA_ISR                  LISR
  48. #define sFLASH_DMA_IFCR                 LIFCR
  49.  
  50. #define DMA_CCR_EN                      DMA_SxCR_EN
  51. #define DMA_CCR_DIR                     DMA_SxCR_DIR
  52. #define DMA_CCR_MINC                    DMA_SxCR_MINC
  53. #define CCR                             CR
  54. #define CNDTR                           NDTR
  55. #define CPAR                            PAR
  56. #define CMAR                            M0AR
  57.  
  58. /* M25P FLASH SPI Interface pins  */
  59. #define sFLASH_SPI                      SPI1
  60. #define sFLASH_SPI_CLK                  RCC_APB2Periph_SPI1
  61. #define sFLASH_SPI_CLK_ENR              RCC->APB2ENR
  62. #define sFLASH_SPI_IRQn                 SPI1_IRQn
  63. #define sFLASH_SPI_IRQHandler           SPI1_IRQHandler
  64.  
  65. #define sFLASH_SPI_SCK_PIN              GPIO_Pin_5
  66. #define sFLASH_SPI_SCK_GPIO_PORT        GPIOA
  67. #define sFLASH_SPI_SCK_GPIO_CLK         RCC_AHB1Periph_GPIOA
  68. #define sFLASH_SPI_SCK_SOURCE           GPIO_PinSource5
  69. #define sFLASH_SPI_SCK_AF               GPIO_AF_SPI1
  70.  
  71. #define sFLASH_SPI_MISO_PIN             GPIO_Pin_6
  72. #define sFLASH_SPI_MISO_GPIO_PORT       GPIOA
  73. #define sFLASH_SPI_MISO_GPIO_CLK        RCC_AHB1Periph_GPIOA
  74. #define sFLASH_SPI_MISO_SOURCE          GPIO_PinSource6
  75. #define sFLASH_SPI_MISO_AF              GPIO_AF_SPI1
  76.  
  77. #define sFLASH_SPI_MOSI_PIN             GPIO_Pin_7
  78. #define sFLASH_SPI_MOSI_GPIO_PORT       GPIOA
  79. #define sFLASH_SPI_MOSI_GPIO_CLK        RCC_AHB1Periph_GPIOA
  80. #define sFLASH_SPI_MOSI_SOURCE          GPIO_PinSource7
  81. #define sFLASH_SPI_MOSI_AF              GPIO_AF_SPI1
  82.  
  83. #define sFLASH_CS_PIN                   GPIO_Pin_4
  84. #define sFLASH_CS_GPIO_PORT             GPIOA
  85. #define sFLASH_CS_GPIO_CLK              RCC_AHB1Periph_GPIOA
  86.  
  87. #define sFLASH_GPIO_CLK_ENR             RCC->AHB1ENR
  88.  
  89. #define SAME_PINS_PORT //If all SPI pins are on the same port.
  90.  
  91. /* Select sFLASH: Chip Select pin low */
  92. #define sFLASH_CS_LOW()         sFLASH_CS_GPIO_PORT->BSRRH = sFLASH_CS_PIN;
  93. /* Deselect sFLASH: Chip Select pin high */
  94. #define sFLASH_CS_HIGH()        sFLASH_CS_GPIO_PORT->BSRRL = sFLASH_CS_PIN;
  95.  
  96. #define sFLASH_SEND_BYTE(x, y)  SPI_I2S_SendData(x, y)
  97.  
  98. #define sFLASH_RECEIVE_BYTE(x)  SPI_I2S_ReceiveData(x)
  99.  
  100. #endif /* __SPI_FLASH_CONFIG_H */
  101.  
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