library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.std_logic_unsigned.all;
use IEEE.numeric_std.all;


use work.filter_pkg.all;


    entity lfsr is
        generic (num_hash_bits : integer);
    port (
          clk : in std_logic;
          random_num : out std_logic_vector (num_hash_bits-1 downto 0)   --output vector
        );
    end lfsr;

    architecture Behavioral of lfsr is
    begin

     process(clk)

     variable rand_temp : std_logic_vector(num_hash_bits-1 downto 0):=(num_hash_bits-1 => '1',others => '0');
    variable temp : std_logic := '0';

     begin
         if(rising_edge(clk)) then
         temp := rand_temp(num_hash_bits-1) xor rand_temp(num_hash_bits-2);
         rand_temp(num_hash_bits-1 downto 1) := rand_temp(num_hash_bits-2 downto 0);
         rand_temp(0) := temp;
         end if;
      random_num <= rand_temp;
    end process;


end Behavioral;