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- library IEEE;
- use IEEE.STD_LOGIC_1164.ALL;
- use IEEE.NUMERIC_STD.ALL;
- entity uc is
- Port (
- CLK : in STD_LOGIC;
- RESET : in STD_LOGIC;
- GPIO_0 : out STD_LOGIC_VECTOR(15 downto 0);
- GPIO_1 : out STD_LOGIC_VECTOR(15 downto 0) );
- end entity;
- architecture Behavioral of uc is
- type rom_t is array ( 0 to 255 ) of STD_LOGIC_VECTOR(15 downto 0);
- type ram_t is array ( 0 to 63 ) of STD_LOGIC_VECTOR(7 downto 0);
- -- memory
- signal RAM : ram_t := (x"02", x"03", others => x"00");
- signal ROM : rom_t := (x"0100", x"0600", x"0102", x"0601",
- x"0200", x"0801", x"0A01", x"0600",
- x"0201", x"0A01", x"0601", x"0200",
- x"1C0A", x"2300", x"2004", x"1E0E",
- others=>x"0000");
- -- signals
- signal C : STD_LOGIC := '0';
- signal Z : STD_LOGIC := '0';
- signal i : STD_LOGIC_VECTOR (15 downto 0) := (others => '0');
- signal a : STD_LOGIC_VECTOR( 7 downto 0 ) := (others => '0');
- signal o : STD_LOGIC_VECTOR( 7 downto 0 ) := (others => '0');
- signal ac : STD_LOGIC_VECTOR(15 downto 0) := (others => '1');
- signal ct : INTEGER := 0;
- signal adrt : STD_LOGIC_VECTOR ( 7 downto 0 ) := (others => '0');
- begin
- -- INSTRUCTION DECODER
- process(CLK, RESET)
- variable ADDR : STD_LOGIC_VECTOR ( 7 downto 0 ) := (others => '0');
- variable CNT : INTEGER := 0;
- variable INSTR : STD_LOGIC_VECTOR ( 15 downto 0 ) := (others => '0');
- variable OPCODE : STD_LOGIC_VECTOR ( 7 downto 0 ) := (others => '0');
- variable ARG : STD_LOGIC_VECTOR ( 7 downto 0 ) := (others => '0');
- variable ACC : STD_LOGIC_VECTOR ( 15 downto 0 ) := (others => '1');
- variable TMP : STD_LOGIC_VECTOR(8 downto 0) := (others => '0');
- begin
- if RESET = '1' then
- GPIO_0 <= (others => '0');
- GPIO_1 <= (others => '0');
- CNT := 0;
- elsif RISING_EDGE(CLK) then
- INSTR := ROM(CNT);
- OPCODE := INSTR(15 downto 8);
- ARG := INSTR(7 downto 0);
- if OPCODE = x"00" then -- NOP
- CNT := CNT + 1;
- elsif OPCODE = x"01" then -- LOAD #ddd, ACC = ddd
- ACC := x"00" & ARG;
- CNT := CNT + 1;
- elsif OPCODE = x"02" then -- LOAD aaa, ACC = RAM(aaa)
- ADDR := ARG;
- ACC := x"00" & RAM(TO_INTEGER(UNSIGNED(ADDR)));
- CNT := CNT + 1;
- elsif OPCODE = x"03" then -- LOADW aaa, ACC = RAM(aaa+1):RAM(aaa)
- elsif OPCODE = x"04" then -- LOAD @aaa, ACC = RAM(RAM(aaa))
- elsif OPCODE = x"05" then -- LOADW @aaa, ACC = RAM(RAM(aaa+1)):RAM(RAM(aaa))
- elsif OPCODE = x"06" then -- STORE aaa, RAM(aaa) = ACC
- RAM(TO_INTEGER(UNSIGNED(ARG))) <= ACC(7 downto 0);
- CNT := CNT + 1;
- elsif OPCODE = x"07" then -- STOREW aaa, RAM(aaa+1):RAM(aaa) = ACCH:ACCL
- elsif OPCODE = x"08" then -- STORE @aaa, RAM(RAM(aaa)) = ACC
- ADDR := RAM(TO_INTEGER(UNSIGNED(ARG)));
- RAM(TO_INTEGER(UNSIGNED(ADDR))) <= ACC(7 downto 0);
- CNT := CNT + 1;
- elsif OPCODE = x"09" then -- STOREW @aaa, RAM(RAM(aaa+1)):RAM(RAM(aaa) = ACCH:ACCL
- elsif OPCODE = x"0A" then -- ADD #ddd, ACC = ACC + ddd
- TMP := STD_LOGIC_VECTOR(UNSIGNED('0' & ACC(7 downto 0)) + UNSIGNED(ARG));
- C <= TMP(8);
- ACC := x"00" & TMP(7 downto 0);
- CNT := CNT + 1;
- elsif OPCODE = x"0B" then -- ADD aaa, ACC = ACC + RAM(aaa);
- ADDR := ARG;
- TMP := STD_LOGIC_VECTOR(UNSIGNED('0' & ACC(7 downto 0)) + UNSIGNED(RAM(TO_INTEGER(UNSIGNED(ADDR)))));
- C <= TMP(8);
- ACC := x"00" & TMP(7 downto 0);
- CNT := CNT + 1;
- elsif OPCODE = x"0C" then -- ADDW aaa, ACC = ACC + RAM(aaa+1):RAM(aaa)
- elsif OPCODE = x"0D" then -- SUB #ddd, ACC = ACC - ddd
- if ACC(7 downto 0) >= ARG then
- TMP := STD_LOGIC_VECTOR(UNSIGNED('0' & ACC(7 downto 0)) + UNSIGNED(ARG));
- Z <= '0';
- CNT := CNT + 1;
- elsif ACC(7 downto 0) < ARG then
- TMP := STD_LOGIC_VECTOR(UNSIGNED('0' & ARG) - UNSIGNED(ACC(7 downto 0)));
- Z <= '1';
- CNT := CNT + 1;
- end if;
- elsif OPCODE = x"0E" then -- SUB aaa, ACC = ACC - RAM(aaa)
- ADDR := ARG;
- if ACC(7 downto 0) >= RAM(TO_INTEGER(UNSIGNED(ADDR))) then
- TMP := STD_LOGIC_VECTOR(UNSIGNED('0' & ACC) - UNSIGNED(RAM(TO_INTEGER(UNSIGNED(ADDR)))));
- ACC := x"00" & TMP(7 downto 0);
- Z <= '0';
- CNT := CNT + 1;
- elsif ACC(7 downto 0) < RAM(TO_INTEGER(UNSIGNED(ADDR))) then
- TMP := STD_LOGIC_VECTOR(UNSIGNED('0' & RAM(TO_INTEGER(UNSIGNED(ADDR)))) - UNSIGNED(ACC));
- ACC := x"00" & TMP(7 downto 0);
- CNT := CNT + 1;
- Z <= '1';
- end if;
- elsif OPCODE = x"0F" then -- SUBW aaa, ACC = ACC - RAM(aaa+1):RAM(aaa)
- elsif OPCODE = x"10" then -- NOT ddd, ACC = not ddd
- ACC := x"00" & not ARG;
- CNT := CNT + 1;
- elsif OPCODE = x"11" then -- NOT aaa, ACC = not RAM(aaa)
- ADDR := ARG;
- ACC := x"00" & not RAM(TO_INTEGER(UNSIGNED(ADDR)));
- CNT := CNT + 1;
- elsif OPCODE = x"12" then -- NOT @aaa, ACC = not RAM(RAM(aaa))
- elsif OPCODE = x"13" then -- AND ddd, ACC = ACC and ddd
- TMP := ACC(7 downto 0) and ARG;
- ACC := x"00" & TMP(7 downto 0);
- CNT := CNT + 1;
- elsif OPCODE = x"14" then -- AND aaa, ACC = ACC and RAM(aaa)
- ADDR := ARG;
- TMP := ACC(7 downto 0) and RAM(TO_INTEGER(UNSIGNED(ADDR)));
- ACC := x"00" & TMP( 7 downto 0 );
- CNT := CNT + 1;
- elsif OPCODE = x"15" then -- AND @aaa, ACC = ACC and RAM(RAM(aaa))
- elsif OPCODE = x"16" then -- OR ddd, ACC = ACC or ddd
- TMP := ACC(7 downto 0) or ARG;
- ACC := x"00" & TMP(7 downto 0);
- CNT := CNT + 1;
- elsif OPCODE = x"17" then -- OR aaa, ACC = ACC or RAM(aaa)
- ADDR := ARG;
- TMP := ACC(7 downto 0) or RAM(TO_INTEGER(UNSIGNED(ADDR)));
- ACC := x"00" & TMP(7 downto 0);
- CNT := CNT + 1;
- elsif OPCODE = x"18" then -- OR @aaa, ACC = ACC or RAM(RAM(aaa))
- elsif OPCODE = x"19" then -- XOR ddd, ACC = ACC xor ddd
- TMP := ACC(7 downto 0) xor ARG;
- ACC := x"00" & TMP(7 downto 0);
- CNT := CNT + 1;
- elsif OPCODE = x"1A" then -- XOR aaa, ACC = ACC xor RAM(aaa)
- ADDR := ARG;
- TMP := ACC(7 downto 0) xor RAM(TO_INTEGER(UNSIGNED(ADDR)));
- ACC := x"00" & TMP(7 downto 0);
- CNT := CNT + 1;
- elsif OPCODE = x"1B" then -- XOR @aaa, ACC = ACC xor RAM(RAM(aaa))
- elsif OPCODE = x"1C" then -- CMP #ddd, if(ACC=ddd) Z=1 elsif(ACC<ddd) C=1
- if ACC(7 downto 0) = ARG then
- Z <= '1';
- CNT := CNT + 1;
- elsif ACC(7 downto 0) < ARG then
- C <= '1';
- CNT := CNT + 1;
- end if;
- elsif OPCODE = x"1D" then -- CMP aaa, if(ACC=RAM(aaa)) Z=1 elsif( ACC<RAM(aaa)) C=1
- ADDR := ARG;
- if ACC(7 downto 0) = RAM(TO_INTEGER(UNSIGNED(ADDR))) then
- Z <= '1';
- CNT := CNT + 1;
- elsif ACC(7 downto 0) < RAM(TO_INTEGER(UNSIGNED(ADDR))) then
- C <= '1';
- CNT := CNT + 1;
- end if;
- elsif OPCODE = x"1E" then -- JUMP aaa, CNT = aaa
- CNT := TO_INTEGER(UNSIGNED(ARG));
- elsif OPCODE = x"1F" then -- JUMPZ aaa, if(Z) CNT = aaa
- if Z = '1' then
- CNT := TO_INTEGER(UNSIGNED(ARG));
- else
- CNT := CNT + 1;
- end if;
- elsif OPCODE = x"20" then -- JUMPNZ aaa, if(notZ) CNT = aaa
- if Z = '0' then
- CNT := TO_INTEGER(UNSIGNED(ARG));
- else
- CNT := CNT + 1;
- end if;
- elsif OPCODE = x"21" then -- JUMPC aaa, if(C) CNT = aaa
- if C = '1' then
- CNT := TO_INTEGER(UNSIGNED(ARG));
- else
- CNT := CNT + 1;
- end if;
- elsif OPCODE = x"22" then -- JUMPNC aaa, if(notC) CNT = aaa
- if C = '0' then
- CNT := TO_INTEGER(UNSIGNED(ARG));
- else
- CNT := CNT + 1;
- end if;
- elsif OPCODE = x"23" then -- OUT ddd, GPIOddd = ACC
- if ARG = x"00" then
- GPIO_0 <= ACC;
- elsif ARG = x"01" then
- GPIO_1 <= ACC;
- end if;
- CNT := CNT + 1;
- end if;
- i <= INSTR;
- a <= ARG;
- o <= OPCODE;
- ac <= ACC;
- ct <= CNT;
- adrt <= ADDR;
- end if;
- end process;
- end Behavioral;
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