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  1. module automat_0101
  2. (
  3. input x, clk, reset,
  4. output reg y,
  5. output LED
  6. );
  7. wire slow_clk
  8. reg [26:0] div_clk;
  9.  
  10. always@(posedge clk,posedge reset)
  11.  
  12. if(reset)
  13.     div_clk <= 0;
  14. else
  15.     div_clk <= div_clk +1;
  16.  
  17. assign slow_clk = div_clk[26];
  18. assign LED=slow_clk;
  19.  
  20. reg[2:0] aut_reg, aut_next;
  21. localparam s0=0,s1=1,s2=2,s3=3,s4=4;
  22.  
  23. always@(*)
  24.     case(aut_reg)
  25.         s0: if(x) aut_next = s0;
  26.             else aut_next = s1;
  27.         s1: if(x) aut_next = s0;
  28.             else aut_next = s2;
  29.         s2: if(x) aut_next = s0;
  30.             else aut_next = s3;
  31.         s3: if(x) aut_next = s4;
  32.             else aut_next = s1;
  33.         s4: if(x) aut_next = s0;
  34.             else aut_next = s1;
  35.         default: aut_next = s0;
  36.     endcase
  37.  
  38. always@(posedge slow_clk, posedge reset)
  39.  
  40. if(reset)
  41.     aut_reg <= s0;
  42. else
  43.     aut_reg <= aut_next;
  44. always@(*)
  45.             if(aut_reg==s4)y=1;
  46.             else y=0;
  47. endmodule
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