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  1. # HG changeset patch
  2. # User Igor M. Liplianin <liplianin@me.by>
  3. # Date 1259080698 -7200
  4. # Node ID 437554d884f713bd0006677025f1afce408644bf
  5. # Parent 8bff7e6c44d49e0bd91e9ae7e150651fff31db99
  6. TeVii S470 and TBS 6920 fixes
  7.  
  8. From: Igor M. Liplianin <liplianin@me.by>
  9.  
  10. The new hardware design applied for this cards.
  11. Silicon Labs C8051F300 microcontroller is used for LNB power control.
  12. It connected to cx23885 GPIO pins:
  13. GPIO0 - P0.3 data
  14. GPIO1 - P0.2 reset
  15. GPIO2 - P0.1 clk
  16. GPIO3 - P0.1 busy
  17. Tevii S470 based on Montage Technology M88TS2020 digital satellite tuner
  18. and M88DS3000 advanced DVB-S/S2 demodulator.
  19.  
  20. Signed-off-by: Igor M. Liplianin <liplianin@me.by>
  21.  
  22. diff -r 8bff7e6c44d4 -r 437554d884f7 linux/drivers/media/dvb/frontends/Kconfig
  23. --- a/linux/drivers/media/dvb/frontends/Kconfig Sun Nov 15 12:14:14 2009 +0100
  24. +++ b/linux/drivers/media/dvb/frontends/Kconfig Tue Nov 24 18:38:18 2009 +0200
  25. @@ -201,6 +201,13 @@
  26. help
  27. A DVB-S tuner module. Say Y when you want to support this frontend.
  28.  
  29. +config DVB_DS3000
  30. + tristate "Montage Tehnology DS3000 based"
  31. + depends on DVB_CORE && I2C
  32. + default m if DVB_FE_CUSTOMISE
  33. + help
  34. + A DVB-S/S2 tuner module. Say Y when you want to support this frontend.
  35. +
  36. comment "DVB-T (terrestrial) frontends"
  37. depends on DVB_CORE
  38.  
  39. diff -r 8bff7e6c44d4 -r 437554d884f7 linux/drivers/media/dvb/frontends/Makefile
  40. --- a/linux/drivers/media/dvb/frontends/Makefile Sun Nov 15 12:14:14 2009 +0100
  41. +++ b/linux/drivers/media/dvb/frontends/Makefile Tue Nov 24 18:38:18 2009 +0200
  42. @@ -77,3 +77,4 @@
  43. obj-$(CONFIG_DVB_STV6110x) += stv6110x.o
  44. obj-$(CONFIG_DVB_ISL6423) += isl6423.o
  45. obj-$(CONFIG_DVB_EC100) += ec100.o
  46. +obj-$(CONFIG_DVB_DS3000) += ds3000.o
  47. diff -r 8bff7e6c44d4 -r 437554d884f7 linux/drivers/media/dvb/frontends/ds3000.c
  48. --- /dev/null Thu Jan 01 00:00:00 1970 +0000
  49. +++ b/linux/drivers/media/dvb/frontends/ds3000.c Tue Nov 24 18:38:18 2009 +0200
  50. @@ -0,0 +1,1367 @@
  51. +/*
  52. + Montage Technology DS3000/TS2020 - DVBS/S2 Demodulator/Tuner driver
  53. + Copyright (C) 2009 Konstantin Dimitrov <kosio.dimitrov@gmail.com>
  54. +
  55. + Copyright (C) 2009 TurboSight.com
  56. +
  57. + This program is free software; you can redistribute it and/or modify
  58. + it under the terms of the GNU General Public License as published by
  59. + the Free Software Foundation; either version 2 of the License, or
  60. + (at your option) any later version.
  61. +
  62. + This program is distributed in the hope that it will be useful,
  63. + but WITHOUT ANY WARRANTY; without even the implied warranty of
  64. + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  65. + GNU General Public License for more details.
  66. +
  67. + You should have received a copy of the GNU General Public License
  68. + along with this program; if not, write to the Free Software
  69. + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  70. + */
  71. +
  72. +#include <linux/slab.h>
  73. +#include <linux/kernel.h>
  74. +#include <linux/module.h>
  75. +#include <linux/moduleparam.h>
  76. +#include <linux/init.h>
  77. +#include <linux/firmware.h>
  78. +
  79. +#include "dvb_frontend.h"
  80. +#include "ds3000.h"
  81. +
  82. +static int debug;
  83. +
  84. +#define dprintk(args...) \
  85. + do { \
  86. + if (debug) \
  87. + printk(args); \
  88. + } while (0)
  89. +
  90. +/* as of March 2009 current DS3000 firmware version is 1.78 */
  91. +/* DS3000 FW v1.78 MD5: a32d17910c4f370073f9346e71d34b80 */
  92. +#define DS3000_DEFAULT_FIRMWARE "dvb-fe-ds3000.fw"
  93. +
  94. +#define DS3000_SAMPLE_RATE 96000 /* in kHz */
  95. +#define DS3000_XTAL_FREQ 27000 /* in kHz */
  96. +
  97. +/* Register values to initialise the demod in DVB-S mode */
  98. +static u8 ds3000_dvbs_init_tab[] = {
  99. + 0x23, 0x05,
  100. + 0x08, 0x03,
  101. + 0x0c, 0x00,
  102. + 0x21, 0x54,
  103. + 0x25, 0x82,
  104. + 0x27, 0x31,
  105. + 0x30, 0x08,
  106. + 0x31, 0x40,
  107. + 0x32, 0x32,
  108. + 0x33, 0x35,
  109. + 0x35, 0xff,
  110. + 0x3a, 0x00,
  111. + 0x37, 0x10,
  112. + 0x38, 0x10,
  113. + 0x39, 0x02,
  114. + 0x42, 0x60,
  115. + 0x4a, 0x40,
  116. + 0x4b, 0x04,
  117. + 0x4d, 0x91,
  118. + 0x5d, 0xc8,
  119. + 0x50, 0x77,
  120. + 0x51, 0x77,
  121. + 0x52, 0x36,
  122. + 0x53, 0x36,
  123. + 0x56, 0x01,
  124. + 0x63, 0x43,
  125. + 0x64, 0x30,
  126. + 0x65, 0x40,
  127. + 0x68, 0x26,
  128. + 0x69, 0x4c,
  129. + 0x70, 0x20,
  130. + 0x71, 0x70,
  131. + 0x72, 0x04,
  132. + 0x73, 0x00,
  133. + 0x70, 0x40,
  134. + 0x71, 0x70,
  135. + 0x72, 0x04,
  136. + 0x73, 0x00,
  137. + 0x70, 0x60,
  138. + 0x71, 0x70,
  139. + 0x72, 0x04,
  140. + 0x73, 0x00,
  141. + 0x70, 0x80,
  142. + 0x71, 0x70,
  143. + 0x72, 0x04,
  144. + 0x73, 0x00,
  145. + 0x70, 0xa0,
  146. + 0x71, 0x70,
  147. + 0x72, 0x04,
  148. + 0x73, 0x00,
  149. + 0x70, 0x1f,
  150. + 0x76, 0x00,
  151. + 0x77, 0xd1,
  152. + 0x78, 0x0c,
  153. + 0x79, 0x80,
  154. + 0x7f, 0x04,
  155. + 0x7c, 0x00,
  156. + 0x80, 0x86,
  157. + 0x81, 0xa6,
  158. + 0x85, 0x04,
  159. + 0xcd, 0xf4,
  160. + 0x90, 0x33,
  161. + 0xa0, 0x44,
  162. + 0xc0, 0x18,
  163. + 0xc3, 0x10,
  164. + 0xc4, 0x08,
  165. + 0xc5, 0x80,
  166. + 0xc6, 0x80,
  167. + 0xc7, 0x0a,
  168. + 0xc8, 0x1a,
  169. + 0xc9, 0x80,
  170. + 0xfe, 0x92,
  171. + 0xe0, 0xf8,
  172. + 0xe6, 0x8b,
  173. + 0xd0, 0x40,
  174. + 0xf8, 0x20,
  175. + 0xfa, 0x0f,
  176. + 0xfd, 0x20,
  177. + 0xad, 0x20,
  178. + 0xae, 0x07,
  179. + 0xb8, 0x00,
  180. +};
  181. +
  182. +/* Register values to initialise the demod in DVB-S2 mode */
  183. +static u8 ds3000_dvbs2_init_tab[] = {
  184. + 0x23, 0x0f,
  185. + 0x08, 0x07,
  186. + 0x0c, 0x00,
  187. + 0x21, 0x54,
  188. + 0x25, 0x82,
  189. + 0x27, 0x31,
  190. + 0x30, 0x08,
  191. + 0x31, 0x32,
  192. + 0x32, 0x32,
  193. + 0x33, 0x35,
  194. + 0x35, 0xff,
  195. + 0x3a, 0x00,
  196. + 0x37, 0x10,
  197. + 0x38, 0x10,
  198. + 0x39, 0x02,
  199. + 0x42, 0x60,
  200. + 0x4a, 0x80,
  201. + 0x4b, 0x04,
  202. + 0x4d, 0x81,
  203. + 0x5d, 0x88,
  204. + 0x50, 0x36,
  205. + 0x51, 0x36,
  206. + 0x52, 0x36,
  207. + 0x53, 0x36,
  208. + 0x63, 0x60,
  209. + 0x64, 0x10,
  210. + 0x65, 0x10,
  211. + 0x68, 0x04,
  212. + 0x69, 0x29,
  213. + 0x70, 0x20,
  214. + 0x71, 0x70,
  215. + 0x72, 0x04,
  216. + 0x73, 0x00,
  217. + 0x70, 0x40,
  218. + 0x71, 0x70,
  219. + 0x72, 0x04,
  220. + 0x73, 0x00,
  221. + 0x70, 0x60,
  222. + 0x71, 0x70,
  223. + 0x72, 0x04,
  224. + 0x73, 0x00,
  225. + 0x70, 0x80,
  226. + 0x71, 0x70,
  227. + 0x72, 0x04,
  228. + 0x73, 0x00,
  229. + 0x70, 0xa0,
  230. + 0x71, 0x70,
  231. + 0x72, 0x04,
  232. + 0x73, 0x00,
  233. + 0x70, 0x1f,
  234. + 0xa0, 0x44,
  235. + 0xc0, 0x08,
  236. + 0xc1, 0x10,
  237. + 0xc2, 0x08,
  238. + 0xc3, 0x10,
  239. + 0xc4, 0x08,
  240. + 0xc5, 0xf0,
  241. + 0xc6, 0xf0,
  242. + 0xc7, 0x0a,
  243. + 0xc8, 0x1a,
  244. + 0xc9, 0x80,
  245. + 0xca, 0x23,
  246. + 0xcb, 0x24,
  247. + 0xce, 0x74,
  248. + 0x90, 0x03,
  249. + 0x76, 0x80,
  250. + 0x77, 0x42,
  251. + 0x78, 0x0a,
  252. + 0x79, 0x80,
  253. + 0xad, 0x40,
  254. + 0xae, 0x07,
  255. + 0x7f, 0xd4,
  256. + 0x7c, 0x00,
  257. + 0x80, 0xa8,
  258. + 0x81, 0xda,
  259. + 0x7c, 0x01,
  260. + 0x80, 0xda,
  261. + 0x81, 0xec,
  262. + 0x7c, 0x02,
  263. + 0x80, 0xca,
  264. + 0x81, 0xeb,
  265. + 0x7c, 0x03,
  266. + 0x80, 0xba,
  267. + 0x81, 0xdb,
  268. + 0x85, 0x08,
  269. + 0x86, 0x00,
  270. + 0x87, 0x02,
  271. + 0x89, 0x80,
  272. + 0x8b, 0x44,
  273. + 0x8c, 0xaa,
  274. + 0x8a, 0x10,
  275. + 0xba, 0x00,
  276. + 0xf5, 0x04,
  277. + 0xfe, 0x44,
  278. + 0xd2, 0x32,
  279. + 0xb8, 0x00,
  280. +};
  281. +
  282. +/* DS3000 doesn't need some parameters as input and auto-detects them */
  283. +/* save input from the application of those parameters */
  284. +struct ds3000_tuning {
  285. + u32 frequency;
  286. + u32 symbol_rate;
  287. + fe_spectral_inversion_t inversion;
  288. + enum fe_code_rate fec;
  289. +
  290. + /* input values */
  291. + u8 inversion_val;
  292. + fe_modulation_t delivery;
  293. + u8 rolloff;
  294. +};
  295. +
  296. +struct ds3000_state {
  297. + struct i2c_adapter *i2c;
  298. + const struct ds3000_config *config;
  299. +
  300. + struct dvb_frontend frontend;
  301. +
  302. + struct ds3000_tuning dcur;
  303. + struct ds3000_tuning dnxt;
  304. +
  305. + u8 skip_fw_load;
  306. +
  307. + /* previous uncorrected block counter for DVB-S2 */
  308. + u16 prevUCBS2;
  309. +};
  310. +
  311. +static int ds3000_writereg(struct ds3000_state *state, int reg, int data)
  312. +{
  313. + u8 buf[] = { reg, data };
  314. + struct i2c_msg msg = { .addr = state->config->demod_address,
  315. + .flags = 0, .buf = buf, .len = 2 };
  316. + int err;
  317. +
  318. + dprintk("%s: write reg 0x%02x, value 0x%02x\n", __func__, reg, data);
  319. +
  320. + err = i2c_transfer(state->i2c, &msg, 1);
  321. + if (err != 1) {
  322. + printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x,"
  323. + " value == 0x%02x)\n", __func__, err, reg, data);
  324. + return -EREMOTEIO;
  325. + }
  326. +
  327. + return 0;
  328. +}
  329. +
  330. +static int ds3000_tuner_writereg(struct ds3000_state *state, int reg, int data)
  331. +{
  332. + u8 buf[] = { reg, data };
  333. + struct i2c_msg msg = { .addr = 0x60,
  334. + .flags = 0, .buf = buf, .len = 2 };
  335. + int err;
  336. +
  337. + dprintk("%s: write reg 0x%02x, value 0x%02x\n", __func__, reg, data);
  338. +
  339. + ds3000_writereg(state, 0x03, 0x11);
  340. + err = i2c_transfer(state->i2c, &msg, 1);
  341. + if (err != 1) {
  342. + printk("%s: writereg error(err == %i, reg == 0x%02x,"
  343. + " value == 0x%02x)\n", __func__, err, reg, data);
  344. + return -EREMOTEIO;
  345. + }
  346. +
  347. + return 0;
  348. +}
  349. +
  350. +/* I2C write for 8k firmware load */
  351. +static int ds3000_writeFW(struct ds3000_state *state, int reg,
  352. + const u8 *data, u16 len)
  353. +{
  354. + int i, ret = -EREMOTEIO;
  355. + struct i2c_msg msg;
  356. + u8 *buf;
  357. +
  358. + buf = kmalloc(3, GFP_KERNEL);
  359. + if (buf == NULL) {
  360. + printk(KERN_ERR "Unable to kmalloc\n");
  361. + ret = -ENOMEM;
  362. + goto error;
  363. + }
  364. +
  365. + *(buf) = reg;
  366. +
  367. + msg.addr = state->config->demod_address;
  368. + msg.flags = 0;
  369. + msg.buf = buf;
  370. + msg.len = 3;
  371. +
  372. + for (i = 0; i < len; i += 2) {
  373. + memcpy(buf + 1, data + i, 2);
  374. +
  375. + dprintk("%s: write reg 0x%02x, len = %d\n", __func__, reg, len);
  376. +
  377. + ret = i2c_transfer(state->i2c, &msg, 1);
  378. + if (ret != 1) {
  379. + printk(KERN_ERR "%s: write error(err == %i, "
  380. + "reg == 0x%02x\n", __func__, ret, reg);
  381. + ret = -EREMOTEIO;
  382. + }
  383. + }
  384. +
  385. +error:
  386. + kfree(buf);
  387. +
  388. + return ret;
  389. +}
  390. +
  391. +static int ds3000_readreg(struct ds3000_state *state, u8 reg)
  392. +{
  393. + int ret;
  394. + u8 b0[] = { reg };
  395. + u8 b1[] = { 0 };
  396. + struct i2c_msg msg[] = {
  397. + {
  398. + .addr = state->config->demod_address,
  399. + .flags = 0,
  400. + .buf = b0,
  401. + .len = 1
  402. + }, {
  403. + .addr = state->config->demod_address,
  404. + .flags = I2C_M_RD,
  405. + .buf = b1,
  406. + .len = 1
  407. + }
  408. + };
  409. +
  410. + ret = i2c_transfer(state->i2c, msg, 2);
  411. +
  412. + if (ret != 2) {
  413. + printk(KERN_ERR "%s: reg=0x%x(error=%d)\n", __func__, reg, ret);
  414. + return ret;
  415. + }
  416. +
  417. + dprintk("%s: read reg 0x%02x, value 0x%02x\n", __func__, reg, b1[0]);
  418. +
  419. + return b1[0];
  420. +}
  421. +
  422. +static int ds3000_tuner_readreg(struct ds3000_state *state, u8 reg)
  423. +{
  424. + int ret;
  425. + u8 b0[] = { reg };
  426. + u8 b1[] = { 0 };
  427. + struct i2c_msg msg[] = {
  428. + {
  429. + .addr = 0x60,
  430. + .flags = 0,
  431. + .buf = b0,
  432. + .len = 1
  433. + }, {
  434. + .addr = 0x60,
  435. + .flags = I2C_M_RD,
  436. + .buf = b1,
  437. + .len = 1
  438. + }
  439. + };
  440. +
  441. + ds3000_writereg(state, 0x03, 0x12);
  442. + ret = i2c_transfer(state->i2c, msg, 2);
  443. +
  444. + if (ret != 2) {
  445. + printk(KERN_ERR "%s: reg=0x%x(error=%d)\n", __func__, reg, ret);
  446. + return ret;
  447. + }
  448. +
  449. + dprintk("%s: read reg 0x%02x, value 0x%02x\n", __func__, reg, b1[0]);
  450. +
  451. + return b1[0];
  452. +}
  453. +
  454. +static int ds3000_set_inversion(struct ds3000_state *state,
  455. + fe_spectral_inversion_t inversion)
  456. +{
  457. + dprintk("%s(%d)\n", __func__, inversion);
  458. +
  459. + switch (inversion) {
  460. + case INVERSION_OFF:
  461. + case INVERSION_ON:
  462. + case INVERSION_AUTO:
  463. + break;
  464. + default:
  465. + return -EINVAL;
  466. + }
  467. +
  468. + state->dnxt.inversion = inversion;
  469. +
  470. + return 0;
  471. +}
  472. +
  473. +static int ds3000_set_symbolrate(struct ds3000_state *state, u32 rate)
  474. +{
  475. + int ret = 0;
  476. +
  477. + dprintk("%s()\n", __func__);
  478. +
  479. + dprintk("%s() symbol_rate = %d\n", __func__, state->dnxt.symbol_rate);
  480. +
  481. + /* check if symbol rate is within limits */
  482. + if ((state->dnxt.symbol_rate >
  483. + state->frontend.ops.info.symbol_rate_max) ||
  484. + (state->dnxt.symbol_rate <
  485. + state->frontend.ops.info.symbol_rate_min))
  486. + ret = -EOPNOTSUPP;
  487. +
  488. + state->dnxt.symbol_rate = rate;
  489. +
  490. + return ret;
  491. +}
  492. +
  493. +static int ds3000_load_firmware(struct dvb_frontend *fe,
  494. + const struct firmware *fw);
  495. +
  496. +static int ds3000_firmware_ondemand(struct dvb_frontend *fe)
  497. +{
  498. + struct ds3000_state *state = fe->demodulator_priv;
  499. + const struct firmware *fw;
  500. + int ret = 0;
  501. +
  502. + dprintk("%s()\n", __func__);
  503. +
  504. + if (ds3000_readreg(state, 0xb2) <= 0)
  505. + return ret;
  506. +
  507. + if (state->skip_fw_load)
  508. + return 0;
  509. + /* Load firmware */
  510. + /* request the firmware, this will block until someone uploads it */
  511. + printk(KERN_INFO "%s: Waiting for firmware upload (%s)...\n", __func__,
  512. + DS3000_DEFAULT_FIRMWARE);
  513. + ret = request_firmware(&fw, DS3000_DEFAULT_FIRMWARE,
  514. + state->i2c->dev.parent);
  515. + printk(KERN_INFO "%s: Waiting for firmware upload(2)...\n", __func__);
  516. + if (ret) {
  517. + printk(KERN_ERR "%s: No firmware uploaded (timeout or file not "
  518. + "found?)\n", __func__);
  519. + return ret;
  520. + }
  521. +
  522. + /* Make sure we don't recurse back through here during loading */
  523. + state->skip_fw_load = 1;
  524. +
  525. + ret = ds3000_load_firmware(fe, fw);
  526. + if (ret)
  527. + printk("%s: Writing firmware to device failed\n", __func__);
  528. +
  529. + release_firmware(fw);
  530. +
  531. + dprintk("%s: Firmware upload %s\n", __func__,
  532. + ret == 0 ? "complete" : "failed");
  533. +
  534. + /* Ensure firmware is always loaded if required */
  535. + state->skip_fw_load = 0;
  536. +
  537. + return ret;
  538. +}
  539. +
  540. +static int ds3000_load_firmware(struct dvb_frontend *fe,
  541. + const struct firmware *fw)
  542. +{
  543. + struct ds3000_state *state = fe->demodulator_priv;
  544. +
  545. + dprintk("%s\n", __func__);
  546. + dprintk("Firmware is %zu bytes (%02x %02x .. %02x %02x)\n",
  547. + fw->size,
  548. + fw->data[0],
  549. + fw->data[1],
  550. + fw->data[fw->size - 2],
  551. + fw->data[fw->size - 1]);
  552. +
  553. + /* Begin the firmware load process */
  554. + ds3000_writereg(state, 0xb2, 0x01);
  555. + /* write the entire firmware */
  556. + ds3000_writeFW(state, 0xb0, fw->data, fw->size);
  557. + ds3000_writereg(state, 0xb2, 0x00);
  558. +
  559. + return 0;
  560. +}
  561. +
  562. +static void ds3000_dump_registers(struct dvb_frontend *fe)
  563. +{
  564. + struct ds3000_state *state = fe->demodulator_priv;
  565. + int x, y, reg = 0, val;
  566. +
  567. + for (y = 0; y < 16; y++) {
  568. + dprintk("%s: %02x: ", __func__, y);
  569. + for (x = 0; x < 16; x++) {
  570. + reg = (y << 4) + x;
  571. + val = ds3000_readreg(state, reg);
  572. + if (x != 15)
  573. + dprintk("%02x ", val);
  574. + else
  575. + dprintk("%02x\n", val);
  576. + }
  577. + }
  578. + dprintk("%s: -- DS3000 DUMP DONE --\n", __func__);
  579. +}
  580. +
  581. +static int ds3000_read_status(struct dvb_frontend *fe, fe_status_t* status)
  582. +{
  583. + struct ds3000_state *state = fe->demodulator_priv;
  584. + struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  585. + int lock;
  586. +
  587. + *status = 0;
  588. +
  589. + switch (c->delivery_system) {
  590. + case SYS_DVBS:
  591. + lock = ds3000_readreg(state, 0xd1);
  592. + if ((lock & 0x07) == 0x07)
  593. + *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  594. + FE_HAS_VITERBI | FE_HAS_SYNC |
  595. + FE_HAS_LOCK;
  596. +
  597. + break;
  598. + case SYS_DVBS2:
  599. + lock = ds3000_readreg(state, 0x0d);
  600. + if ((lock & 0x8f) == 0x8f)
  601. + *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  602. + FE_HAS_VITERBI | FE_HAS_SYNC |
  603. + FE_HAS_LOCK;
  604. +
  605. + break;
  606. + default:
  607. + return 1;
  608. + }
  609. +
  610. + dprintk("%s: status = 0x%02x\n", __func__, lock);
  611. +
  612. + return 0;
  613. +}
  614. +
  615. +#define FE_IS_TUNED (FE_HAS_SIGNAL + FE_HAS_LOCK)
  616. +static int ds3000_is_tuned(struct dvb_frontend *fe)
  617. +{
  618. + fe_status_t tunerstat;
  619. +
  620. + ds3000_read_status(fe, &tunerstat);
  621. +
  622. + return ((tunerstat & FE_IS_TUNED) == FE_IS_TUNED);
  623. +}
  624. +
  625. +/* read DS3000 BER value */
  626. +static int ds3000_read_ber(struct dvb_frontend *fe, u32* ber)
  627. +{
  628. + struct ds3000_state *state = fe->demodulator_priv;
  629. + struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  630. + u8 data;
  631. + u32 ber_reading, lpdc_frames;
  632. +
  633. + dprintk("%s()\n", __func__);
  634. +
  635. + switch (c->delivery_system) {
  636. + case SYS_DVBS:
  637. + /* set the number of bytes checked during
  638. + BER estimation */
  639. + ds3000_writereg(state, 0xf9, 0x04);
  640. + /* read BER estimation status */
  641. + data = ds3000_readreg(state, 0xf8);
  642. + /* check if BER estimation is ready */
  643. + if ((data & 0x10) == 0) {
  644. + /* this is the number of error bits,
  645. + to calculate the bit error rate
  646. + divide to 8388608 */
  647. + *ber = (ds3000_readreg(state, 0xf7) << 8) |
  648. + ds3000_readreg(state, 0xf6);
  649. + /* start counting error bits */
  650. + /* need to be set twice
  651. + otherwise it fails sometimes */
  652. + data |= 0x10;
  653. + ds3000_writereg(state, 0xf8, data);
  654. + ds3000_writereg(state, 0xf8, data);
  655. + } else
  656. + /* used to indicate that BER estimation
  657. + is not ready, i.e. BER is unknown */
  658. + *ber = 0xffffffff;
  659. + break;
  660. + case SYS_DVBS2:
  661. + /* read the number of LPDC decoded frames */
  662. + lpdc_frames = (ds3000_readreg(state, 0xd7) << 16) |
  663. + (ds3000_readreg(state, 0xd6) << 8) |
  664. + ds3000_readreg(state, 0xd5);
  665. + /* read the number of packets with bad CRC */
  666. + ber_reading = (ds3000_readreg(state, 0xf8) << 8) |
  667. + ds3000_readreg(state, 0xf7);
  668. + if (lpdc_frames > 750) {
  669. + /* clear LPDC frame counters */
  670. + ds3000_writereg(state, 0xd1, 0x01);
  671. + /* clear bad packets counter */
  672. + ds3000_writereg(state, 0xf9, 0x01);
  673. + /* enable bad packets counter */
  674. + ds3000_writereg(state, 0xf9, 0x00);
  675. + /* enable LPDC frame counters */
  676. + ds3000_writereg(state, 0xd1, 0x00);
  677. + *ber = ber_reading;
  678. + } else
  679. + /* used to indicate that BER estimation is not ready,
  680. + i.e. BER is unknown */
  681. + *ber = 0xffffffff;
  682. + break;
  683. + default:
  684. + return 1;
  685. + }
  686. +
  687. + return 0;
  688. +}
  689. +
  690. +/* read TS2020 signal strength */
  691. +static int ds3000_read_signal_strength(struct dvb_frontend *fe,
  692. + u16 *signal_strength)
  693. +{
  694. + struct ds3000_state *state = fe->demodulator_priv;
  695. + u16 sig_reading, sig_strength;
  696. + u8 rfgain, bbgain;
  697. +
  698. + dprintk("%s()\n", __func__);
  699. +
  700. + rfgain = ds3000_tuner_readreg(state, 0x3d) & 0x1f;
  701. + bbgain = ds3000_tuner_readreg(state, 0x21) & 0x1f;
  702. +
  703. + if (rfgain > 15)
  704. + rfgain = 15;
  705. + if (bbgain > 13)
  706. + bbgain = 13;
  707. +
  708. + sig_reading = rfgain * 2 + bbgain * 3;
  709. +
  710. + sig_strength = 40 + (64 - sig_reading) * 50 / 64 ;
  711. +
  712. + /* cook the value to be suitable for szap-s2 human readable output */
  713. + *signal_strength = sig_strength * 1000;
  714. +
  715. + dprintk("%s: raw / cooked = 0x%04x / 0x%04x\n", __func__,
  716. + sig_reading, *signal_strength);
  717. +
  718. + return 0;
  719. +}
  720. +
  721. +/* calculate DS3000 snr value in dB */
  722. +static int ds3000_read_snr(struct dvb_frontend *fe, u16 *snr)
  723. +{
  724. + struct ds3000_state *state = fe->demodulator_priv;
  725. + struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  726. + u8 snr_reading, snr_value;
  727. + u32 dvbs2_signal_reading, dvbs2_noise_reading, tmp;
  728. + static const u16 dvbs_snr_tab[] = { /* 20 x Table (rounded up) */
  729. + 0x0000, 0x1b13, 0x2aea, 0x3627, 0x3ede, 0x45fe, 0x4c03,
  730. + 0x513a, 0x55d4, 0x59f2, 0x5dab, 0x6111, 0x6431, 0x6717,
  731. + 0x69c9, 0x6c4e, 0x6eac, 0x70e8, 0x7304, 0x7505
  732. + };
  733. + static const u16 dvbs2_snr_tab[] = { /* 80 x Table (rounded up) */
  734. + 0x0000, 0x0bc2, 0x12a3, 0x1785, 0x1b4e, 0x1e65, 0x2103,
  735. + 0x2347, 0x2546, 0x2710, 0x28ae, 0x2a28, 0x2b83, 0x2cc5,
  736. + 0x2df1, 0x2f09, 0x3010, 0x3109, 0x31f4, 0x32d2, 0x33a6,
  737. + 0x3470, 0x3531, 0x35ea, 0x369b, 0x3746, 0x37ea, 0x3888,
  738. + 0x3920, 0x39b3, 0x3a42, 0x3acc, 0x3b51, 0x3bd3, 0x3c51,
  739. + 0x3ccb, 0x3d42, 0x3db6, 0x3e27, 0x3e95, 0x3f00, 0x3f68,
  740. + 0x3fcf, 0x4033, 0x4094, 0x40f4, 0x4151, 0x41ac, 0x4206,
  741. + 0x425e, 0x42b4, 0x4308, 0x435b, 0x43ac, 0x43fc, 0x444a,
  742. + 0x4497, 0x44e2, 0x452d, 0x4576, 0x45bd, 0x4604, 0x4649,
  743. + 0x468e, 0x46d1, 0x4713, 0x4755, 0x4795, 0x47d4, 0x4813,
  744. + 0x4851, 0x488d, 0x48c9, 0x4904, 0x493f, 0x4978, 0x49b1,
  745. + 0x49e9, 0x4a20, 0x4a57
  746. + };
  747. +
  748. + dprintk("%s()\n", __func__);
  749. +
  750. + switch (c->delivery_system) {
  751. + case SYS_DVBS:
  752. + snr_reading = ds3000_readreg(state, 0xff);
  753. + snr_reading /= 8;
  754. + if (snr_reading == 0)
  755. + *snr = 0x0000;
  756. + else {
  757. + if (snr_reading > 20)
  758. + snr_reading = 20;
  759. + snr_value = dvbs_snr_tab[snr_reading - 1] * 10 / 23026;
  760. + /* cook the value to be suitable for szap-s2
  761. + human readable output */
  762. + *snr = snr_value * 8 * 655;
  763. + }
  764. + dprintk("%s: raw / cooked = 0x%02x / 0x%04x\n", __func__,
  765. + snr_reading, *snr);
  766. + break;
  767. + case SYS_DVBS2:
  768. + dvbs2_noise_reading = (ds3000_readreg(state, 0x8c) & 0x3f) +
  769. + (ds3000_readreg(state, 0x8d) << 4);
  770. + dvbs2_signal_reading = ds3000_readreg(state, 0x8e);
  771. + tmp = dvbs2_signal_reading * dvbs2_signal_reading >> 1;
  772. + if (dvbs2_signal_reading == 0) {
  773. + *snr = 0x0000;
  774. + return 0;
  775. + }
  776. + if (dvbs2_noise_reading == 0) {
  777. + snr_value = 0x0013;
  778. + /* cook the value to be suitable for szap-s2
  779. + human readable output */
  780. + *snr = 0xffff;
  781. + return 0;
  782. + }
  783. + if (tmp > dvbs2_noise_reading) {
  784. + snr_reading = tmp / dvbs2_noise_reading;
  785. + if (snr_reading > 80)
  786. + snr_reading = 80;
  787. + snr_value = dvbs2_snr_tab[snr_reading - 1] / 1000;
  788. + /* cook the value to be suitable for szap-s2
  789. + human readable output */
  790. + *snr = snr_value * 5 * 655;
  791. + } else {
  792. + snr_reading = dvbs2_noise_reading / tmp;
  793. + if (snr_reading > 80)
  794. + snr_reading = 80;
  795. + *snr = -(dvbs2_snr_tab[snr_reading] / 1000);
  796. + }
  797. + dprintk("%s: raw / cooked = 0x%02x / 0x%04x\n", __func__,
  798. + snr_reading, *snr);
  799. + break;
  800. + default:
  801. + return 1;
  802. + }
  803. +
  804. + return 0;
  805. +}
  806. +
  807. +/* read DS3000 uncorrected blocks */
  808. +static int ds3000_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  809. +{
  810. + struct ds3000_state *state = fe->demodulator_priv;
  811. + struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  812. + u8 data;
  813. + u16 _ucblocks;
  814. +
  815. + dprintk("%s()\n", __func__);
  816. +
  817. + switch (c->delivery_system) {
  818. + case SYS_DVBS:
  819. + *ucblocks = (ds3000_readreg(state, 0xf5) << 8) |
  820. + ds3000_readreg(state, 0xf4);
  821. + data = ds3000_readreg(state, 0xf8);
  822. + /* clear packet counters */
  823. + data &= ~0x20;
  824. + ds3000_writereg(state, 0xf8, data);
  825. + /* enable packet counters */
  826. + data |= 0x20;
  827. + ds3000_writereg(state, 0xf8, data);
  828. + break;
  829. + case SYS_DVBS2:
  830. + _ucblocks = (ds3000_readreg(state, 0xe2) << 8) |
  831. + ds3000_readreg(state, 0xe1);
  832. + if (_ucblocks > state->prevUCBS2)
  833. + *ucblocks = _ucblocks - state->prevUCBS2;
  834. + else
  835. + *ucblocks = state->prevUCBS2 - _ucblocks;
  836. + state->prevUCBS2 = _ucblocks;
  837. + break;
  838. + default:
  839. + return 1;
  840. + }
  841. +
  842. + return 0;
  843. +}
  844. +
  845. +/* Overwrite the current tuning params, we are about to tune */
  846. +static void ds3000_clone_params(struct dvb_frontend *fe)
  847. +{
  848. + struct ds3000_state *state = fe->demodulator_priv;
  849. + memcpy(&state->dcur, &state->dnxt, sizeof(state->dcur));
  850. +}
  851. +
  852. +static int ds3000_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
  853. +{
  854. + struct ds3000_state *state = fe->demodulator_priv;
  855. + u8 data;
  856. +
  857. + dprintk("%s(%d)\n", __func__, tone);
  858. + if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) {
  859. + printk(KERN_ERR "%s: Invalid, tone=%d\n", __func__, tone);
  860. + return -EINVAL;
  861. + }
  862. +
  863. + data = ds3000_readreg(state, 0xa2);
  864. + data &= ~0xc0;
  865. + ds3000_writereg(state, 0xa2, data);
  866. +
  867. + switch (tone) {
  868. + case SEC_TONE_ON:
  869. + dprintk("%s: setting tone on\n", __func__);
  870. + data = ds3000_readreg(state, 0xa1);
  871. + data &= ~0x43;
  872. + data |= 0x04;
  873. + ds3000_writereg(state, 0xa1, data);
  874. + break;
  875. + case SEC_TONE_OFF:
  876. + dprintk("%s: setting tone off\n", __func__);
  877. + data = ds3000_readreg(state, 0xa2);
  878. + data |= 0x80;
  879. + ds3000_writereg(state, 0xa2, data);
  880. + break;
  881. + }
  882. +
  883. + return 0;
  884. +}
  885. +
  886. +static int ds3000_send_diseqc_msg(struct dvb_frontend *fe,
  887. + struct dvb_diseqc_master_cmd *d)
  888. +{
  889. + struct ds3000_state *state = fe->demodulator_priv;
  890. + int i;
  891. + u8 data;
  892. +
  893. + /* Dump DiSEqC message */
  894. + dprintk("%s(", __func__);
  895. + for (i = 0 ; i < d->msg_len;) {
  896. + dprintk("0x%02x", d->msg[i]);
  897. + if (++i < d->msg_len)
  898. + dprintk(", ");
  899. + }
  900. +
  901. + /* enable DiSEqC message send pin */
  902. + data = ds3000_readreg(state, 0xa2);
  903. + data &= ~0xc0;
  904. + ds3000_writereg(state, 0xa2, data);
  905. +
  906. + /* DiSEqC message */
  907. + for (i = 0; i < d->msg_len; i++)
  908. + ds3000_writereg(state, 0xa3 + i, d->msg[i]);
  909. +
  910. + data = ds3000_readreg(state, 0xa1);
  911. + /* clear DiSEqC message length and status,
  912. + enable DiSEqC message send */
  913. + data &= ~0xf8;
  914. + /* set DiSEqC mode, modulation active during 33 pulses,
  915. + set DiSEqC message length */
  916. + data |= ((d->msg_len - 1) << 3) | 0x07;
  917. + ds3000_writereg(state, 0xa1, data);
  918. +
  919. + /* wait up to 150ms for DiSEqC transmission to complete */
  920. + for (i = 0; i < 15; i++) {
  921. + data = ds3000_readreg(state, 0xa1);
  922. + if ((data & 0x40) == 0)
  923. + break;
  924. + msleep(10);
  925. + }
  926. +
  927. + /* DiSEqC timeout after 150ms */
  928. + if (i == 15) {
  929. + data = ds3000_readreg(state, 0xa1);
  930. + data &= ~0x80;
  931. + data |= 0x40;
  932. + ds3000_writereg(state, 0xa1, data);
  933. +
  934. + data = ds3000_readreg(state, 0xa2);
  935. + data &= ~0xc0;
  936. + data |= 0x80;
  937. + ds3000_writereg(state, 0xa2, data);
  938. +
  939. + return 1;
  940. + }
  941. +
  942. + data = ds3000_readreg(state, 0xa2);
  943. + data &= ~0xc0;
  944. + data |= 0x80;
  945. + ds3000_writereg(state, 0xa2, data);
  946. +
  947. + return 0;
  948. +}
  949. +
  950. +/* Send DiSEqC burst */
  951. +static int ds3000_diseqc_send_burst(struct dvb_frontend *fe,
  952. + fe_sec_mini_cmd_t burst)
  953. +{
  954. + struct ds3000_state *state = fe->demodulator_priv;
  955. + int i;
  956. + u8 data;
  957. +
  958. + dprintk("%s()\n", __func__);
  959. +
  960. + data = ds3000_readreg(state, 0xa2);
  961. + data &= ~0xc0;
  962. + ds3000_writereg(state, 0xa2, data);
  963. +
  964. + /* DiSEqC burst */
  965. + if (burst == SEC_MINI_A)
  966. + /* Unmodulated tone burst */
  967. + ds3000_writereg(state, 0xa1, 0x02);
  968. + else if (burst == SEC_MINI_B)
  969. + /* Modulated tone burst */
  970. + ds3000_writereg(state, 0xa1, 0x01);
  971. + else
  972. + return -EINVAL;
  973. +
  974. + msleep(13);
  975. + for (i = 0; i < 5; i++) {
  976. + data = ds3000_readreg(state, 0xa1);
  977. + if ((data & 0x40) == 0)
  978. + break;
  979. + msleep(1);
  980. + }
  981. +
  982. + if (i == 5) {
  983. + data = ds3000_readreg(state, 0xa1);
  984. + data &= ~0x80;
  985. + data |= 0x40;
  986. + ds3000_writereg(state, 0xa1, data);
  987. +
  988. + data = ds3000_readreg(state, 0xa2);
  989. + data &= ~0xc0;
  990. + data |= 0x80;
  991. + ds3000_writereg(state, 0xa2, data);
  992. +
  993. + return 1;
  994. + }
  995. +
  996. + data = ds3000_readreg(state, 0xa2);
  997. + data &= ~0xc0;
  998. + data |= 0x80;
  999. + ds3000_writereg(state, 0xa2, data);
  1000. +
  1001. + return 0;
  1002. +}
  1003. +
  1004. +static void ds3000_release(struct dvb_frontend *fe)
  1005. +{
  1006. + struct ds3000_state *state = fe->demodulator_priv;
  1007. + dprintk("%s\n", __func__);
  1008. + kfree(state);
  1009. +}
  1010. +
  1011. +static struct dvb_frontend_ops ds3000_ops;
  1012. +
  1013. +struct dvb_frontend *ds3000_attach(const struct ds3000_config *config,
  1014. + struct i2c_adapter *i2c)
  1015. +{
  1016. + struct ds3000_state *state = NULL;
  1017. + int ret;
  1018. +
  1019. + dprintk("%s\n", __func__);
  1020. +
  1021. + /* allocate memory for the internal state */
  1022. + state = kmalloc(sizeof(struct ds3000_state), GFP_KERNEL);
  1023. + if (state == NULL) {
  1024. + printk(KERN_ERR "Unable to kmalloc\n");
  1025. + goto error2;
  1026. + }
  1027. +
  1028. + /* setup the state */
  1029. + memset(state, 0, sizeof(struct ds3000_state));
  1030. +
  1031. + state->config = config;
  1032. + state->i2c = i2c;
  1033. + state->prevUCBS2 = 0;
  1034. +
  1035. + /* check if the demod is present */
  1036. + ret = ds3000_readreg(state, 0x00) & 0xfe;
  1037. + if (ret != 0xe0) {
  1038. + printk(KERN_ERR "Invalid probe, probably not a DS3000\n");
  1039. + goto error3;
  1040. + }
  1041. +
  1042. + printk(KERN_INFO "DS3000 chip version: %d.%d attached.\n",
  1043. + ds3000_readreg(state, 0x02),
  1044. + ds3000_readreg(state, 0x01));
  1045. +
  1046. + memcpy(&state->frontend.ops, &ds3000_ops,
  1047. + sizeof(struct dvb_frontend_ops));
  1048. + state->frontend.demodulator_priv = state;
  1049. + return &state->frontend;
  1050. +
  1051. +error3:
  1052. + kfree(state);
  1053. +error2:
  1054. + return NULL;
  1055. +}
  1056. +EXPORT_SYMBOL(ds3000_attach);
  1057. +
  1058. +static int ds3000_set_property(struct dvb_frontend *fe,
  1059. + struct dtv_property *tvp)
  1060. +{
  1061. + dprintk("%s(..)\n", __func__);
  1062. + return 0;
  1063. +}
  1064. +
  1065. +static int ds3000_get_property(struct dvb_frontend *fe,
  1066. + struct dtv_property *tvp)
  1067. +{
  1068. + dprintk("%s(..)\n", __func__);
  1069. + return 0;
  1070. +}
  1071. +
  1072. +static int ds3000_tune(struct dvb_frontend *fe,
  1073. + struct dvb_frontend_parameters *p)
  1074. +{
  1075. + struct ds3000_state *state = fe->demodulator_priv;
  1076. + struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  1077. +
  1078. + int ret = 0, retune, i;
  1079. + u8 status, mlpf, mlpf_new, mlpf_max, mlpf_min, nlpf;
  1080. + u16 value, ndiv;
  1081. + u32 f3db;
  1082. +
  1083. + dprintk("%s() ", __func__);
  1084. +
  1085. + /* Load the firmware if required */
  1086. + ret = ds3000_firmware_ondemand(fe);
  1087. + if (ret != 0) {
  1088. + printk(KERN_ERR "%s: Unable initialise the firmware\n",
  1089. + __func__);
  1090. + return ret;
  1091. + }
  1092. +
  1093. + state->dnxt.delivery = c->modulation;
  1094. + state->dnxt.frequency = c->frequency;
  1095. + state->dnxt.rolloff = 2; /* fixme */
  1096. + state->dnxt.fec = c->fec_inner;
  1097. +
  1098. + ret = ds3000_set_inversion(state, p->inversion);
  1099. + if (ret != 0)
  1100. + return ret;
  1101. +
  1102. + ret = ds3000_set_symbolrate(state, c->symbol_rate);
  1103. + if (ret != 0)
  1104. + return ret;
  1105. +
  1106. + /* discard the 'current' tuning parameters and prepare to tune */
  1107. + ds3000_clone_params(fe);
  1108. +
  1109. + retune = 1; /* try 1 times */
  1110. + dprintk("%s: retune = %d\n", __func__, retune);
  1111. + dprintk("%s: frequency = %d\n", __func__, state->dcur.frequency);
  1112. + dprintk("%s: symbol_rate = %d\n", __func__, state->dcur.symbol_rate);
  1113. + dprintk("%s: FEC = %d \n", __func__,
  1114. + state->dcur.fec);
  1115. + dprintk("%s: Inversion = %d\n", __func__, state->dcur.inversion);
  1116. +
  1117. + do {
  1118. + /* Reset status register */
  1119. + status = 0;
  1120. + /* Tune */
  1121. + /* TS2020 init */
  1122. + ds3000_tuner_writereg(state, 0x42, 0x73);
  1123. + ds3000_tuner_writereg(state, 0x05, 0x01);
  1124. + ds3000_tuner_writereg(state, 0x62, 0xf5);
  1125. + /* unknown */
  1126. + ds3000_tuner_writereg(state, 0x07, 0x02);
  1127. + ds3000_tuner_writereg(state, 0x10, 0x00);
  1128. + ds3000_tuner_writereg(state, 0x60, 0x79);
  1129. + ds3000_tuner_writereg(state, 0x08, 0x01);
  1130. + ds3000_tuner_writereg(state, 0x00, 0x01);
  1131. + /* calculate and set freq divider */
  1132. + if (state->dcur.frequency < 1146000) {
  1133. + ds3000_tuner_writereg(state, 0x10, 0x11);
  1134. + ndiv = ((state->dcur.frequency * (6 + 8) * 4) +
  1135. + (DS3000_XTAL_FREQ / 2)) /
  1136. + DS3000_XTAL_FREQ - 1024;
  1137. + } else {
  1138. + ds3000_tuner_writereg(state, 0x10, 0x01);
  1139. + ndiv = ((state->dcur.frequency * (6 + 8) * 2) +
  1140. + (DS3000_XTAL_FREQ / 2)) /
  1141. + DS3000_XTAL_FREQ - 1024;
  1142. + }
  1143. +
  1144. + ds3000_tuner_writereg(state, 0x01, (ndiv & 0x0f00) >> 8);
  1145. + ds3000_tuner_writereg(state, 0x02, ndiv & 0x00ff);
  1146. +
  1147. + /* set pll */
  1148. + ds3000_tuner_writereg(state, 0x03, 0x06);
  1149. + ds3000_tuner_writereg(state, 0x51, 0x0f);
  1150. + ds3000_tuner_writereg(state, 0x51, 0x1f);
  1151. + ds3000_tuner_writereg(state, 0x50, 0x10);
  1152. + ds3000_tuner_writereg(state, 0x50, 0x00);
  1153. + msleep(5);
  1154. +
  1155. + /* unknown */
  1156. + ds3000_tuner_writereg(state, 0x51, 0x17);
  1157. + ds3000_tuner_writereg(state, 0x51, 0x1f);
  1158. + ds3000_tuner_writereg(state, 0x50, 0x08);
  1159. + ds3000_tuner_writereg(state, 0x50, 0x00);
  1160. + msleep(5);
  1161. +
  1162. + value = ds3000_tuner_readreg(state, 0x3d);
  1163. + value &= 0x0f;
  1164. + if ((value > 4) && (value < 15)) {
  1165. + value -= 3;
  1166. + if (value < 4)
  1167. + value = 4;
  1168. + value = ((value << 3) | 0x01) & 0x79;
  1169. + }
  1170. +
  1171. + ds3000_tuner_writereg(state, 0x60, value);
  1172. + ds3000_tuner_writereg(state, 0x51, 0x17);
  1173. + ds3000_tuner_writereg(state, 0x51, 0x1f);
  1174. + ds3000_tuner_writereg(state, 0x50, 0x08);
  1175. + ds3000_tuner_writereg(state, 0x50, 0x00);
  1176. +
  1177. + /* set low-pass filter period */
  1178. + ds3000_tuner_writereg(state, 0x04, 0x2e);
  1179. + ds3000_tuner_writereg(state, 0x51, 0x1b);
  1180. + ds3000_tuner_writereg(state, 0x51, 0x1f);
  1181. + ds3000_tuner_writereg(state, 0x50, 0x04);
  1182. + ds3000_tuner_writereg(state, 0x50, 0x00);
  1183. + msleep(5);
  1184. +
  1185. + f3db = ((state->dcur.symbol_rate / 1000) << 2) / 5 + 2000;
  1186. + if ((state->dcur.symbol_rate / 1000) < 5000)
  1187. + f3db += 3000;
  1188. + if (f3db < 7000)
  1189. + f3db = 7000;
  1190. + if (f3db > 40000)
  1191. + f3db = 40000;
  1192. +
  1193. + /* set low-pass filter baseband */
  1194. + value = ds3000_tuner_readreg(state, 0x26);
  1195. + mlpf = 0x2e * 207 / ((value << 1) + 151);
  1196. + mlpf_max = mlpf * 135 / 100;
  1197. + mlpf_min = mlpf * 78 / 100;
  1198. + if (mlpf_max > 63)
  1199. + mlpf_max = 63;
  1200. +
  1201. + /* rounded to the closest integer */
  1202. + nlpf = ((mlpf * f3db * 1000) + (2766 * DS3000_XTAL_FREQ / 2))
  1203. + / (2766 * DS3000_XTAL_FREQ);
  1204. + if (nlpf > 23)
  1205. + nlpf = 23;
  1206. + if (nlpf < 1)
  1207. + nlpf = 1;
  1208. +
  1209. + /* rounded to the closest integer */
  1210. + mlpf_new = ((DS3000_XTAL_FREQ * nlpf * 2766) +
  1211. + (1000 * f3db / 2)) / (1000 * f3db);
  1212. +
  1213. + if (mlpf_new < mlpf_min) {
  1214. + nlpf++;
  1215. + mlpf_new = ((DS3000_XTAL_FREQ * nlpf * 2766) +
  1216. + (1000 * f3db / 2)) / (1000 * f3db);
  1217. + }
  1218. +
  1219. + if (mlpf_new > mlpf_max)
  1220. + mlpf_new = mlpf_max;
  1221. +
  1222. + ds3000_tuner_writereg(state, 0x04, mlpf_new);
  1223. + ds3000_tuner_writereg(state, 0x06, nlpf);
  1224. + ds3000_tuner_writereg(state, 0x51, 0x1b);
  1225. + ds3000_tuner_writereg(state, 0x51, 0x1f);
  1226. + ds3000_tuner_writereg(state, 0x50, 0x04);
  1227. + ds3000_tuner_writereg(state, 0x50, 0x00);
  1228. + msleep(5);
  1229. +
  1230. + /* unknown */
  1231. + ds3000_tuner_writereg(state, 0x51, 0x1e);
  1232. + ds3000_tuner_writereg(state, 0x51, 0x1f);
  1233. + ds3000_tuner_writereg(state, 0x50, 0x01);
  1234. + ds3000_tuner_writereg(state, 0x50, 0x00);
  1235. + msleep(60);
  1236. +
  1237. + /* ds3000 global reset */
  1238. + ds3000_writereg(state, 0x07, 0x80);
  1239. + ds3000_writereg(state, 0x07, 0x00);
  1240. + /* ds3000 build-in uC reset */
  1241. + ds3000_writereg(state, 0xb2, 0x01);
  1242. + /* ds3000 software reset */
  1243. + ds3000_writereg(state, 0x00, 0x01);
  1244. +
  1245. + switch (c->delivery_system) {
  1246. + case SYS_DVBS:
  1247. + /* initialise the demod in DVB-S mode */
  1248. + for (i = 0; i < sizeof(ds3000_dvbs_init_tab); i += 2)
  1249. + ds3000_writereg(state,
  1250. + ds3000_dvbs_init_tab[i],
  1251. + ds3000_dvbs_init_tab[i + 1]);
  1252. + value = ds3000_readreg(state, 0xfe);
  1253. + value &= 0xc0;
  1254. + value |= 0x1b;
  1255. + ds3000_writereg(state, 0xfe, value);
  1256. + break;
  1257. + case SYS_DVBS2:
  1258. + /* initialise the demod in DVB-S2 mode */
  1259. + for (i = 0; i < sizeof(ds3000_dvbs2_init_tab); i += 2)
  1260. + ds3000_writereg(state,
  1261. + ds3000_dvbs2_init_tab[i],
  1262. + ds3000_dvbs2_init_tab[i + 1]);
  1263. + ds3000_writereg(state, 0xfe, 0x54);
  1264. + break;
  1265. + default:
  1266. + return 1;
  1267. + }
  1268. +
  1269. + /* enable 27MHz clock output */
  1270. + ds3000_writereg(state, 0x29, 0x80);
  1271. + /* enable ac coupling */
  1272. + ds3000_writereg(state, 0x25, 0x8a);
  1273. +
  1274. + /* enhance symbol rate performance */
  1275. + if ((state->dcur.symbol_rate / 1000) <= 5000) {
  1276. + value = 29777 / (state->dcur.symbol_rate / 1000) + 1;
  1277. + if (value % 2 != 0)
  1278. + value++;
  1279. + ds3000_writereg(state, 0xc3, 0x0d);
  1280. + ds3000_writereg(state, 0xc8, value);
  1281. + ds3000_writereg(state, 0xc4, 0x10);
  1282. + ds3000_writereg(state, 0xc7, 0x0e);
  1283. + } else if ((state->dcur.symbol_rate / 1000) <= 10000) {
  1284. + value = 92166 / (state->dcur.symbol_rate / 1000) + 1;
  1285. + if (value % 2 != 0)
  1286. + value++;
  1287. + ds3000_writereg(state, 0xc3, 0x07);
  1288. + ds3000_writereg(state, 0xc8, value);
  1289. + ds3000_writereg(state, 0xc4, 0x09);
  1290. + ds3000_writereg(state, 0xc7, 0x12);
  1291. + } else if ((state->dcur.symbol_rate / 1000) <= 20000) {
  1292. + value = 64516 / (state->dcur.symbol_rate / 1000) + 1;
  1293. + ds3000_writereg(state, 0xc3, value);
  1294. + ds3000_writereg(state, 0xc8, 0x0e);
  1295. + ds3000_writereg(state, 0xc4, 0x07);
  1296. + ds3000_writereg(state, 0xc7, 0x18);
  1297. + } else {
  1298. + value = 129032 / (state->dcur.symbol_rate / 1000) + 1;
  1299. + ds3000_writereg(state, 0xc3, value);
  1300. + ds3000_writereg(state, 0xc8, 0x0a);
  1301. + ds3000_writereg(state, 0xc4, 0x05);
  1302. + ds3000_writereg(state, 0xc7, 0x24);
  1303. + }
  1304. +
  1305. + /* normalized symbol rate rounded to the closest integer */
  1306. + value = (((state->dcur.symbol_rate / 1000) << 16) +
  1307. + (DS3000_SAMPLE_RATE / 2)) / DS3000_SAMPLE_RATE;
  1308. + ds3000_writereg(state, 0x61, value & 0x00ff);
  1309. + ds3000_writereg(state, 0x62, (value & 0xff00) >> 8);
  1310. +
  1311. + /* co-channel interference cancellation disabled */
  1312. + ds3000_writereg(state, 0x56, 0x00);
  1313. +
  1314. + /* equalizer disabled */
  1315. + ds3000_writereg(state, 0x76, 0x00);
  1316. +
  1317. + /*ds3000_writereg(state, 0x08, 0x03);
  1318. + ds3000_writereg(state, 0xfd, 0x22);
  1319. + ds3000_writereg(state, 0x08, 0x07);
  1320. + ds3000_writereg(state, 0xfd, 0x42);
  1321. + ds3000_writereg(state, 0x08, 0x07);*/
  1322. +
  1323. + /* ds3000 out of software reset */
  1324. + ds3000_writereg(state, 0x00, 0x00);
  1325. + /* start ds3000 build-in uC */
  1326. + ds3000_writereg(state, 0xb2, 0x00);
  1327. +
  1328. + /* TODO: calculate and set carrier offset */
  1329. +
  1330. + /* wait before retrying */
  1331. + for (i = 0; i < 30 ; i++) {
  1332. + if (ds3000_is_tuned(fe)) {
  1333. + dprintk("%s: Tuned\n", __func__);
  1334. + ds3000_dump_registers(fe);
  1335. + goto tuned;
  1336. + }
  1337. + msleep(1);
  1338. + }
  1339. +
  1340. + dprintk("%s: Not tuned\n", __func__);
  1341. + ds3000_dump_registers(fe);
  1342. +
  1343. + } while (--retune);
  1344. +
  1345. +tuned:
  1346. + return ret;
  1347. +}
  1348. +
  1349. +static enum dvbfe_algo ds3000_get_algo(struct dvb_frontend *fe)
  1350. +{
  1351. + dprintk("%s()\n", __func__);
  1352. + return DVBFE_ALGO_SW;
  1353. +}
  1354. +
  1355. +/*
  1356. + * Initialise or wake up device
  1357. + *
  1358. + * Power config will reset and load initial firmware if required
  1359. + */
  1360. +static int ds3000_initfe(struct dvb_frontend *fe)
  1361. +{
  1362. + dprintk("%s()\n", __func__);
  1363. + return 0;
  1364. +}
  1365. +
  1366. +/* Put device to sleep */
  1367. +static int ds3000_sleep(struct dvb_frontend *fe)
  1368. +{
  1369. + dprintk("%s()\n", __func__);
  1370. + return 0;
  1371. +}
  1372. +
  1373. +static struct dvb_frontend_ops ds3000_ops = {
  1374. +
  1375. + .info = {
  1376. + .name = "Montage Technology DS3000/TS2020",
  1377. + .type = FE_QPSK,
  1378. + .frequency_min = 950000,
  1379. + .frequency_max = 2150000,
  1380. + .frequency_stepsize = 1011, /* kHz for QPSK frontends */
  1381. + .frequency_tolerance = 5000,
  1382. + .symbol_rate_min = 1000000,
  1383. + .symbol_rate_max = 45000000,
  1384. + .caps = FE_CAN_INVERSION_AUTO |
  1385. + FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  1386. + FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
  1387. + FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  1388. + FE_CAN_2G_MODULATION |
  1389. + FE_CAN_QPSK | FE_CAN_RECOVER
  1390. + },
  1391. +
  1392. + .release = ds3000_release,
  1393. +
  1394. + .init = ds3000_initfe,
  1395. + .sleep = ds3000_sleep,
  1396. + .read_status = ds3000_read_status,
  1397. + .read_ber = ds3000_read_ber,
  1398. + .read_signal_strength = ds3000_read_signal_strength,
  1399. + .read_snr = ds3000_read_snr,
  1400. + .read_ucblocks = ds3000_read_ucblocks,
  1401. + .set_tone = ds3000_set_tone,
  1402. + .diseqc_send_master_cmd = ds3000_send_diseqc_msg,
  1403. + .diseqc_send_burst = ds3000_diseqc_send_burst,
  1404. + .get_frontend_algo = ds3000_get_algo,
  1405. +
  1406. + .set_property = ds3000_set_property,
  1407. + .get_property = ds3000_get_property,
  1408. + .set_frontend = ds3000_tune,
  1409. +};
  1410. +
  1411. +module_param(debug, int, 0644);
  1412. +MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
  1413. +
  1414. +MODULE_DESCRIPTION("DVB Frontend module for Montage Technology "
  1415. + "DS3000/TS2020 hardware");
  1416. +MODULE_AUTHOR("Konstantin Dimitrov");
  1417. +MODULE_LICENSE("GPL");
  1418. diff -r 8bff7e6c44d4 -r 437554d884f7 linux/drivers/media/dvb/frontends/ds3000.h
  1419. --- /dev/null Thu Jan 01 00:00:00 1970 +0000
  1420. +++ b/linux/drivers/media/dvb/frontends/ds3000.h Tue Nov 24 18:38:18 2009 +0200
  1421. @@ -0,0 +1,45 @@
  1422. +/*
  1423. + Montage Technology DS3000/TS2020 - DVBS/S2 Satellite demod/tuner driver
  1424. + Copyright (C) 2009 Konstantin Dimitrov <kosio.dimitrov@gmail.com>
  1425. +
  1426. + Copyright (C) 2009 TurboSight.com
  1427. +
  1428. + This program is free software; you can redistribute it and/or modify
  1429. + it under the terms of the GNU General Public License as published by
  1430. + the Free Software Foundation; either version 2 of the License, or
  1431. + (at your option) any later version.
  1432. +
  1433. + This program is distributed in the hope that it will be useful,
  1434. + but WITHOUT ANY WARRANTY; without even the implied warranty of
  1435. + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  1436. + GNU General Public License for more details.
  1437. +
  1438. + You should have received a copy of the GNU General Public License
  1439. + along with this program; if not, write to the Free Software
  1440. + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  1441. +*/
  1442. +
  1443. +#ifndef DS3000_H
  1444. +#define DS3000_H
  1445. +
  1446. +#include <linux/dvb/frontend.h>
  1447. +
  1448. +struct ds3000_config {
  1449. + /* the demodulator's i2c address */
  1450. + u8 demod_address;
  1451. +};
  1452. +
  1453. +#if defined(CONFIG_DVB_DS3000) || \
  1454. + (defined(CONFIG_DVB_DS3000_MODULE) && defined(MODULE))
  1455. +extern struct dvb_frontend *ds3000_attach(const struct ds3000_config *config,
  1456. + struct i2c_adapter *i2c);
  1457. +#else
  1458. +static inline
  1459. +struct dvb_frontend *ds3000_attach(const struct ds3000_config *config,
  1460. + struct i2c_adapter *i2c)
  1461. +{
  1462. + printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
  1463. + return NULL;
  1464. +}
  1465. +#endif /* CONFIG_DVB_DS3000 */
  1466. +#endif /* DS3000_H */
  1467. diff -r 8bff7e6c44d4 -r 437554d884f7 linux/drivers/media/video/cx23885/Kconfig
  1468. --- a/linux/drivers/media/video/cx23885/Kconfig Sun Nov 15 12:14:14 2009 +0100
  1469. +++ b/linux/drivers/media/video/cx23885/Kconfig Tue Nov 24 18:38:18 2009 +0200
  1470. @@ -18,7 +18,9 @@
  1471. select DVB_TDA10048 if !DVB_FE_CUSTOMISE
  1472. select DVB_LNBP21 if !DVB_FE_CUSTOMISE
  1473. select DVB_STV6110 if !DVB_FE_CUSTOMISE
  1474. + select DVB_CX24116 if !DVB_FE_CUSTOMISE
  1475. select DVB_STV0900 if !DVB_FE_CUSTOMISE
  1476. + select DVB_DS3000 if !DVB_FE_CUSTOMISE
  1477. select MEDIA_TUNER_MT2131 if !MEDIA_TUNER_CUSTOMISE
  1478. select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE
  1479. select MEDIA_TUNER_TDA8290 if !MEDIA_TUNER_CUSTOMISE
  1480. diff -r 8bff7e6c44d4 -r 437554d884f7 linux/drivers/media/video/cx23885/Makefile
  1481. --- a/linux/drivers/media/video/cx23885/Makefile Sun Nov 15 12:14:14 2009 +0100
  1482. +++ b/linux/drivers/media/video/cx23885/Makefile Tue Nov 24 18:38:18 2009 +0200
  1483. @@ -1,7 +1,7 @@
  1484. cx23885-objs := cx23885-cards.o cx23885-video.o cx23885-vbi.o \
  1485. cx23885-core.o cx23885-i2c.o cx23885-dvb.o cx23885-417.o \
  1486. cx23885-ioctl.o cx23885-ir.o cx23885-input.o cx23888-ir.o \
  1487. - netup-init.o cimax2.o netup-eeprom.o
  1488. + netup-init.o cimax2.o netup-eeprom.o cx23885-f300.o
  1489.  
  1490. obj-$(CONFIG_VIDEO_CX23885) += cx23885.o
  1491.  
  1492. diff -r 8bff7e6c44d4 -r 437554d884f7 linux/drivers/media/video/cx23885/cx23885-cards.c
  1493. --- a/linux/drivers/media/video/cx23885/cx23885-cards.c Sun Nov 15 12:14:14 2009 +0100
  1494. +++ b/linux/drivers/media/video/cx23885/cx23885-cards.c Tue Nov 24 18:38:18 2009 +0200
  1495. @@ -774,10 +774,14 @@
  1496. cx_set(GP0_IO, 0x00040004);
  1497. break;
  1498. case CX23885_BOARD_TBS_6920:
  1499. - case CX23885_BOARD_TEVII_S470:
  1500. cx_write(MC417_CTL, 0x00000036);
  1501. cx_write(MC417_OEN, 0x00001000);
  1502. - cx_write(MC417_RWD, 0x00001800);
  1503. + cx_set(MC417_RWD, 0x00000002);
  1504. + mdelay(200);
  1505. + cx_clear(MC417_RWD, 0x00000800);
  1506. + mdelay(200);
  1507. + cx_set(MC417_RWD, 0x00000800);
  1508. + mdelay(200);
  1509. break;
  1510. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  1511. /* GPIO-0 INTA from CiMax1
  1512. @@ -985,8 +989,12 @@
  1513. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1514. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1515. break;
  1516. + case CX23885_BOARD_TBS_6920:
  1517. + ts1->gen_ctrl_val = 0x4; /* Parallel */
  1518. + ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1519. + ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  1520. + break;
  1521. case CX23885_BOARD_TEVII_S470:
  1522. - case CX23885_BOARD_TBS_6920:
  1523. case CX23885_BOARD_DVBWORLD_2005:
  1524. ts1->gen_ctrl_val = 0x5; /* Parallel */
  1525. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  1526. diff -r 8bff7e6c44d4 -r 437554d884f7 linux/drivers/media/video/cx23885/cx23885-core.c
  1527. --- a/linux/drivers/media/video/cx23885/cx23885-core.c Sun Nov 15 12:14:14 2009 +0100
  1528. +++ b/linux/drivers/media/video/cx23885/cx23885-core.c Tue Nov 24 18:38:18 2009 +0200
  1529. @@ -1889,6 +1889,26 @@
  1530. printk(KERN_INFO "%s: Unsupported\n", dev->name);
  1531. }
  1532.  
  1533. +u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask)
  1534. +{
  1535. + if (mask & 0x00000007)
  1536. + return (cx_read(GP0_IO) >> 8) & mask & 0x7;
  1537. +
  1538. + if (mask & 0x0007fff8) {
  1539. + if (encoder_on_portb(dev) || encoder_on_portc(dev))
  1540. + printk(KERN_ERR
  1541. + "%s: Reading GPIO moving on encoder ports\n",
  1542. + dev->name);
  1543. + return (cx_read(MC417_RWD) & ((mask & 0x7fff8) >> 3)) << 3;
  1544. + }
  1545. +
  1546. + /* TODO: 23-19 */
  1547. + if (mask & 0x00f80000)
  1548. + printk(KERN_INFO "%s: Unsupported\n", dev->name);
  1549. +
  1550. + return 0;
  1551. +}
  1552. +
  1553. void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput)
  1554. {
  1555. if ((mask & 0x00000007) && asoutput)
  1556. diff -r 8bff7e6c44d4 -r 437554d884f7 linux/drivers/media/video/cx23885/cx23885-dvb.c
  1557. --- a/linux/drivers/media/video/cx23885/cx23885-dvb.c Sun Nov 15 12:14:14 2009 +0100
  1558. +++ b/linux/drivers/media/video/cx23885/cx23885-dvb.c Tue Nov 24 18:38:18 2009 +0200
  1559. @@ -55,6 +55,8 @@
  1560. #include "netup-eeprom.h"
  1561. #include "netup-init.h"
  1562. #include "lgdt3305.h"
  1563. +#include "ds3000.h"
  1564. +#include "cx23885-f300.h"
  1565.  
  1566. static unsigned int debug;
  1567.  
  1568. @@ -426,26 +428,12 @@
  1569. .gain = 8, /* +16 dB - maximum gain */
  1570. };
  1571.  
  1572. -static int tbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
  1573. -{
  1574. - struct cx23885_tsport *port = fe->dvb->priv;
  1575. - struct cx23885_dev *dev = port->dev;
  1576. -
  1577. - if (voltage == SEC_VOLTAGE_18)
  1578. - cx_write(MC417_RWD, 0x00001e00);/* GPIO-13 high */
  1579. - else if (voltage == SEC_VOLTAGE_13)
  1580. - cx_write(MC417_RWD, 0x00001a00);/* GPIO-13 low */
  1581. - else
  1582. - cx_write(MC417_RWD, 0x00001800);/* GPIO-12 low */
  1583. - return 0;
  1584. -}
  1585. -
  1586. static struct cx24116_config tbs_cx24116_config = {
  1587. - .demod_address = 0x05,
  1588. + .demod_address = 0x55,
  1589. };
  1590.  
  1591. -static struct cx24116_config tevii_cx24116_config = {
  1592. - .demod_address = 0x55,
  1593. +static struct ds3000_config tevii_ds3000_config = {
  1594. + .demod_address = 0x68,
  1595. };
  1596.  
  1597. static struct cx24116_config dvbworld_cx24116_config = {
  1598. @@ -799,23 +787,23 @@
  1599. }
  1600. break;
  1601. case CX23885_BOARD_TBS_6920:
  1602. - i2c_bus = &dev->i2c_bus[0];
  1603. + i2c_bus = &dev->i2c_bus[1];
  1604.  
  1605. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1606. - &tbs_cx24116_config,
  1607. - &i2c_bus->i2c_adap);
  1608. + &tbs_cx24116_config,
  1609. + &i2c_bus->i2c_adap);
  1610. if (fe0->dvb.frontend != NULL)
  1611. - fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
  1612. + fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
  1613.  
  1614. break;
  1615. case CX23885_BOARD_TEVII_S470:
  1616. i2c_bus = &dev->i2c_bus[1];
  1617.  
  1618. - fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1619. - &tevii_cx24116_config,
  1620. - &i2c_bus->i2c_adap);
  1621. + fe0->dvb.frontend = dvb_attach(ds3000_attach,
  1622. + &tevii_ds3000_config,
  1623. + &i2c_bus->i2c_adap);
  1624. if (fe0->dvb.frontend != NULL)
  1625. - fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
  1626. + fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
  1627.  
  1628. break;
  1629. case CX23885_BOARD_DVBWORLD_2005:
  1630. diff -r 8bff7e6c44d4 -r 437554d884f7 linux/drivers/media/video/cx23885/cx23885-f300.c
  1631. --- /dev/null Thu Jan 01 00:00:00 1970 +0000
  1632. +++ b/linux/drivers/media/video/cx23885/cx23885-f300.c Tue Nov 24 18:38:18 2009 +0200
  1633. @@ -0,0 +1,177 @@
  1634. +/*
  1635. + * Driver for Silicon Labs C8051F300 microcontroller.
  1636. + *
  1637. + * It is used for LNB power control in TeVii S470,
  1638. + * TBS 6920 PCIe DVB-S2 cards.
  1639. + *
  1640. + * Microcontroller connected to cx23885 GPIO pins:
  1641. + * GPIO0 - data - P0.3 F300
  1642. + * GPIO1 - reset - P0.2 F300
  1643. + * GPIO2 - clk - P0.1 F300
  1644. + * GPIO3 - busy - P0.0 F300
  1645. + *
  1646. + * Copyright (C) 2009 Igor M. Liplianin <liplianin@me.by>
  1647. + *
  1648. + * This program is free software; you can redistribute it and/or modify
  1649. + * it under the terms of the GNU General Public License as published by
  1650. + * the Free Software Foundation; either version 2 of the License, or
  1651. + * (at your option) any later version.
  1652. + *
  1653. + * This program is distributed in the hope that it will be useful,
  1654. + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  1655. + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  1656. + *
  1657. + * GNU General Public License for more details.
  1658. + *
  1659. + * You should have received a copy of the GNU General Public License
  1660. + * along with this program; if not, write to the Free Software
  1661. + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  1662. + */
  1663. +
  1664. +#include "cx23885.h"
  1665. +
  1666. +#define F300_DATA GPIO_0
  1667. +#define F300_RESET GPIO_1
  1668. +#define F300_CLK GPIO_2
  1669. +#define F300_BUSY GPIO_3
  1670. +
  1671. +static void f300_set_line(struct cx23885_dev *dev, u32 line, u8 lvl)
  1672. +{
  1673. + cx23885_gpio_enable(dev, line, 1);
  1674. + if (lvl == 1)
  1675. + cx23885_gpio_set(dev, line);
  1676. + else
  1677. + cx23885_gpio_clear(dev, line);
  1678. +}
  1679. +
  1680. +static u8 f300_get_line(struct cx23885_dev *dev, u32 line)
  1681. +{
  1682. + cx23885_gpio_enable(dev, line, 0);
  1683. +
  1684. + return cx23885_gpio_get(dev, line);
  1685. +}
  1686. +
  1687. +static void f300_send_byte(struct cx23885_dev *dev, u8 dta)
  1688. +{
  1689. + u8 i;
  1690. +
  1691. + for (i = 0; i < 8; i++) {
  1692. + f300_set_line(dev, F300_CLK, 0);
  1693. + udelay(30);
  1694. + f300_set_line(dev, F300_DATA, (dta & 0x80) >> 7);/* msb first */
  1695. + udelay(30);
  1696. + dta <<= 1;
  1697. + f300_set_line(dev, F300_CLK, 1);
  1698. + udelay(30);
  1699. + }
  1700. +}
  1701. +
  1702. +static u8 f300_get_byte(struct cx23885_dev *dev)
  1703. +{
  1704. + u8 i, dta = 0;
  1705. +
  1706. + for (i = 0; i < 8; i++) {
  1707. + f300_set_line(dev, F300_CLK, 0);
  1708. + udelay(30);
  1709. + dta <<= 1;
  1710. + f300_set_line(dev, F300_CLK, 1);
  1711. + udelay(30);
  1712. + dta |= f300_get_line(dev, F300_DATA);/* msb first */
  1713. +
  1714. + }
  1715. +
  1716. + return dta;
  1717. +}
  1718. +
  1719. +static u8 f300_xfer(struct dvb_frontend *fe, u8 *buf)
  1720. +{
  1721. + struct cx23885_tsport *port = fe->dvb->priv;
  1722. + struct cx23885_dev *dev = port->dev;
  1723. + u8 i, temp, ret = 0;
  1724. +
  1725. + temp = buf[0];
  1726. + for (i = 0; i < buf[0]; i++)
  1727. + temp += buf[i + 1];
  1728. + temp = (~temp + 1);/* get check sum */
  1729. + buf[1 + buf[0]] = temp;
  1730. +
  1731. + f300_set_line(dev, F300_RESET, 1);
  1732. + f300_set_line(dev, F300_CLK, 1);
  1733. + udelay(30);
  1734. + f300_set_line(dev, F300_DATA, 1);
  1735. + msleep(1);
  1736. +
  1737. + /* question: */
  1738. + f300_set_line(dev, F300_RESET, 0);/* begin to send data */
  1739. + msleep(1);
  1740. +
  1741. + f300_send_byte(dev, 0xe0);/* the slave address is 0xe0, write */
  1742. + msleep(1);
  1743. +
  1744. + temp = buf[0];
  1745. + temp += 2;
  1746. + for (i = 0; i < temp; i++)
  1747. + f300_send_byte(dev, buf[i]);
  1748. +
  1749. + f300_set_line(dev, F300_RESET, 1);/* sent data over */
  1750. + f300_set_line(dev, F300_DATA, 1);
  1751. +
  1752. + /* answer: */
  1753. + temp = 0;
  1754. + for (i = 0; ((i < 8) & (temp == 0)); i++) {
  1755. + msleep(1);
  1756. + if (f300_get_line(dev, F300_BUSY) == 0)
  1757. + temp = 1;
  1758. + }
  1759. +
  1760. + if (i > 7) {
  1761. + printk(KERN_ERR "%s: timeout, the slave no response\n",
  1762. + __func__);
  1763. + ret = 1; /* timeout, the slave no response */
  1764. + } else { /* the slave not busy, prepare for getting data */
  1765. + f300_set_line(dev, F300_RESET, 0);/*ready...*/
  1766. + msleep(1);
  1767. + f300_send_byte(dev, 0xe1);/* 0xe1 is Read */
  1768. + msleep(1);
  1769. + temp = f300_get_byte(dev);/*get the data length */
  1770. + if (temp > 14)
  1771. + temp = 14;
  1772. +
  1773. + for (i = 0; i < (temp + 1); i++)
  1774. + f300_get_byte(dev);/* get data to empty buffer */
  1775. +
  1776. + f300_set_line(dev, F300_RESET, 1);/* received data over */
  1777. + f300_set_line(dev, F300_DATA, 1);
  1778. + }
  1779. +
  1780. + return ret;
  1781. +}
  1782. +
  1783. +int f300_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
  1784. +{
  1785. + u8 buf[16];
  1786. +
  1787. + buf[0] = 0x05;
  1788. + buf[1] = 0x38;/* write port */
  1789. + buf[2] = 0x01;/* A port, lnb power */
  1790. +
  1791. + switch (voltage) {
  1792. + case SEC_VOLTAGE_13:
  1793. + buf[3] = 0x01;/* power on */
  1794. + buf[4] = 0x02;/* B port, H/V */
  1795. + buf[5] = 0x00;/*13V v*/
  1796. + break;
  1797. + case SEC_VOLTAGE_18:
  1798. + buf[3] = 0x01;
  1799. + buf[4] = 0x02;
  1800. + buf[5] = 0x01;/* 18V h*/
  1801. + break;
  1802. + case SEC_VOLTAGE_OFF:
  1803. + buf[3] = 0x00;/* power off */
  1804. + buf[4] = 0x00;
  1805. + buf[5] = 0x00;
  1806. + break;
  1807. + }
  1808. +
  1809. + return f300_xfer(fe, buf);
  1810. +}
  1811. diff -r 8bff7e6c44d4 -r 437554d884f7 linux/drivers/media/video/cx23885/cx23885-f300.h
  1812. --- /dev/null Thu Jan 01 00:00:00 1970 +0000
  1813. +++ b/linux/drivers/media/video/cx23885/cx23885-f300.h Tue Nov 24 18:38:18 2009 +0200
  1814. @@ -0,0 +1,2 @@
  1815. +extern int f300_set_voltage(struct dvb_frontend *fe,
  1816. + fe_sec_voltage_t voltage);
  1817. diff -r 8bff7e6c44d4 -r 437554d884f7 linux/drivers/media/video/cx23885/cx23885.h
  1818. --- a/linux/drivers/media/video/cx23885/cx23885.h Sun Nov 15 12:14:14 2009 +0100
  1819. +++ b/linux/drivers/media/video/cx23885/cx23885.h Tue Nov 24 18:38:18 2009 +0200
  1820. @@ -471,6 +471,7 @@
  1821.  
  1822. extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
  1823. extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
  1824. +extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
  1825. extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
  1826. int asoutput);
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