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a guest Oct 23rd, 2018 68 Never
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  1.  
  2. ; LDR R4, =GPIO_PORTF_DATA_R
  3.  
  4. ; LDR R5, =NVIC_ST_CURRENT_R
  5.  
  6. ;doit_again
  7.  
  8. ;wait_for_press
  9.  
  10. ; STR R5, [R5]
  11.  
  12. ; LDR R0, [R4]
  13.  
  14. ; ANDS R0, R0, #0X10
  15.  
  16. ; BNE wait_for_press
  17.  
  18. ; LDR R6, [R5]
  19.  
  20. ;wait_for_release
  21.  
  22. ; LDR R0, [R4]
  23.  
  24. ; ANDS R0, R0, #0X10
  25.  
  26. ; BEQ wait_for_release
  27.  
  28. ; LDR R7, [R5]
  29.  
  30. ; SUB R8, R6, R7
  31.  
  32. ; B doit_again
  33.  
  34. ; LDR R1, =GPIO_PORTB_DATA_R
  35.  
  36. ;theloop
  37.  
  38. ; LDR R2, [R1]
  39.  
  40. ; EOR R2,R2,#0x10
  41.  
  42. ; STR R2,[R1]
  43.  
  44. ; LDR R0, =5333
  45.  
  46. ;delay 1msec on 16mHz clock
  47.  
  48. ;spin_loop
  49.  
  50. ; SUBS R0, R0, #1
  51.  
  52. ; BNE spin_loop
  53.  
  54. ; B theloop
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