Advertisement
Not a member of Pastebin yet?
Sign Up,
it unlocks many cool features!
- us.v:
- `timescale 1ns / 1ps
- //////////////////////////////////////////////////////////////////////////////////
- // Company:
- // Engineer:
- //
- // Create Date: 02:32:52 06/19/2018
- // Design Name:
- // Module Name: us
- // Project Name:
- // Target Devices:
- // Tool versions:
- // Description:
- //
- // Dependencies:
- //
- // Revision:
- // Revision 0.01 - File Created
- // Additional Comments:
- //
- //////////////////////////////////////////////////////////////////////////////////
- module us(
- input X1,
- input X2,
- input RST,
- input CLK,
- output reg Z1,
- output reg Z2,
- output reg Z3,
- output reg M,
- output [2:0] _stan,
- output [7:0] _tim,
- output [7:0] _tim2
- );
- reg [2:0] stan;
- reg [7:0] tim;
- reg [7:0] tim2;
- reg [31:0] cnt1;
- reg CLK2;
- always@(posedge CLK)
- if(cnt1 < 2500000) cnt1<=cnt1+1;
- else begin cnt1<=0; CLK2<=~CLK2; end
- always@(posedge CLK2)
- begin
- if(~RST) begin tim=30; stan<=1; Z1<=0; Z2<=0; Z3<=0; M<=0; end
- else
- begin
- case(stan)
- 3'd1: begin Z1<=1; Z2<=0; Z3<=0; M<=0;
- if(!tim) begin tim=10; stan<=2; end
- else
- if(X2) begin tim=10; tim2=100; stan<=3; end
- end
- 3'd2: begin Z1<=0; Z2<=1; Z3<=0; M<=0;
- if(!tim) begin tim=30; stan<=1; end
- else
- if(X2) begin tim=10; tim2=100; stan<=3; end
- end
- 3'd3: begin Z1<=0; Z2<=0; Z3<=0; M<=1;
- if(!tim) begin tim=10; stan<=4; end
- else
- if (!tim2) begin tim=20; stan<=5; end
- end
- 3'd4:begin Z1<=0; Z2<=0; Z3<=0; M<=0;
- if(!tim) begin tim=10; stan<=3; end
- else
- if(!tim2) begin tim=20; stan<=5; end
- end
- 3'd5: begin Z1<=0; Z2<=0; Z3<=1; M<=0;
- if(!tim&X1) begin tim=10; stan<=6; end
- else
- if(!X1) begin tim=30; stan<=1; end
- end
- 3'd6: begin Z1<=0; Z2<=0; Z3<=0; M<=0;
- if(!tim) begin tim=20; stan<=5; end
- end
- endcase
- if(tim) tim=tim-1;
- if(tim2) tim2=tim2-1;
- end
- end
- assign _stan=stan;
- assign _tim=tim;
- assign _tim2=tim2;
- endmodule
- plytka:
- NET "X1" LOC = "V8" | IOSTANDARD = LVTTL | PULLUP ;
- NET "X2" LOC = "U10" | IOSTANDARD = LVTTL | PULLUP ;
- NET "RST" LOC = "T9" | IOSTANDARD = LVTTL | PULLUP ;
- NET "CLK" LOC = "E12"| IOSTANDARD = LVCMOS33 ;
- NET "Z1" LOC = "R20" | IOSTANDARD = LVTTL | SLEW = QUIETIO | DRIVE = 4 ;
- NET "Z2" LOC = "T19" | IOSTANDARD = LVTTL | SLEW = QUIETIO | DRIVE = 4 ;
- NET "Z3" LOC = "U20" | IOSTANDARD = LVTTL | SLEW = QUIETIO | DRIVE = 4 ;
- NET "M" LOC = "U19" | IOSTANDARD = LVTTL | SLEW = QUIETIO | DRIVE = 4 ;
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement