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  1. From 600c6edb07a40ec6c3faacca02dd6e63f72a347d Mon Sep 17 00:00:00 2001
  2. From: Adam Ford <aford173@gmail.com>
  3. Date: Tue, 8 Aug 2017 10:26:52 -0500
  4. Subject: [PATCH] Add updates for Logic PD AM37xx/DM37xx Torpedo + Wireless
  5.  
  6. Signed-off-by: Adam Ford <aford173@gmail.com>
  7.  
  8. diff --git a/Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt b/Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt
  9. new file mode 100644
  10. index 0000000..5befb53
  11. --- /dev/null
  12. +++ b/Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt
  13. @@ -0,0 +1,18 @@
  14. +* OMAP PWM for dual-mode timers
  15. +
  16. +Required properties:
  17. +- compatible: Shall contain "ti,omap-dmtimer-pwm".
  18. +- ti,timers: phandle to PWM capable OMAP timer. See arm/omap/timer.txt for info
  19. + about these timers.
  20. +- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
  21. + the cells format.
  22. +
  23. +Optional properties:
  24. +- ti,prescaler: Should be a value between 0 and 7, see the timers datasheet
  25. +
  26. +Example:
  27. + pwm9: dmtimer-pwm@9 {
  28. + compatible = "ti,omap-dmtimer-pwm";
  29. + ti,timers = <&timer9>;
  30. + #pwm-cells = <3>;
  31. + };
  32. diff --git a/arch/arm/boot/dts/logicpd-som-lv-37xx-devkit.dts b/arch/arm/boot/dts/logicpd-som-lv-37xx-devkit.dts
  33. new file mode 100644
  34. index 0000000..b936b23
  35. --- /dev/null
  36. +++ b/arch/arm/boot/dts/logicpd-som-lv-37xx-devkit.dts
  37. @@ -0,0 +1,268 @@
  38. +/*
  39. + * This program is free software; you can redistribute it and/or modify
  40. + * it under the terms of the GNU General Public License version 2 as
  41. + * published by the Free Software Foundation.
  42. + */
  43. +
  44. +/dts-v1/;
  45. +
  46. +#include "omap36xx.dtsi"
  47. +#include "logicpd-som-lv.dtsi"
  48. +#include "omap-gpmc-smsc9221.dtsi"
  49. +
  50. +/ {
  51. + model = "LogicPD Zoom DM3730 SOM-LV Development Kit";
  52. + compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3630", "ti,omap3";
  53. +
  54. + gpio_keys {
  55. + compatible = "gpio-keys";
  56. + pinctrl-names = "default";
  57. + pinctrl-0 = <&gpio_key_pins>;
  58. +
  59. + sysboot2 {
  60. + label = "gpio3";
  61. + gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* gpio_111 / uP_GPIO_3 */
  62. + linux,code = <BTN_0>;
  63. + wakeup-source;
  64. + };
  65. + };
  66. +
  67. + sound {
  68. + compatible = "ti,omap-twl4030";
  69. + ti,model = "omap3logic";
  70. + ti,mcbsp = <&mcbsp2>;
  71. + };
  72. +
  73. + leds {
  74. + compatible = "gpio-leds";
  75. + pinctrl-names = "default";
  76. + pinctrl-0 = <&led_pins &led_pins_wkup>;
  77. +
  78. + led1 {
  79. + label = "led1";
  80. + gpios = <&gpio5 5 GPIO_ACTIVE_LOW>; /* gpio133 */
  81. + linux,default-trigger = "cpu0";
  82. + };
  83. +
  84. + led2 {
  85. + label = "led2";
  86. + gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; /* gpio11 */
  87. + linux,default-trigger = "none";
  88. + };
  89. + };
  90. +};
  91. +
  92. +&vaux1 {
  93. + regulator-min-microvolt = <3000000>;
  94. + regulator-max-microvolt = <3000000>;
  95. +};
  96. +
  97. +&vaux4 {
  98. + regulator-min-microvolt = <1800000>;
  99. + regulator-max-microvolt = <1800000>;
  100. +};
  101. +
  102. +&mcbsp2 {
  103. + status = "okay";
  104. +};
  105. +
  106. +&charger {
  107. + ti,bb-uvolt = <3200000>;
  108. + ti,bb-uamp = <150>;
  109. +};
  110. +
  111. +&gpmc {
  112. + ranges = <1 0 0x08000000 0x1000000>; /* CS1: 16MB for LAN9221 */
  113. +
  114. + ethernet@gpmc {
  115. + pinctrl-names = "default";
  116. + pinctrl-0 = <&lan9221_pins>;
  117. + interrupt-parent = <&gpio5>;
  118. + interrupts = <24 IRQ_TYPE_LEVEL_LOW>; /* gpio_152 */
  119. + reg = <1 0 0xff>;
  120. + };
  121. +};
  122. +
  123. +&vpll2 {
  124. + regulator-always-on;
  125. +};
  126. +
  127. +&dss {
  128. + status = "ok";
  129. + vdds_dsi-supply = <&vpll2>;
  130. + vdda_video-supply = <&video_reg>;
  131. + pinctrl-names = "default";
  132. + pinctrl-0 = <&dss_dpi_pins1>;
  133. + port {
  134. + dpi_out: endpoint {
  135. + remote-endpoint = <&lcd_in>;
  136. + data-lines = <16>;
  137. + };
  138. + };
  139. +};
  140. +
  141. +/ {
  142. + aliases {
  143. + display0 = &lcd0;
  144. + };
  145. +
  146. + video_reg: video_reg {
  147. + compatible = "regulator-fixed";
  148. + regulator-name = "fixed-supply";
  149. + regulator-min-microvolt = <3300000>;
  150. + regulator-max-microvolt = <3300000>;
  151. + };
  152. +
  153. + lcd0: display@0 {
  154. + compatible = "panel-dpi";
  155. + label = "28";
  156. + status = "okay";
  157. + /* default-on; */
  158. + pinctrl-names = "default";
  159. + pinctrl-0 = <&lcd_enable_pin>;
  160. + enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; /* gpio155, lcd INI */
  161. + port {
  162. + lcd_in: endpoint {
  163. + remote-endpoint = <&dpi_out>;
  164. + };
  165. + };
  166. +
  167. + panel-timing {
  168. + clock-frequency = <9000000>;
  169. + hactive = <480>;
  170. + vactive = <272>;
  171. + hfront-porch = <3>;
  172. + hback-porch = <2>;
  173. + hsync-len = <42>;
  174. + vback-porch = <3>;
  175. + vfront-porch = <4>;
  176. + vsync-len = <11>;
  177. + hsync-active = <0>;
  178. + vsync-active = <0>;
  179. + de-active = <1>;
  180. + pixelclk-active = <1>;
  181. + };
  182. + };
  183. +
  184. + bl: backlight {
  185. + compatible = "pwm-backlight";
  186. + pinctrl-names = "default";
  187. + pinctrl-0 = <&backlight_pins>;
  188. + pwms = <&twl_pwm 0 5000000>;
  189. + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
  190. + default-brightness-level = <7>;
  191. + enable-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; /* gpio_8 */
  192. + };
  193. +};
  194. +
  195. +&mmc1 {
  196. + interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
  197. + pinctrl-names = "default";
  198. + pinctrl-0 = <&mmc1_pins &mmc1_cd>;
  199. + wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */
  200. + cd-gpios = <&gpio4 14 IRQ_TYPE_LEVEL_LOW>; /* gpio_110 */
  201. + vmmc-supply = <&vmmc1>;
  202. + bus-width = <4>;
  203. + cap-power-off-card;
  204. +};
  205. +
  206. +&omap3_pmx_core {
  207. + gpio_key_pins: pinmux_gpio_key_pins {
  208. + pinctrl-single,pins = <
  209. + OMAP3_CORE1_IOPAD(0x212e, PIN_INPUT_PULLUP | MUX_MODE4) /* cam_xclkb.gpio_111 / uP_GPIO_3*/
  210. + >;
  211. + };
  212. +
  213. + led_pins: pinmux_led_pins {
  214. + pinctrl-single,pins = <
  215. + OMAP3_CORE1_IOPAD(0x215e, PIN_OUTPUT_PULLUP | MUX_MODE4) /* sdmmc2_dat1.gpio_133 / uP_GPIO_0 */
  216. + >;
  217. + };
  218. +
  219. + lan9221_pins: pinmux_lan9221_pins {
  220. + pinctrl-single,pins = <
  221. + OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */
  222. + >;
  223. + };
  224. +
  225. + mmc1_pins: pinmux_mmc1_pins {
  226. + pinctrl-single,pins = <
  227. + OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
  228. + OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
  229. + OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
  230. + OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
  231. + OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
  232. + OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
  233. + OMAP3_CORE1_IOPAD(0x2132, PIN_INPUT_PULLUP | MUX_MODE4) /* cam_strobe.gpio_126 sdmmc1_wp*/
  234. + >;
  235. + };
  236. +
  237. + lcd_enable_pin: pinmux_lcd_enable_pin {
  238. + pinctrl-single,pins = <
  239. + OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4) /* mcbsp4_fs.gpio_155 */
  240. + >;
  241. + };
  242. +
  243. + dss_dpi_pins1: pinmux_dss_dpi_pins1 {
  244. + pinctrl-single,pins = <
  245. + OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_pclk.dss_pclk */
  246. + OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_hsync.dss_hsync */
  247. + OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_vsync.dss_vsync */
  248. + OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_acbias.dss_acbias */
  249. +
  250. + OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data0.dss_data0 */
  251. + OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data1.dss_data1 */
  252. + OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data2.dss_data2 */
  253. + OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data3.dss_data3 */
  254. + OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data4.dss_data4 */
  255. + OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data5.dss_data5 */
  256. + OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data6.dss_data6 */
  257. + OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data7.dss_data7 */
  258. + OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data8.dss_data8 */
  259. + OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data9.dss_data9 */
  260. + OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data10.dss_data10 */
  261. + OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data11.dss_data11 */
  262. + OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data12.dss_data12 */
  263. + OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data13.dss_data13 */
  264. + OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data14.dss_data14 */
  265. + OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data15.dss_data15 */
  266. + >;
  267. + };
  268. +};
  269. +
  270. +&omap3_pmx_wkup {
  271. + led_pins_wkup: pinmux_led_pins_wkup {
  272. + pinctrl-single,pins = <
  273. + OMAP3_WKUP_IOPAD(0x2a24, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu0.gpio_11 / uP_GPIO_1 */
  274. + >;
  275. + };
  276. +
  277. + backlight_pins: pinmux_backlight_pins {
  278. + pinctrl-single,pins = <
  279. + OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4) /* sys_boot6.gpio_8 */
  280. + >;
  281. + };
  282. +
  283. + mmc1_cd: pinmux_mmc1_cd {
  284. + pinctrl-single,pins = <
  285. + OMAP3_WKUP_IOPAD(0x212c, PIN_INPUT_PULLUP | MUX_MODE4) /* cam_d11.gpio_110 */
  286. + >;
  287. + };
  288. +};
  289. +
  290. +
  291. +&uart1 {
  292. + interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
  293. +};
  294. +
  295. +/* Wired to the tps65950 on the SOM, only the USB connector is on the devkit */
  296. +&usb_otg_hs {
  297. + pinctrl-names = "default";
  298. + pinctrl-0 = <&hsusb_otg_pins>;
  299. + interface-type = <0>;
  300. + usb-phy = <&usb2_phy>;
  301. + phys = <&usb2_phy>;
  302. + phy-names = "usb2-phy";
  303. + mode = <3>;
  304. + power = <50>;
  305. +};
  306. diff --git a/arch/arm/boot/dts/logicpd-som-lv.dtsi b/arch/arm/boot/dts/logicpd-som-lv.dtsi
  307. new file mode 100644
  308. index 0000000..365f39f
  309. --- /dev/null
  310. +++ b/arch/arm/boot/dts/logicpd-som-lv.dtsi
  311. @@ -0,0 +1,265 @@
  312. +/*
  313. + * This program is free software; you can redistribute it and/or modify
  314. + * it under the terms of the GNU General Public License version 2 as
  315. + * published by the Free Software Foundation.
  316. + */
  317. +
  318. +#include <dt-bindings/input/input.h>
  319. +
  320. +/ {
  321. + cpus {
  322. + cpu@0 {
  323. + cpu0-supply = <&vcc>;
  324. + };
  325. + };
  326. +
  327. + wl12xx_vmmc: wl12xx_vmmc {
  328. + compatible = "regulator-fixed";
  329. + regulator-name = "vwl1271";
  330. + regulator-min-microvolt = <1800000>;
  331. + regulator-max-microvolt = <1800000>;
  332. + gpio = <&gpio1 3 0>; /* gpio_3 */
  333. + startup-delay-us = <70000>;
  334. + enable-active-high;
  335. + vin-supply = <&vmmc2>;
  336. + };
  337. +
  338. + /* HS USB Host PHY on PORT 1 */
  339. + hsusb2_phy: hsusb2_phy {
  340. + compatible = "usb-nop-xceiv";
  341. + reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
  342. + };
  343. +};
  344. +
  345. +&gpmc {
  346. + ranges = <0 0 0x00000000 0x1000000>; /* CS0: 16MB for NAND */
  347. +
  348. + nand@0,0 {
  349. + linux,mtd-name = "micron,mt29f4g16abbda3w";
  350. + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
  351. + nand-bus-width = <16>;
  352. + ti,nand-ecc-opt = "bch8";
  353. + gpmc,sync-clk-ps = <0>;
  354. + gpmc,cs-on-ns = <0>;
  355. + gpmc,cs-rd-off-ns = <44>;
  356. + gpmc,cs-wr-off-ns = <44>;
  357. + gpmc,adv-on-ns = <6>;
  358. + gpmc,adv-rd-off-ns = <34>;
  359. + gpmc,adv-wr-off-ns = <44>;
  360. + gpmc,we-off-ns = <40>;
  361. + gpmc,oe-off-ns = <54>;
  362. + gpmc,access-ns = <64>;
  363. + gpmc,rd-cycle-ns = <82>;
  364. + gpmc,wr-cycle-ns = <82>;
  365. + gpmc,wr-access-ns = <40>;
  366. + gpmc,wr-data-mux-bus-ns = <0>;
  367. + gpmc,device-width = <2>;
  368. +
  369. + gpmc,page-burst-access-ns = <5>;
  370. + gpmc,cycle2cycle-delay-ns = <50>;
  371. +
  372. + #address-cells = <1>;
  373. + #size-cells = <1>;
  374. +
  375. + /* u-boot uses mtdparts=omap2-nand.0:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs) */
  376. +
  377. + x-loader@0 {
  378. + label = "x-loader";
  379. + reg = <0 0x80000>;
  380. + };
  381. +
  382. + bootloaders@80000 {
  383. + label = "u-boot";
  384. + reg = <0x80000 0x1e0000>;
  385. + };
  386. +
  387. + bootloaders_env@260000 {
  388. + label = "u-boot-env";
  389. + reg = <0x260000 0x20000>;
  390. + };
  391. +
  392. + kernel@280000 {
  393. + label = "kernel";
  394. + reg = <0x280000 0x400000>;
  395. + };
  396. +
  397. + filesystem@680000 {
  398. + label = "fs";
  399. + reg = <0x680000 0>; /* 0 = MTDPART_SIZ_FULL */
  400. + };
  401. + };
  402. +};
  403. +
  404. +&i2c1 {
  405. + clock-frequency = <2600000>;
  406. +
  407. + twl: twl@48 {
  408. + reg = <0x48>;
  409. + interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  410. + interrupt-parent = <&intc>;
  411. + twl_audio: audio {
  412. + compatible = "ti,twl4030-audio";
  413. + codec {
  414. + };
  415. + };
  416. + };
  417. +};
  418. +
  419. +&i2c2 {
  420. + clock-frequency = <400000>;
  421. +};
  422. +
  423. +&i2c3 {
  424. + clock-frequency = <400000>;
  425. +};
  426. +
  427. +&mmc3 {
  428. + interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
  429. + pinctrl-0 = <&mmc3_pins>;
  430. + pinctrl-names = "default";
  431. + vmmc-supply = <&wl12xx_vmmc>;
  432. + non-removable;
  433. + bus-width = <4>;
  434. + cap-power-off-card;
  435. + #address-cells = <1>;
  436. + #size-cells = <0>;
  437. + wlcore: wlcore@2 {
  438. + compatible = "ti,wl1273";
  439. + reg = <2>;
  440. + interrupt-parent = <&gpio5>;
  441. + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
  442. + ref-clock-frequency = <26000000>;
  443. + };
  444. +};
  445. +
  446. +&usbhshost {
  447. + port2-mode = "ehci-phy";
  448. +};
  449. +
  450. +&usbhsehci {
  451. + phys = <0 &hsusb2_phy>;
  452. +};
  453. +
  454. +
  455. +&omap3_pmx_core {
  456. + pinctrl-names = "default";
  457. + pinctrl-0 = <&hsusb2_pins>;
  458. +
  459. + mmc3_pins: pinmux_mm3_pins {
  460. + pinctrl-single,pins = <
  461. + OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */
  462. + OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
  463. + OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
  464. + OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
  465. + OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */
  466. + OMAP3_CORE1_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
  467. + OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
  468. + OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */
  469. + >;
  470. + };
  471. + mcbsp2_pins: pinmux_mcbsp2_pins {
  472. + pinctrl-single,pins = <
  473. + OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */
  474. + OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */
  475. + OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */
  476. + OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */
  477. + >;
  478. + };
  479. + uart2_pins: pinmux_uart2_pins {
  480. + pinctrl-single,pins = <
  481. + OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */
  482. + OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/
  483. + OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
  484. + OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
  485. + OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */
  486. + >;
  487. + };
  488. + mcspi1_pins: pinmux_mcspi1_pins {
  489. + pinctrl-single,pins = <
  490. + OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
  491. + OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
  492. + OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
  493. + OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
  494. + >;
  495. + };
  496. +
  497. + hsusb2_pins: pinmux_hsusb2_pins {
  498. + pinctrl-single,pins = <
  499. + OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
  500. + OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
  501. + OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
  502. + OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
  503. + OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
  504. + OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
  505. + >;
  506. + };
  507. +
  508. + hsusb_otg_pins: pinmux_hsusb_otg_pins {
  509. + pinctrl-single,pins = <
  510. + OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
  511. + OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
  512. + OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
  513. + OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
  514. + OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
  515. + OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
  516. + OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
  517. + OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
  518. + OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
  519. + OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
  520. + OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
  521. + OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
  522. + >;
  523. + };
  524. +
  525. +
  526. +};
  527. +
  528. +&omap3_pmx_wkup {
  529. + pinctrl-names = "default";
  530. + pinctrl-0 = <&hsusb2_reset_pin>;
  531. + hsusb2_reset_pin: pinmux_hsusb1_reset_pin {
  532. + pinctrl-single,pins = <
  533. + OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
  534. + >;
  535. + };
  536. +};
  537. +
  538. +&omap3_pmx_core2 {
  539. + pinctrl-names = "default";
  540. + pinctrl-0 = <&hsusb2_2_pins>;
  541. + hsusb2_2_pins: pinmux_hsusb2_2_pins {
  542. + pinctrl-single,pins = <
  543. + OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
  544. + OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
  545. + OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
  546. + OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
  547. + OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
  548. + OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
  549. + >;
  550. + };
  551. +};
  552. +
  553. +&uart2 {
  554. + interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
  555. + pinctrl-names = "default";
  556. + pinctrl-0 = <&uart2_pins>;
  557. +};
  558. +
  559. +&mcspi1 {
  560. + pinctrl-names = "default";
  561. + pinctrl-0 = <&mcspi1_pins>;
  562. +};
  563. +
  564. +#include "twl4030.dtsi"
  565. +#include "twl4030_omap3.dtsi"
  566. +
  567. +&twl {
  568. + twl_power: power {
  569. + compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
  570. + ti,use_poweroff;
  571. + };
  572. +};
  573. +
  574. +&twl_gpio {
  575. + ti,use-leds;
  576. +};
  577. diff --git a/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts b/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
  578. index 5b04300..140029f 100644
  579. --- a/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
  580. +++ b/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
  581. @@ -11,7 +11,7 @@
  582. #include "omap-gpmc-smsc9221.dtsi"
  583.  
  584. / {
  585. - model = "LogicPD Zoom DM3730 Torpedo Development Kit";
  586. + model = "LogicPD Zoom DM3730 Torpedo";
  587. compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3630", "ti,omap3";
  588.  
  589. gpio_keys {
  590. @@ -23,31 +23,37 @@
  591. label = "sysboot2";
  592. gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; /* gpio2 */
  593. linux,code = <BTN_0>;
  594. - gpio-key,wakeup;
  595. + wakeup-source;
  596. };
  597.  
  598. sysboot5 {
  599. label = "sysboot5";
  600. gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; /* gpio7 */
  601. linux,code = <BTN_1>;
  602. - gpio-key,wakeup;
  603. + wakeup-source;
  604. };
  605.  
  606. gpio1 {
  607. label = "gpio1";
  608. gpios = <&gpio6 21 GPIO_ACTIVE_LOW>; /* gpio181 */
  609. linux,code = <BTN_2>;
  610. - gpio-key,wakeup;
  611. + wakeup-source;
  612. };
  613.  
  614. gpio2 {
  615. label = "gpio2";
  616. gpios = <&gpio6 18 GPIO_ACTIVE_LOW>; /* gpio178 */
  617. linux,code = <BTN_3>;
  618. - gpio-key,wakeup;
  619. + wakeup-source;
  620. };
  621. };
  622.  
  623. + sound {
  624. + compatible = "ti,omap-twl4030";
  625. + ti,model = "omap3logic";
  626. + ti,mcbsp = <&mcbsp2>;
  627. + };
  628. +
  629. leds {
  630. compatible = "gpio-leds";
  631. pinctrl-names = "default";
  632. @@ -65,6 +71,29 @@
  633. linux,default-trigger = "none";
  634. };
  635. };
  636. +
  637. + pwm10: dmtimer-pwm {
  638. + compatible = "ti,omap-dmtimer-pwm";
  639. + pinctrl-names = "default";
  640. + pinctrl-0 = <&pwm_pins>;
  641. + ti,timers = <&timer10>;
  642. + #pwm-cells = <3>;
  643. + };
  644. +
  645. +};
  646. +
  647. +&vaux1 {
  648. + regulator-min-microvolt = <3000000>;
  649. + regulator-max-microvolt = <3000000>;
  650. +};
  651. +
  652. +&vaux4 {
  653. + regulator-min-microvolt = <1800000>;
  654. + regulator-max-microvolt = <1800000>;
  655. +};
  656. +
  657. +&mcbsp2 {
  658. + status = "okay";
  659. };
  660.  
  661. &charger {
  662. @@ -73,7 +102,8 @@
  663. };
  664.  
  665. &gpmc {
  666. - ranges = <1 0 0x08000000 0x1000000>; /* CS1: 16MB for LAN9221 */
  667. + ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */
  668. + 1 0 0x2c000000 0x1000000>; /* CS1: 16MB for LAN9221 */
  669.  
  670. ethernet@gpmc {
  671. pinctrl-names = "default";
  672. @@ -84,6 +114,88 @@
  673. };
  674. };
  675.  
  676. +&vpll2 {
  677. + regulator-always-on;
  678. +};
  679. +
  680. +&dss {
  681. + status = "ok";
  682. + vdds_dsi-supply = <&vpll2>;
  683. + vdda_video-supply = <&video_reg>;
  684. + pinctrl-names = "default";
  685. + pinctrl-0 = <&dss_dpi_pins1>;
  686. + port {
  687. + dpi_out: endpoint {
  688. + remote-endpoint = <&lcd_in>;
  689. + data-lines = <16>;
  690. + };
  691. + };
  692. +};
  693. +
  694. +/ {
  695. + aliases {
  696. + display0 = &lcd0;
  697. + };
  698. +
  699. + video_reg: video_reg {
  700. + pinctrl-names = "default";
  701. + pinctrl-0 = <&panel_pwr_pins>;
  702. + compatible = "regulator-fixed";
  703. + regulator-name = "lcd-supply";
  704. + regulator-min-microvolt = <3300000>;
  705. + regulator-max-microvolt = <3300000>;
  706. + gpio = <&gpio5 27 GPIO_ACTIVE_HIGH>; /* gpio155, lcd INI */
  707. + };
  708. +
  709. + lcd0: display {
  710. + compatible = "panel-dpi";
  711. + label = "snc";
  712. + status = "okay";
  713. + /* default-on; */
  714. + pinctrl-names = "default";
  715. +
  716. + port {
  717. + lcd_in: endpoint {
  718. + remote-endpoint = <&dpi_out>;
  719. + };
  720. + };
  721. +
  722. + panel-timing {
  723. + clock-frequency = <9000000>;
  724. + hactive = <480>;
  725. + vactive = <272>;
  726. + hfront-porch = <3>;
  727. + hback-porch = <2>;
  728. + hsync-len = <42>;
  729. + vback-porch = <3>;
  730. + vfront-porch = <2>;
  731. + vsync-len = <11>;
  732. + hsync-active = <1>;
  733. + vsync-active = <1>;
  734. + de-active = <1>;
  735. + pixelclk-active = <0>;
  736. + };
  737. + };
  738. +
  739. + backlight_reg: backlight_reg {
  740. + compatible = "regulator-fixed";
  741. + regulator-name = "dummy-supply";
  742. + regulator-min-microvolt = <3300000>;
  743. + regulator-max-microvolt = <3300000>;
  744. + };
  745. +
  746. + bl: backlight {
  747. + compatible = "pwm-backlight";
  748. + pinctrl-names = "default";
  749. + pinctrl-0 = <&backlight_pins>;
  750. + pwms = <&pwm10 0 5000000 0>;
  751. + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
  752. + default-brightness-level = <7>;
  753. + enable-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>; /* gpio_154 */
  754. + power-supply = <&backlight_reg>;
  755. + };
  756. +};
  757. +
  758. &mmc1 {
  759. interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
  760. pinctrl-names = "default";
  761. @@ -102,6 +214,12 @@
  762. >;
  763. };
  764.  
  765. + pwm_pins: pinmux_pwm_pins {
  766. + pinctrl-single,pins = <
  767. + OMAP3_CORE1_IOPAD(0x20B8, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* gpmc_ncs5.gpt_10_pwm_evt */
  768. + >;
  769. + };
  770. +
  771. led_pins: pinmux_led_pins {
  772. pinctrl-single,pins = <
  773. OMAP3_CORE1_IOPAD(0x21d8, PIN_OUTPUT | MUX_MODE4) /* gpio_179 */
  774. @@ -119,6 +237,71 @@
  775. OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
  776. >;
  777. };
  778. +
  779. + tsc2004_pins: pinmux_tsc2004_pins {
  780. + pinctrl-single,pins = <
  781. + OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* mcbsp4_dr.gpio_153 */
  782. + >;
  783. + };
  784. +
  785. + backlight_pins: pinmux_backlight_pins {
  786. + pinctrl-single,pins = <
  787. + OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4) /* mcbsp4_dx.gpio_154 */
  788. + >;
  789. + };
  790. +
  791. + isp_pins: pinmux_isp_pins {
  792. + pinctrl-single,pins = <
  793. + OMAP3_CORE1_IOPAD(0x210c, PIN_INPUT | MUX_MODE0) /* cam_hs.cam_hs */
  794. + OMAP3_CORE1_IOPAD(0x210e, PIN_INPUT | MUX_MODE0) /* cam_vs.cam_vs */
  795. + OMAP3_CORE1_IOPAD(0x2110, PIN_INPUT | MUX_MODE0) /* cam_xclka.cam_xclka */
  796. + OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT | MUX_MODE0) /* cam_pclk.cam_pclk */
  797. +
  798. + OMAP3_CORE1_IOPAD(0x2114, PIN_INPUT | MUX_MODE0) /* cam_d0.cam_d0 */
  799. + OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT | MUX_MODE0) /* cam_d1.cam_d1 */
  800. + OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT | MUX_MODE0) /* cam_d2.cam_d2 */
  801. + OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT | MUX_MODE0) /* cam_d3.cam_d3 */
  802. + OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT | MUX_MODE0) /* cam_d4.cam_d4 */
  803. + OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT | MUX_MODE0) /* cam_d5.cam_d5 */
  804. + OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0) /* cam_d6.cam_d6 */
  805. + OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0) /* cam_d7.cam_d7 */
  806. + >;
  807. + };
  808. +
  809. + panel_pwr_pins: pinmux_panel_pwr_pins {
  810. + pinctrl-single,pins = <
  811. + OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4) /* mcbsp4_fs.gpio_155 */
  812. + >;
  813. + };
  814. +
  815. + dss_dpi_pins1: pinmux_dss_dpi_pins1 {
  816. + pinctrl-single,pins = <
  817. + OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_pclk.dss_pclk */
  818. + OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_hsync.dss_hsync */
  819. + OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_vsync.dss_vsync */
  820. + OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_acbias.dss_acbias */
  821. +
  822. + OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data6.dss_data6 */
  823. + OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data7.dss_data7 */
  824. + OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data8.dss_data8 */
  825. + OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data9.dss_data9 */
  826. + OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data10.dss_data10 */
  827. + OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data11.dss_data11 */
  828. + OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data12.dss_data12 */
  829. + OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data13.dss_data13 */
  830. + OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data14.dss_data14 */
  831. + OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data15.dss_data15 */
  832. + OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data16.dss_data16 */
  833. + OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data17.dss_data17 */
  834. +
  835. + OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data18.dss_data0 */
  836. + OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data19.dss_data1 */
  837. + OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data20.dss_data2 */
  838. + OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data21.dss_data3 */
  839. + OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data22.dss_data4 */
  840. + OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data23.dss_data5 */
  841. + >;
  842. + };
  843. };
  844.  
  845. &omap3_pmx_wkup {
  846. @@ -142,12 +325,84 @@
  847. };
  848. };
  849.  
  850. +&i2c2 {
  851. + mt9p031@48 {
  852. + compatible = "aptina,mt9p031";
  853. + reg = <0x48>;
  854. + clocks = <&isp 0>;
  855. + vaa-supply = <&vaux4>;
  856. + vdd-supply = <&vaux4>;
  857. + vdd_io-supply = <&vaux4>;
  858. + port {
  859. + mt9p031_out: endpoint {
  860. + input-clock-frequency = <24000000>;
  861. + pixel-clock-frequency = <72000000>;
  862. + remote-endpoint = <&ccdc_ep>;
  863. + };
  864. + };
  865. + };
  866. +};
  867. +
  868. +&i2c3 {
  869. + touchscreen: tsc2004@48 {
  870. + compatible = "ti,tsc2004";
  871. + reg = <0x48>;
  872. + vio-supply = <&vaux1>;
  873. + pinctrl-names = "default";
  874. + pinctrl-0 = <&tsc2004_pins>;
  875. + interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_RISING>; /* gpio 153 */
  876. +
  877. + touchscreen-fuzz-x = <4>;
  878. + touchscreen-fuzz-y = <7>;
  879. + touchscreen-fuzz-pressure = <2>;
  880. + touchscreen-size-x = <4096>;
  881. + touchscreen-size-y = <4096>;
  882. + touchscreen-max-pressure = <2048>;
  883. +
  884. + ti,x-plate-ohms = <280>;
  885. + ti,esd-recovery-timeout-ms = <8000>;
  886. + };
  887. +};
  888. +
  889. +&mcspi1 {
  890. + at25@0 {
  891. + compatible = "atmel,at25";
  892. + reg = <0>;
  893. + spi-max-frequency = <5000000>;
  894. + spi-cpha;
  895. + spi-cpol;
  896. +
  897. + pagesize = <64>;
  898. + size = <32768>;
  899. + address-width = <16>;
  900. + };
  901. +};
  902. +
  903. +&isp {
  904. + pinctrl-names = "default";
  905. + pinctrl-0 = <&isp_pins>;
  906. + ports {
  907. + port@0 {
  908. + reg = <0>;
  909. + ccdc_ep: endpoint {
  910. + remote-endpoint = <&mt9p031_out>;
  911. + bus-width = <8>;
  912. + hsync-active = <1>;
  913. + vsync-active = <1>;
  914. + pclk-sample = <0>;
  915. + };
  916. + };
  917. + };
  918. +};
  919. +
  920. &uart1 {
  921. interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
  922. };
  923.  
  924. /* Wired to the tps65950 on the SOM, only the USB connector is on the devkit */
  925. &usb_otg_hs {
  926. + pinctrl-names = "default";
  927. + pinctrl-0 = <&hsusb_otg_pins>;
  928. interface-type = <0>;
  929. usb-phy = <&usb2_phy>;
  930. phys = <&usb2_phy>;
  931. diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
  932. index 80f6c78..e05ade9 100644
  933. --- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
  934. +++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
  935. @@ -21,7 +21,6 @@
  936. linux,default-trigger = "none";
  937. };
  938. };
  939. -
  940. wl12xx_vmmc: wl12xx_vmmc {
  941. compatible = "regulator-fixed";
  942. regulator-name = "vwl1271";
  943. @@ -38,8 +37,12 @@
  944. ranges = <0 0 0x00000000 0x1000000>; /* CS0: 16MB for NAND */
  945.  
  946. nand@0,0 {
  947. - linux,mtd-name = "micron,mt29f4g16abbda3w";
  948. + compatible = "ti,omap2-nand";
  949. reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
  950. + interrupt-parent = <&gpmc>;
  951. + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
  952. + <1 IRQ_TYPE_NONE>; /* termcount */
  953. + linux,mtd-name = "micron,mt29f4g16abbda3w";
  954. nand-bus-width = <16>;
  955. ti,nand-ecc-opt = "bch8";
  956. gpmc,sync-clk-ps = <0>;
  957. @@ -59,43 +62,34 @@
  958. gpmc,device-width = <2>;
  959. #address-cells = <1>;
  960. #size-cells = <1>;
  961. -
  962. - /* u-boot uses mtdparts=omap2-nand.0:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs) */
  963. -
  964. - x-loader@0 {
  965. - label = "x-loader";
  966. - reg = <0 0x80000>;
  967. - };
  968. -
  969. - bootloaders@80000 {
  970. - label = "u-boot";
  971. - reg = <0x80000 0x1e0000>;
  972. - };
  973. -
  974. - bootloaders_env@260000 {
  975. - label = "u-boot-env";
  976. - reg = <0x260000 0x20000>;
  977. - };
  978. -
  979. - kernel@280000 {
  980. - label = "kernel";
  981. - reg = <0x280000 0x400000>;
  982. - };
  983. -
  984. - filesystem@680000 {
  985. - label = "fs";
  986. - reg = <0x680000 0>; /* 0 = MTDPART_SIZ_FULL */
  987. - };
  988. };
  989. };
  990.  
  991. &i2c1 {
  992. - clock-frequency = <2600000>;
  993. + clock-frequency = <400000>;
  994.  
  995. twl: twl@48 {
  996. reg = <0x48>;
  997. interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  998. interrupt-parent = <&intc>;
  999. + twl_audio: audio {
  1000. + compatible = "ti,twl4030-audio";
  1001. + codec {
  1002. + };
  1003. + };
  1004. + };
  1005. +};
  1006. +
  1007. +&i2c2 {
  1008. + clock-frequency = <400000>;
  1009. +};
  1010. +
  1011. +&i2c3 {
  1012. + clock-frequency = <400000>;
  1013. + at24@50 {
  1014. + compatible = "at24,24c64";
  1015. + readonly;
  1016. + reg = <0x50>;
  1017. };
  1018. };
  1019.  
  1020. @@ -137,6 +131,59 @@
  1021. OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4) /* mcbsp1_fsr.gpio_157 */
  1022. >;
  1023. };
  1024. + mcbsp2_pins: pinmux_mcbsp2_pins {
  1025. + pinctrl-single,pins = <
  1026. + OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */
  1027. + OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */
  1028. + OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */
  1029. + OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */
  1030. + >;
  1031. + };
  1032. + uart2_pins: pinmux_uart2_pins {
  1033. + pinctrl-single,pins = <
  1034. + OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */
  1035. + OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/
  1036. + OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
  1037. + OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
  1038. + OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */
  1039. + >;
  1040. + };
  1041. + mcspi1_pins: pinmux_mcspi1_pins {
  1042. + pinctrl-single,pins = <
  1043. + OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
  1044. + OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
  1045. + OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
  1046. + OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
  1047. + >;
  1048. + };
  1049. + hsusb_otg_pins: pinmux_hsusb_otg_pins {
  1050. + pinctrl-single,pins = <
  1051. + OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
  1052. + OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
  1053. + OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
  1054. + OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
  1055. +
  1056. + OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
  1057. + OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
  1058. + OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
  1059. + OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
  1060. + OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
  1061. + OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
  1062. + OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
  1063. + OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
  1064. + >;
  1065. + };
  1066. +};
  1067. +
  1068. +&uart2 {
  1069. + interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
  1070. + pinctrl-names = "default";
  1071. + pinctrl-0 = <&uart2_pins>;
  1072. +};
  1073. +
  1074. +&mcspi1 {
  1075. + pinctrl-names = "default";
  1076. + pinctrl-0 = <&mcspi1_pins>;
  1077. };
  1078.  
  1079. &omap3_pmx_core2 {
  1080. @@ -148,9 +195,17 @@
  1081. };
  1082. };
  1083.  
  1084. +&ssi {
  1085. + status = "disabled";
  1086. +};
  1087. +
  1088. #include "twl4030.dtsi"
  1089. #include "twl4030_omap3.dtsi"
  1090.  
  1091. +&charger {
  1092. + status = "disabled";
  1093. +};
  1094. +
  1095. &twl {
  1096. twl_power: power {
  1097. compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
  1098. @@ -161,3 +216,7 @@
  1099. &twl_gpio {
  1100. ti,use-leds;
  1101. };
  1102. +
  1103. +&twl_keypad {
  1104. + status = "disabled";
  1105. +};
  1106. diff --git a/arch/arm/configs/omap3logic_defconfig b/arch/arm/configs/omap3logic_defconfig
  1107. new file mode 100644
  1108. index 0000000..44637eb
  1109. --- /dev/null
  1110. +++ b/arch/arm/configs/omap3logic_defconfig
  1111. @@ -0,0 +1,456 @@
  1112. +CONFIG_KERNEL_XZ=y
  1113. +CONFIG_SYSVIPC=y
  1114. +CONFIG_POSIX_MQUEUE=y
  1115. +CONFIG_FHANDLE=y
  1116. +CONFIG_AUDIT=y
  1117. +CONFIG_NO_HZ=y
  1118. +CONFIG_HIGH_RES_TIMERS=y
  1119. +CONFIG_BSD_PROCESS_ACCT=y
  1120. +CONFIG_IKCONFIG=y
  1121. +CONFIG_IKCONFIG_PROC=y
  1122. +CONFIG_LOG_BUF_SHIFT=16
  1123. +CONFIG_CGROUPS=y
  1124. +CONFIG_CGROUP_FREEZER=y
  1125. +CONFIG_CGROUP_DEVICE=y
  1126. +CONFIG_CPUSETS=y
  1127. +CONFIG_CGROUP_CPUACCT=y
  1128. +CONFIG_MEMCG=y
  1129. +CONFIG_MEMCG_SWAP=y
  1130. +CONFIG_MEMCG_KMEM=y
  1131. +CONFIG_CGROUP_PERF=y
  1132. +CONFIG_CGROUP_SCHED=y
  1133. +CONFIG_CFS_BANDWIDTH=y
  1134. +CONFIG_RT_GROUP_SCHED=y
  1135. +CONFIG_BLK_CGROUP=y
  1136. +CONFIG_BLK_DEV_INITRD=y
  1137. +CONFIG_SLAB=y
  1138. +CONFIG_PROFILING=y
  1139. +CONFIG_OPROFILE=y
  1140. +CONFIG_KPROBES=y
  1141. +CONFIG_MODULES=y
  1142. +CONFIG_MODULE_FORCE_LOAD=y
  1143. +CONFIG_MODULE_UNLOAD=y
  1144. +CONFIG_MODULE_FORCE_UNLOAD=y
  1145. +CONFIG_MODVERSIONS=y
  1146. +CONFIG_MODULE_SRCVERSION_ALL=y
  1147. +# CONFIG_BLK_DEV_BSG is not set
  1148. +CONFIG_PARTITION_ADVANCED=y
  1149. +CONFIG_ARCH_MULTI_V6=y
  1150. +CONFIG_POWER_AVS_OMAP=y
  1151. +CONFIG_POWER_AVS_OMAP_CLASS3=y
  1152. +CONFIG_OMAP_RESET_CLOCKS=y
  1153. +CONFIG_OMAP_MUX_DEBUG=y
  1154. +CONFIG_ARCH_OMAP2=y
  1155. +CONFIG_ARCH_OMAP3=y
  1156. +CONFIG_ARM_THUMBEE=y
  1157. +CONFIG_ARM_ERRATA_411920=y
  1158. +CONFIG_ARM_ERRATA_430973=y
  1159. +CONFIG_SMP=y
  1160. +CONFIG_NR_CPUS=2
  1161. +CONFIG_CMA=y
  1162. +CONFIG_SECCOMP=y
  1163. +CONFIG_ZBOOT_ROM_TEXT=0x0
  1164. +CONFIG_ZBOOT_ROM_BSS=0x0
  1165. +CONFIG_ARM_APPENDED_DTB=y
  1166. +CONFIG_ARM_ATAG_DTB_COMPAT=y
  1167. +CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200"
  1168. +CONFIG_KEXEC=y
  1169. +CONFIG_CPU_FREQ=y
  1170. +CONFIG_CPU_FREQ_STAT_DETAILS=y
  1171. +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
  1172. +CONFIG_CPU_FREQ_GOV_POWERSAVE=y
  1173. +CONFIG_CPU_FREQ_GOV_USERSPACE=y
  1174. +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
  1175. +CONFIG_CPUFREQ_DT=m
  1176. +# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
  1177. +CONFIG_CPU_IDLE=y
  1178. +CONFIG_BINFMT_MISC=y
  1179. +CONFIG_PM_DEBUG=y
  1180. +CONFIG_NET=y
  1181. +CONFIG_PACKET=y
  1182. +CONFIG_UNIX=y
  1183. +CONFIG_XFRM_USER=y
  1184. +CONFIG_NET_KEY=y
  1185. +CONFIG_NET_KEY_MIGRATE=y
  1186. +CONFIG_INET=y
  1187. +CONFIG_IP_MULTICAST=y
  1188. +CONFIG_IP_PNP=y
  1189. +CONFIG_IP_PNP_DHCP=y
  1190. +CONFIG_IP_PNP_BOOTP=y
  1191. +CONFIG_IP_PNP_RARP=y
  1192. +# CONFIG_INET_LRO is not set
  1193. +CONFIG_NETFILTER=y
  1194. +CONFIG_BRIDGE=y
  1195. +CONFIG_PHONET=m
  1196. +CONFIG_CAN=m
  1197. +CONFIG_CAN_C_CAN=m
  1198. +CONFIG_CAN_C_CAN_PLATFORM=m
  1199. +CONFIG_BT=m
  1200. +CONFIG_BT_RFCOMM=m
  1201. +CONFIG_BT_RFCOMM_TTY=y
  1202. +CONFIG_BT_BNEP=m
  1203. +CONFIG_BT_BNEP_MC_FILTER=y
  1204. +CONFIG_BT_BNEP_PROTO_FILTER=y
  1205. +CONFIG_BT_HIDP=m
  1206. +CONFIG_BT_HCIBTUSB=m
  1207. +CONFIG_BT_HCIBTSDIO=m
  1208. +CONFIG_BT_HCIUART=m
  1209. +CONFIG_BT_HCIUART_BCSP=y
  1210. +CONFIG_BT_HCIUART_LL=y
  1211. +CONFIG_BT_HCIUART_3WIRE=y
  1212. +CONFIG_BT_HCIBCM203X=m
  1213. +CONFIG_BT_HCIBPA10X=m
  1214. +CONFIG_BT_HCIBFUSB=m
  1215. +CONFIG_BT_HCIVHCI=m
  1216. +CONFIG_BT_MRVL=m
  1217. +CONFIG_BT_MRVL_SDIO=m
  1218. +CONFIG_AF_RXRPC=m
  1219. +CONFIG_RXKAD=m
  1220. +CONFIG_CFG80211=m
  1221. +CONFIG_MAC80211=m
  1222. +CONFIG_DEVTMPFS=y
  1223. +CONFIG_DEVTMPFS_MOUNT=y
  1224. +CONFIG_DMA_CMA=y
  1225. +CONFIG_OMAP_OCP2SCP=y
  1226. +CONFIG_CONNECTOR=m
  1227. +CONFIG_MTD=y
  1228. +CONFIG_MTD_CMDLINE_PARTS=y
  1229. +CONFIG_MTD_BLOCK=y
  1230. +CONFIG_MTD_OOPS=y
  1231. +CONFIG_MTD_CFI=y
  1232. +CONFIG_MTD_CFI_INTELEXT=y
  1233. +CONFIG_MTD_PHYSMAP=y
  1234. +CONFIG_MTD_PHYSMAP_OF=y
  1235. +CONFIG_MTD_M25P80=m
  1236. +CONFIG_MTD_NAND=y
  1237. +CONFIG_MTD_NAND_ECC_BCH=y
  1238. +CONFIG_MTD_NAND_OMAP2=y
  1239. +CONFIG_MTD_NAND_OMAP_BCH=y
  1240. +CONFIG_MTD_ONENAND=y
  1241. +CONFIG_MTD_ONENAND_VERIFY_WRITE=y
  1242. +CONFIG_MTD_ONENAND_OMAP2=y
  1243. +CONFIG_MTD_SPI_NOR=m
  1244. +CONFIG_MTD_UBI=y
  1245. +CONFIG_BLK_DEV_LOOP=y
  1246. +CONFIG_BLK_DEV_RAM=y
  1247. +CONFIG_BLK_DEV_RAM_SIZE=16384
  1248. +CONFIG_SENSORS_TSL2550=m
  1249. +CONFIG_BMP085_I2C=m
  1250. +CONFIG_SRAM=y
  1251. +CONFIG_EEPROM_AT24=y
  1252. +CONFIG_LPD_EEPROM=m
  1253. +CONFIG_SENSORS_LIS3_I2C=m
  1254. +CONFIG_BLK_DEV_SD=y
  1255. +CONFIG_SCSI_SCAN_ASYNC=y
  1256. +CONFIG_ATA=y
  1257. +CONFIG_SATA_AHCI_PLATFORM=y
  1258. +CONFIG_NETDEVICES=y
  1259. +# CONFIG_NET_VENDOR_ARC is not set
  1260. +# CONFIG_NET_CADENCE is not set
  1261. +# CONFIG_NET_VENDOR_BROADCOM is not set
  1262. +# CONFIG_NET_VENDOR_CIRRUS is not set
  1263. +CONFIG_DM9000=y
  1264. +# CONFIG_NET_VENDOR_FARADAY is not set
  1265. +# CONFIG_NET_VENDOR_HISILICON is not set
  1266. +# CONFIG_NET_VENDOR_INTEL is not set
  1267. +# CONFIG_NET_VENDOR_MARVELL is not set
  1268. +CONFIG_KS8851=y
  1269. +CONFIG_KS8851_MLL=y
  1270. +# CONFIG_NET_VENDOR_MICROCHIP is not set
  1271. +# CONFIG_NET_VENDOR_NATSEMI is not set
  1272. +# CONFIG_NET_VENDOR_QUALCOMM is not set
  1273. +# CONFIG_NET_VENDOR_SAMSUNG is not set
  1274. +# CONFIG_NET_VENDOR_SEEQ is not set
  1275. +CONFIG_SMC91X=y
  1276. +CONFIG_SMSC911X=y
  1277. +# CONFIG_NET_VENDOR_STMICRO is not set
  1278. +CONFIG_TI_DAVINCI_EMAC=y
  1279. +CONFIG_TI_CPSW=y
  1280. +CONFIG_TI_CPTS=y
  1281. +# CONFIG_NET_VENDOR_VIA is not set
  1282. +# CONFIG_NET_VENDOR_WIZNET is not set
  1283. +CONFIG_AT803X_PHY=y
  1284. +CONFIG_SMSC_PHY=y
  1285. +CONFIG_USB_USBNET=m
  1286. +CONFIG_USB_NET_SMSC95XX=m
  1287. +CONFIG_USB_ALI_M5632=y
  1288. +CONFIG_USB_AN2720=y
  1289. +CONFIG_USB_EPSON2888=y
  1290. +CONFIG_USB_KC2190=y
  1291. +CONFIG_USB_CDC_PHONET=m
  1292. +CONFIG_LIBERTAS=m
  1293. +CONFIG_LIBERTAS_USB=m
  1294. +CONFIG_LIBERTAS_SDIO=m
  1295. +CONFIG_LIBERTAS_DEBUG=y
  1296. +CONFIG_WL_TI=y
  1297. +CONFIG_WL12XX=m
  1298. +CONFIG_WL18XX=m
  1299. +CONFIG_WLCORE_SPI=m
  1300. +CONFIG_WLCORE_SDIO=m
  1301. +CONFIG_MWIFIEX=m
  1302. +CONFIG_MWIFIEX_SDIO=m
  1303. +CONFIG_MWIFIEX_USB=m
  1304. +CONFIG_INPUT_JOYDEV=m
  1305. +CONFIG_INPUT_EVDEV=m
  1306. +CONFIG_KEYBOARD_ATKBD=m
  1307. +CONFIG_KEYBOARD_GPIO=m
  1308. +CONFIG_KEYBOARD_MATRIX=m
  1309. +# CONFIG_INPUT_MOUSE is not set
  1310. +CONFIG_INPUT_TOUCHSCREEN=y
  1311. +CONFIG_TOUCHSCREEN_ADS7846=m
  1312. +CONFIG_TOUCHSCREEN_EDT_FT5X06=m
  1313. +CONFIG_TOUCHSCREEN_TI_AM335X_TSC=m
  1314. +CONFIG_TOUCHSCREEN_PIXCIR=m
  1315. +CONFIG_TOUCHSCREEN_TSC2004=m
  1316. +CONFIG_TOUCHSCREEN_TSC2005=m
  1317. +CONFIG_TOUCHSCREEN_TSC2007=m
  1318. +CONFIG_INPUT_MISC=y
  1319. +CONFIG_INPUT_TPS65218_PWRBUTTON=m
  1320. +CONFIG_INPUT_TWL4030_PWRBUTTON=m
  1321. +CONFIG_INPUT_PALMAS_PWRBUTTON=m
  1322. +CONFIG_SERIO=m
  1323. +# CONFIG_LEGACY_PTYS is not set
  1324. +CONFIG_SERIAL_8250=y
  1325. +CONFIG_SERIAL_8250_CONSOLE=y
  1326. +CONFIG_SERIAL_8250_NR_UARTS=32
  1327. +CONFIG_SERIAL_8250_EXTENDED=y
  1328. +CONFIG_SERIAL_8250_MANY_PORTS=y
  1329. +CONFIG_SERIAL_8250_SHARE_IRQ=y
  1330. +CONFIG_SERIAL_8250_DETECT_IRQ=y
  1331. +CONFIG_SERIAL_8250_RSA=y
  1332. +CONFIG_SERIAL_OF_PLATFORM=y
  1333. +CONFIG_SERIAL_OMAP=y
  1334. +CONFIG_SERIAL_OMAP_CONSOLE=y
  1335. +CONFIG_I2C_CHARDEV=y
  1336. +CONFIG_SPI=y
  1337. +CONFIG_SPI_OMAP24XX=y
  1338. +CONFIG_SPI_TI_QSPI=m
  1339. +CONFIG_PINCTRL_SINGLE=y
  1340. +CONFIG_GPIO_SYSFS=y
  1341. +CONFIG_GPIO_PCA953X=m
  1342. +CONFIG_GPIO_PCF857X=y
  1343. +CONFIG_GPIO_PALMAS=y
  1344. +CONFIG_GPIO_TWL4030=y
  1345. +CONFIG_W1=m
  1346. +CONFIG_HDQ_MASTER_OMAP=m
  1347. +CONFIG_W1_SLAVE_BQ27000=m
  1348. +CONFIG_PDA_POWER=m
  1349. +CONFIG_BATTERY_BQ27XXX=m
  1350. +CONFIG_CHARGER_ISP1704=m
  1351. +CONFIG_CHARGER_TWL4030=m
  1352. +CONFIG_CHARGER_BQ2415X=m
  1353. +CONFIG_CHARGER_BQ24190=m
  1354. +CONFIG_CHARGER_BQ24735=m
  1355. +CONFIG_POWER_RESET=y
  1356. +CONFIG_POWER_AVS=y
  1357. +CONFIG_HWMON=m
  1358. +CONFIG_SENSORS_GPIO_FAN=m
  1359. +CONFIG_SENSORS_LM75=m
  1360. +CONFIG_SENSORS_TMP102=m
  1361. +CONFIG_THERMAL=m
  1362. +CONFIG_THERMAL_GOV_FAIR_SHARE=y
  1363. +CONFIG_THERMAL_GOV_USER_SPACE=y
  1364. +CONFIG_CPU_THERMAL=y
  1365. +CONFIG_TI_SOC_THERMAL=m
  1366. +CONFIG_TI_THERMAL=y
  1367. +CONFIG_WATCHDOG=y
  1368. +CONFIG_OMAP_WATCHDOG=m
  1369. +CONFIG_TWL4030_WATCHDOG=m
  1370. +CONFIG_MFD_TI_AM335X_TSCADC=m
  1371. +CONFIG_MFD_PALMAS=y
  1372. +CONFIG_MFD_TPS65217=y
  1373. +CONFIG_MFD_TPS65218=y
  1374. +CONFIG_MFD_TPS65910=y
  1375. +CONFIG_TWL6040_CORE=y
  1376. +CONFIG_REGULATOR_PALMAS=y
  1377. +CONFIG_REGULATOR_PBIAS=y
  1378. +CONFIG_REGULATOR_TI_ABB=y
  1379. +CONFIG_REGULATOR_TPS62360=m
  1380. +CONFIG_REGULATOR_TPS65023=y
  1381. +CONFIG_REGULATOR_TPS6507X=y
  1382. +CONFIG_REGULATOR_TPS65217=y
  1383. +CONFIG_REGULATOR_TPS65218=y
  1384. +CONFIG_REGULATOR_TPS65910=y
  1385. +CONFIG_REGULATOR_TWL4030=y
  1386. +CONFIG_FB=y
  1387. +CONFIG_FIRMWARE_EDID=y
  1388. +CONFIG_FB_MODE_HELPERS=y
  1389. +CONFIG_FB_TILEBLITTING=y
  1390. +CONFIG_OMAP2_DSS=y
  1391. +CONFIG_OMAP2_DSS_SDI=y
  1392. +CONFIG_OMAP2_DSS_DSI=y
  1393. +CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=4
  1394. +CONFIG_FB_OMAP2=y
  1395. +CONFIG_DISPLAY_ENCODER_TFP410=m
  1396. +CONFIG_DISPLAY_ENCODER_TPD12S015=m
  1397. +CONFIG_DISPLAY_CONNECTOR_DVI=m
  1398. +CONFIG_DISPLAY_CONNECTOR_HDMI=m
  1399. +CONFIG_DISPLAY_CONNECTOR_ANALOG_TV=m
  1400. +CONFIG_DISPLAY_PANEL_DPI=y
  1401. +CONFIG_DISPLAY_PANEL_DSI_CM=m
  1402. +CONFIG_DISPLAY_PANEL_SONY_ACX565AKM=m
  1403. +CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02=m
  1404. +CONFIG_DISPLAY_PANEL_SHARP_LS037V7DW01=m
  1405. +CONFIG_DISPLAY_PANEL_TPO_TD028TTEC1=m
  1406. +CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1=m
  1407. +CONFIG_DISPLAY_PANEL_NEC_NL8048HL11=m
  1408. +CONFIG_BACKLIGHT_LCD_SUPPORT=y
  1409. +CONFIG_LCD_CLASS_DEVICE=y
  1410. +CONFIG_LCD_PLATFORM=y
  1411. +CONFIG_BACKLIGHT_CLASS_DEVICE=y
  1412. +CONFIG_BACKLIGHT_GENERIC=m
  1413. +CONFIG_BACKLIGHT_PWM=m
  1414. +CONFIG_BACKLIGHT_PANDORA=m
  1415. +CONFIG_BACKLIGHT_GPIO=m
  1416. +CONFIG_FRAMEBUFFER_CONSOLE=y
  1417. +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
  1418. +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
  1419. +CONFIG_LOGO=y
  1420. +CONFIG_SOUND=m
  1421. +CONFIG_SND=m
  1422. +CONFIG_SND_MIXER_OSS=m
  1423. +CONFIG_SND_PCM_OSS=m
  1424. +CONFIG_SND_VERBOSE_PRINTK=y
  1425. +CONFIG_SND_DEBUG=y
  1426. +CONFIG_SND_USB_AUDIO=m
  1427. +CONFIG_SND_SOC=m
  1428. +CONFIG_SND_DAVINCI_SOC_MCASP=m
  1429. +CONFIG_SND_OMAP_SOC=m
  1430. +CONFIG_SND_OMAP_SOC_OMAP_TWL4030=m
  1431. +CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=m
  1432. +CONFIG_SND_SOC_TLV320AIC3X=m
  1433. +CONFIG_SND_SIMPLE_CARD=m
  1434. +CONFIG_HID_GENERIC=m
  1435. +# CONFIG_HID_A4TECH is not set
  1436. +# CONFIG_HID_APPLE is not set
  1437. +# CONFIG_HID_BELKIN is not set
  1438. +# CONFIG_HID_CHERRY is not set
  1439. +# CONFIG_HID_CHICONY is not set
  1440. +# CONFIG_HID_CYPRESS is not set
  1441. +# CONFIG_HID_EZKEY is not set
  1442. +# CONFIG_HID_KENSINGTON is not set
  1443. +# CONFIG_HID_LOGITECH is not set
  1444. +# CONFIG_HID_MICROSOFT is not set
  1445. +# CONFIG_HID_MONTEREY is not set
  1446. +CONFIG_USB_HIDDEV=y
  1447. +CONFIG_USB=y
  1448. +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
  1449. +CONFIG_USB_MON=m
  1450. +CONFIG_USB_EHCI_HCD=y
  1451. +CONFIG_USB_OHCI_HCD=m
  1452. +CONFIG_USB_WDM=m
  1453. +CONFIG_USB_STORAGE=m
  1454. +CONFIG_USB_MUSB_HDRC=y
  1455. +CONFIG_USB_MUSB_OMAP2PLUS=y
  1456. +CONFIG_USB_MUSB_AM35X=m
  1457. +CONFIG_USB_MUSB_DSPS=m
  1458. +CONFIG_USB_INVENTRA_DMA=y
  1459. +CONFIG_USB_TI_CPPI41_DMA=y
  1460. +CONFIG_USB_DWC3=m
  1461. +CONFIG_USB_TEST=m
  1462. +CONFIG_AM335X_PHY_USB=y
  1463. +CONFIG_USB_GADGET=y
  1464. +CONFIG_USB_GADGET_DEBUG_FILES=y
  1465. +CONFIG_USB_GADGET_DEBUG_FS=y
  1466. +CONFIG_USB_CONFIGFS=m
  1467. +CONFIG_USB_CONFIGFS_SERIAL=y
  1468. +CONFIG_USB_CONFIGFS_ACM=y
  1469. +CONFIG_USB_CONFIGFS_OBEX=y
  1470. +CONFIG_USB_CONFIGFS_NCM=y
  1471. +CONFIG_USB_CONFIGFS_ECM=y
  1472. +CONFIG_USB_CONFIGFS_ECM_SUBSET=y
  1473. +CONFIG_USB_CONFIGFS_RNDIS=y
  1474. +CONFIG_USB_CONFIGFS_EEM=y
  1475. +CONFIG_USB_CONFIGFS_PHONET=y
  1476. +CONFIG_USB_CONFIGFS_MASS_STORAGE=y
  1477. +CONFIG_USB_CONFIGFS_F_LB_SS=y
  1478. +CONFIG_USB_CONFIGFS_F_FS=y
  1479. +CONFIG_USB_CONFIGFS_F_UAC1=y
  1480. +CONFIG_USB_CONFIGFS_F_UAC2=y
  1481. +CONFIG_USB_CONFIGFS_F_MIDI=y
  1482. +CONFIG_USB_CONFIGFS_F_HID=y
  1483. +CONFIG_USB_ZERO=m
  1484. +CONFIG_USB_ETH=m
  1485. +CONFIG_USB_MASS_STORAGE=m
  1486. +CONFIG_USB_G_NOKIA=m
  1487. +CONFIG_MMC=y
  1488. +CONFIG_SDIO_UART=y
  1489. +CONFIG_MMC_OMAP=y
  1490. +CONFIG_MMC_OMAP_HS=y
  1491. +CONFIG_NEW_LEDS=y
  1492. +CONFIG_LEDS_CLASS=m
  1493. +CONFIG_LEDS_GPIO=m
  1494. +CONFIG_LEDS_PWM=m
  1495. +CONFIG_LEDS_TRIGGERS=y
  1496. +CONFIG_LEDS_TRIGGER_TIMER=m
  1497. +CONFIG_LEDS_TRIGGER_ONESHOT=m
  1498. +CONFIG_LEDS_TRIGGER_HEARTBEAT=m
  1499. +CONFIG_LEDS_TRIGGER_BACKLIGHT=m
  1500. +CONFIG_LEDS_TRIGGER_CPU=y
  1501. +CONFIG_LEDS_TRIGGER_GPIO=m
  1502. +CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
  1503. +CONFIG_RTC_CLASS=y
  1504. +CONFIG_RTC_DRV_DS1307=m
  1505. +CONFIG_RTC_DRV_PALMAS=m
  1506. +CONFIG_RTC_DRV_TWL92330=y
  1507. +CONFIG_RTC_DRV_TWL4030=y
  1508. +CONFIG_RTC_DRV_OMAP=m
  1509. +CONFIG_DMADEVICES=y
  1510. +CONFIG_DMA_OMAP=y
  1511. +CONFIG_TI_EDMA=y
  1512. +# CONFIG_IOMMU_SUPPORT is not set
  1513. +CONFIG_EXTCON=m
  1514. +CONFIG_EXTCON_PALMAS=m
  1515. +CONFIG_EXTCON_USB_GPIO=m
  1516. +CONFIG_TI_EMIF=m
  1517. +CONFIG_OMAP_GPMC_DEBUG=y
  1518. +CONFIG_IIO=m
  1519. +CONFIG_TI_AM335X_ADC=m
  1520. +CONFIG_PWM=y
  1521. +CONFIG_PWM_OMAP_DMTIMER=m
  1522. +CONFIG_PWM_TIECAP=m
  1523. +CONFIG_PWM_TIEHRPWM=m
  1524. +CONFIG_PWM_TWL=m
  1525. +CONFIG_PWM_TWL_LED=m
  1526. +CONFIG_PHY_DM816X_USB=m
  1527. +CONFIG_OMAP_USB2=m
  1528. +CONFIG_TI_PIPE3=y
  1529. +CONFIG_TWL4030_USB=y
  1530. +CONFIG_EXT2_FS=y
  1531. +CONFIG_EXT3_FS=y
  1532. +CONFIG_FANOTIFY=y
  1533. +CONFIG_QUOTA=y
  1534. +CONFIG_QFMT_V2=y
  1535. +CONFIG_AUTOFS4_FS=m
  1536. +CONFIG_MSDOS_FS=y
  1537. +CONFIG_VFAT_FS=y
  1538. +CONFIG_TMPFS=y
  1539. +CONFIG_TMPFS_POSIX_ACL=y
  1540. +CONFIG_CONFIGFS_FS=y
  1541. +CONFIG_JFFS2_FS=y
  1542. +CONFIG_JFFS2_SUMMARY=y
  1543. +CONFIG_JFFS2_FS_XATTR=y
  1544. +CONFIG_JFFS2_COMPRESSION_OPTIONS=y
  1545. +CONFIG_JFFS2_LZO=y
  1546. +CONFIG_JFFS2_RUBIN=y
  1547. +CONFIG_UBIFS_FS=y
  1548. +CONFIG_CRAMFS=y
  1549. +CONFIG_NFS_FS=y
  1550. +CONFIG_NFS_V3_ACL=y
  1551. +CONFIG_NFS_V4=y
  1552. +CONFIG_ROOT_NFS=y
  1553. +CONFIG_NLS_CODEPAGE_437=y
  1554. +CONFIG_NLS_ISO8859_1=y
  1555. +CONFIG_PRINTK_TIME=y
  1556. +CONFIG_MAGIC_SYSRQ=y
  1557. +CONFIG_FTRACE=y
  1558. +CONFIG_SECURITY=y
  1559. +CONFIG_CRYPTO_MICHAEL_MIC=y
  1560. +CONFIG_CRC_CCITT=y
  1561. +CONFIG_CRC_T10DIF=y
  1562. +CONFIG_CRC_ITU_T=y
  1563. +CONFIG_CRC7=y
  1564. +CONFIG_LIBCRC32C=y
  1565. +CONFIG_FONTS=y
  1566. +CONFIG_FONT_8x8=y
  1567. +CONFIG_FONT_8x16=y
  1568. diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
  1569. index 5814477..2a91e7f 100644
  1570. --- a/arch/arm/mach-omap2/pdata-quirks.c
  1571. +++ b/arch/arm/mach-omap2/pdata-quirks.c
  1572. @@ -23,6 +23,8 @@
  1573. #include <linux/platform_data/pinctrl-single.h>
  1574. #include <linux/platform_data/iommu-omap.h>
  1575. #include <linux/platform_data/wkup_m3.h>
  1576. +#include <linux/platform_data/pwm_omap_dmtimer.h>
  1577. +#include <plat/dmtimer.h>
  1578.  
  1579. #include "common.h"
  1580. #include "common-board-devices.h"
  1581. @@ -33,6 +35,14 @@
  1582. #include "soc.h"
  1583. #include "hsmmc.h"
  1584.  
  1585. +#if defined (CONFIG_USB_C67X00_HCD) || defined (CONFIG_USB_C67X00_HCD_MODULE)
  1586. +#include <linux/usb/c67x00.h>
  1587. +#include <linux/omap-gpmc.h>
  1588. +#include "mux.h"
  1589. +#include "mux34xx.h"
  1590. +#endif
  1591. +
  1592. +
  1593. struct pdata_init {
  1594. const char *compatible;
  1595. void (*fn)(void);
  1596. @@ -271,6 +281,15 @@ static void __init nokia_n900_legacy_init(void)
  1597. }
  1598. }
  1599.  
  1600. +/* add support for older drivers for som-lv board */
  1601. +
  1602. +
  1603. +
  1604. +static void __init omap3_som_lv_init(void)
  1605. +{
  1606. + omap3_gpio126_127_129();
  1607. +}
  1608. +
  1609. static void __init omap3_tao3530_legacy_init(void)
  1610. {
  1611. hsmmc2_internal_input_clk();
  1612. @@ -427,6 +446,24 @@ void omap_auxdata_legacy_init(struct device *dev)
  1613. dev->platform_data = &twl_gpio_auxdata;
  1614. }
  1615.  
  1616. +/* Dual mode timer PWM callbacks platdata */
  1617. +#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
  1618. +struct pwm_omap_dmtimer_pdata pwm_dmtimer_pdata = {
  1619. + .request_by_node = omap_dm_timer_request_by_node,
  1620. + .free = omap_dm_timer_free,
  1621. + .enable = omap_dm_timer_enable,
  1622. + .disable = omap_dm_timer_disable,
  1623. + .get_fclk = omap_dm_timer_get_fclk,
  1624. + .start = omap_dm_timer_start,
  1625. + .stop = omap_dm_timer_stop,
  1626. + .set_load = omap_dm_timer_set_load,
  1627. + .set_match = omap_dm_timer_set_match,
  1628. + .set_pwm = omap_dm_timer_set_pwm,
  1629. + .set_prescaler = omap_dm_timer_set_prescaler,
  1630. + .write_counter = omap_dm_timer_write_counter,
  1631. +};
  1632. +#endif
  1633. +
  1634. /*
  1635. * Few boards still need auxdata populated before we populate
  1636. * the dev entries in of_platform_populate().
  1637. @@ -480,6 +517,9 @@ static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
  1638. OF_DEV_AUXDATA("ti,am4372-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
  1639. &wkup_m3_data),
  1640. #endif
  1641. +#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
  1642. + OF_DEV_AUXDATA("ti,omap-dmtimer-pwm", 0, NULL, &pwm_dmtimer_pdata),
  1643. +#endif
  1644. #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
  1645. OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu",
  1646. &omap4_iommu_pdata),
  1647. @@ -504,6 +544,7 @@ static struct pdata_init pdata_quirks[] __initdata = {
  1648. { "isee,omap3-igep0020-rev-f", omap3_igep0020_rev_f_legacy_init, },
  1649. { "isee,omap3-igep0030-rev-g", omap3_igep0030_rev_g_legacy_init, },
  1650. { "logicpd,dm3730-torpedo-devkit", omap3_gpio126_127_129, },
  1651. + { "logicpd,dm3730-som-lv-devkit", omap3_som_lv_init, },
  1652. { "ti,omap3-evm-37xx", omap3_evm_legacy_init, },
  1653. { "ti,am3517-evm", am3517_evm_legacy_init, },
  1654. { "technexion,omap3-tao3530", omap3_tao3530_legacy_init, },
  1655. diff --git a/drivers/misc/eeprom/Kconfig b/drivers/misc/eeprom/Kconfig
  1656. index 04f2e1f..2cb0f9a 100644
  1657. --- a/drivers/misc/eeprom/Kconfig
  1658. +++ b/drivers/misc/eeprom/Kconfig
  1659. @@ -27,6 +27,15 @@ config EEPROM_AT24
  1660. This driver can also be built as a module. If so, the module
  1661. will be called at24.
  1662.  
  1663. +config LPD_EEPROM
  1664. + tristate "Logic PD MFG EEPROM"
  1665. + depends on EEPROM_AT24
  1666. + help
  1667. + Enable this driver to extract MFG EEPROM information like:
  1668. + dr_timings part_number version_code
  1669. + lan_macaddr serial_number wifi_config_data
  1670. + model_name speed_mhz wifi_macaddr
  1671. +
  1672. config EEPROM_AT25
  1673. tristate "SPI EEPROMs from most vendors"
  1674. depends on SPI && SYSFS
  1675. diff --git a/drivers/misc/eeprom/Makefile b/drivers/misc/eeprom/Makefile
  1676. index fc1e81d..d5908bd6 100644
  1677. --- a/drivers/misc/eeprom/Makefile
  1678. +++ b/drivers/misc/eeprom/Makefile
  1679. @@ -1,4 +1,5 @@
  1680. obj-$(CONFIG_EEPROM_AT24) += at24.o
  1681. +obj-$(CONFIG_LPD_EEPROM) += logicpd-new-productid.o
  1682. obj-$(CONFIG_EEPROM_AT25) += at25.o
  1683. obj-$(CONFIG_EEPROM_LEGACY) += eeprom.o
  1684. obj-$(CONFIG_EEPROM_MAX6875) += max6875.o
  1685. diff --git a/drivers/misc/eeprom/logicpd-new-productid.c b/drivers/misc/eeprom/logicpd-new-productid.c
  1686. new file mode 100644
  1687. index 0000000..4f14c59
  1688. --- /dev/null
  1689. +++ b/drivers/misc/eeprom/logicpd-new-productid.c
  1690. @@ -0,0 +1,1482 @@
  1691. +/*
  1692. + * logicpd-new-product-id
  1693. + *
  1694. + * Copyright (C) 2017 Logic Product Development, Inc.
  1695. + * Adam Ford <adam.ford@logicpd.com>
  1696. + *
  1697. + * This program is free software; you can redistribute it and/or modify
  1698. + * it under the terms of the GNU General Public License version 2 as
  1699. + * published by the Free Software Foundation.
  1700. + */
  1701. +
  1702. +#include <linux/init.h>
  1703. +#include <linux/module.h>
  1704. +#include <linux/device.h>
  1705. +#include <linux/syscalls.h>
  1706. +#include <linux/fcntl.h>
  1707. +#include <linux/fs.h>
  1708. +#include <linux/slab.h>
  1709. +#include <asm/uaccess.h> // Needed by segment descriptors
  1710. +
  1711. +//#define EEPROM_PATH "/home/aford/src/lpd_id_module/dm37torp.hex"
  1712. +#define EEPROM_PATH "/sys/devices/platform/68000000.ocp/48060000.i2c/i2c-2/2-0050/eeprom"
  1713. +//#define EEPROM_PATH "/sys/devices/soc0/soc/2100000.aips-bus/21a8000.i2c/i2c-2/2-0051/eeprom"
  1714. +
  1715. +//FIXME: Make this a character pointer and malloc the memory in the kernel driver
  1716. +unsigned char id_data_buf[1024];
  1717. +
  1718. +
  1719. +// This is for debugging purposes only. Set to zero to deactivate.
  1720. +#define SPOOF_VERSION_CODE 0
  1721. +
  1722. +#ifdef DEBUG
  1723. +#define DPRINTF(fmt, args...) printk(KERN_DBG fmt, ## args)
  1724. +#else
  1725. +#define DPRINTF(fmt, ...)
  1726. +#endif
  1727. +
  1728. +#undef ID_KEY_STRINGS
  1729. +#define ID_KEY_ENUMS
  1730. +
  1731. +#undef ID_KEY_START
  1732. +#undef ID_KEY_ENTRY
  1733. +#undef ID_KEY_END
  1734. +
  1735. +#if defined(ID_KEY_STRINGS)
  1736. +/* This is the usage to build the keys for the compiler; we define
  1737. + * an array of strings whose index is the value */
  1738. +#define ID_KEY_START static char *id_keys[] = {
  1739. +#define ID_KEY_ENTRY(XX) #XX ,
  1740. +#define ID_KEY_END };
  1741. +#elif defined(ID_KEY_ENUMS)
  1742. +/* This is the usage by people using the library to access the data */
  1743. +#define ID_KEY_START typedef enum {
  1744. +#define ID_KEY_ENTRY(XX) ID_KEY_ ## XX,
  1745. +#define ID_KEY_END } id_keys_t;
  1746. +#else
  1747. +#error "Need either ID_KEY_INTERFACE or ID_KEY_COMPILER defined!"
  1748. +#endif
  1749. +
  1750. +/* There are some implied conventions here: */
  1751. +/* - names of keys that contain other keys (dictionaries) end in "_group" */
  1752. +/* - names of keys that provide a register setting end in "_reg" */
  1753. +/* - any keys that specify a unit of measure, include units in the name (ie. _mhz, _degf, _bytes) */
  1754. +
  1755. +ID_KEY_START
  1756. +
  1757. +/* Manufacturing unique data for each SOM */
  1758. +ID_KEY_ENTRY(serialization_group)
  1759. +ID_KEY_ENTRY(serial_number)
  1760. +ID_KEY_ENTRY(wifi_ethaddr1)
  1761. +ID_KEY_ENTRY(wifi_ethaddr2)
  1762. +ID_KEY_ENTRY(wifi_ethaddr3)
  1763. +ID_KEY_ENTRY(wifi_ethaddr4)
  1764. +ID_KEY_ENTRY(nvs)
  1765. +
  1766. +/* BOM Model number infromation */
  1767. +ID_KEY_ENTRY(model_group)
  1768. +ID_KEY_ENTRY(model_name)
  1769. +ID_KEY_ENTRY(part_number)
  1770. +ID_KEY_ENTRY(version_code)
  1771. +ID_KEY_ENTRY(hardware_platform)
  1772. +
  1773. +/* CPU specific information */
  1774. +ID_KEY_ENTRY(cpu0_group)
  1775. +ID_KEY_ENTRY(type)
  1776. +ID_KEY_ENTRY(number)
  1777. +ID_KEY_ENTRY(speed_mhz)
  1778. +ID_KEY_ENTRY(temp_class)
  1779. +
  1780. +/* CPU bus information */
  1781. +ID_KEY_ENTRY(cpu0_bus_group)
  1782. +
  1783. +/* DRAM bus information */
  1784. +ID_KEY_ENTRY(dram_bus_group)
  1785. +ID_KEY_ENTRY(sysconfig_reg)
  1786. +ID_KEY_ENTRY(sharing_reg)
  1787. +ID_KEY_ENTRY(dlla_ctrl_reg)
  1788. +ID_KEY_ENTRY(cs_cfg_reg)
  1789. +// ID_KEY_ENTRY(cs0_group) Used in the dram_bus_group, but key defined below after local_bus_group
  1790. +// ID_KEY_ENTRY(cs1_group) Used in the dram_bus_group, but key defined below after local_bus_group
  1791. +ID_KEY_ENTRY(mcfg_reg)
  1792. +ID_KEY_ENTRY(mr_reg)
  1793. +ID_KEY_ENTRY(rfr_ctrl_reg)
  1794. +ID_KEY_ENTRY(emr2_reg)
  1795. +ID_KEY_ENTRY(actim_ctrla_reg)
  1796. +ID_KEY_ENTRY(actim_ctrlb_reg)
  1797. +ID_KEY_ENTRY(power_reg)
  1798. +
  1799. +/* GPMC keys */
  1800. +ID_KEY_ENTRY(local_bus_group)
  1801. +ID_KEY_ENTRY(cs0_group)
  1802. +ID_KEY_ENTRY(cs1_group)
  1803. +ID_KEY_ENTRY(cs2_group)
  1804. +ID_KEY_ENTRY(cs3_group)
  1805. +ID_KEY_ENTRY(cs4_group)
  1806. +ID_KEY_ENTRY(cs5_group)
  1807. +ID_KEY_ENTRY(cs6_group)
  1808. +ID_KEY_ENTRY(config1_reg)
  1809. +ID_KEY_ENTRY(config2_reg)
  1810. +ID_KEY_ENTRY(config3_reg)
  1811. +ID_KEY_ENTRY(config4_reg)
  1812. +ID_KEY_ENTRY(config5_reg)
  1813. +ID_KEY_ENTRY(config6_reg)
  1814. +ID_KEY_ENTRY(config7_reg)
  1815. +
  1816. +/* Manufacturing unique data for each SOM */
  1817. +ID_KEY_ENTRY(lan_ethaddr1)
  1818. +ID_KEY_ENTRY(lan_ethaddr2)
  1819. +ID_KEY_ENTRY(lan_ethaddr3)
  1820. +ID_KEY_ENTRY(lan_ethaddr4)
  1821. +
  1822. +/* End of keys */
  1823. +ID_KEY_END
  1824. +
  1825. +typedef enum {
  1826. + /* Number */
  1827. + IDENUM_NEG_NUM = 0,
  1828. + IDENUM_POS_NUM,
  1829. +
  1830. + /* String/Hex String */
  1831. + IDENUM_STR,
  1832. + IDENUM_HEXSTR,
  1833. +
  1834. + /* Array */
  1835. + IDENUM_ARRAY,
  1836. +
  1837. + /* Dictionary */
  1838. + IDENUM_DICT,
  1839. +
  1840. + /* Key */
  1841. + IDENUM_KEY,
  1842. +
  1843. + /* Any string */
  1844. + IDENUM_ANY_STRING,
  1845. +
  1846. + /* Any number */
  1847. + IDENUM_ANY_NUMBER,
  1848. +
  1849. +} idenum_t;
  1850. +
  1851. +/* structure of builtin keys */
  1852. +struct id_key {
  1853. + unsigned char *ptr;
  1854. + unsigned int size;
  1855. +};
  1856. +
  1857. +#define ID_EOK 0 /* Okay */
  1858. +#define ID_ENOENT 2 /* No such key */
  1859. +#define ID_ENOMEM 12 /* Out of memory */
  1860. +#define ID_EACCES 13 /* Permission denied */
  1861. +#define ID_ENODEV 19 /* No such device */
  1862. +#define ID_EINVAL 22 /* Invalid arcument */
  1863. +#define ID_EDOM 33 /* argument out of domain of func */
  1864. +#define ID_ERANGE 34 /* Out of range */
  1865. +#define ID_EL2NSYNC 45 /* Level 2 not synchronized */
  1866. +#define ID_ENOMEDIUM 123 /* No medium found */
  1867. +
  1868. +static int valid_product_id_lan_ethaddr; // !0 if LAN ethaddr is good
  1869. +static int valid_product_id_wifi_ethaddr; // !0 if LAN ethaddr is good
  1870. +static int valid_product_id_has_wifi_config_data; // !0 if has Murata
  1871. +static int valid_product_id_ddr_timings; // !0 if has ddr_timings
  1872. +
  1873. +/*
  1874. + * return a byte from the ID data at offset 'offset' and set *oor to zero
  1875. + * if offset is in range of the device. If offset is out of range then
  1876. + * set *oor to non-zero
  1877. + */
  1878. +
  1879. +static unsigned char id_fetch_byte(int offset, int *oor)
  1880. +{
  1881. + unsigned char *p = (unsigned char *)&id_data_buf;
  1882. + if (offset < (32<<10)) {
  1883. + *oor = ID_EOK;
  1884. + return p[offset];
  1885. + }
  1886. +
  1887. + *oor = -ID_ERANGE;
  1888. + return 0;
  1889. +}
  1890. +
  1891. +struct id_data {
  1892. + unsigned int root_size;
  1893. + unsigned int root_offset;
  1894. +};
  1895. +
  1896. +/* Function to do the intial startup (i.e. figure out how much data, offset of
  1897. + * key table, etc */
  1898. +static int id_startup(struct id_data *data);
  1899. +/*
  1900. + * Functions provided back to callers for use in accessing data
  1901. + */
  1902. +
  1903. +/* ID data "cookie" used to access data; ultimately this will be opaque
  1904. + * to the callers as they don't need to know whats in it, just pass it around
  1905. + */
  1906. +struct id_cookie {
  1907. + unsigned int start_offset; /* start offset from beginning of data */
  1908. + unsigned int size; /* size of data in bytes */
  1909. + unsigned int offset; /* current read offset */
  1910. +};
  1911. +
  1912. +/* Initialize the cookie to cover the whole root dictionary */
  1913. +static int id_init_cookie(struct id_data *data, struct id_cookie *cookie);
  1914. +
  1915. +/* What is the read pointer cookie is pointing at */
  1916. +static int id_whatis(struct id_cookie *cookie, idenum_t *type);
  1917. +
  1918. +/* User interface functions */
  1919. +
  1920. +static int id_dict_find_key(struct id_cookie *cookie, id_keys_t key);
  1921. +static int id_find_dict(struct id_cookie *cookie, id_keys_t key, idenum_t type);
  1922. +static int id_find_string(struct id_cookie *cookie, id_keys_t key, unsigned char *str_ptr, unsigned int *str_size);
  1923. +static int id_find_number(struct id_cookie *cookie, id_keys_t key, int *num);
  1924. +static int id_find_numbers(struct id_cookie *cookie, id_keys_t *key, int key_size, int *nums);
  1925. +
  1926. +/*
  1927. + * Extract an unsigned packed number, first byte is in 'pack_bits'
  1928. + * of first byte, starting at offset 'offset' */
  1929. +static unsigned int extract_unsigned_pnum(struct id_cookie *cookie, int pack_bits, int *err);
  1930. +static int extract_signed_pnum(struct id_cookie *cookie, int pack_bits, int *err);
  1931. +
  1932. +
  1933. +
  1934. +#define ID_MAX_KEY_SIZE 32
  1935. +
  1936. +static int id_extract_size(struct id_cookie *cookie, int *err);
  1937. +
  1938. +/* struct id_data id_data; */
  1939. +
  1940. +struct __attribute__ ((packed)) id_header {
  1941. + unsigned char signature[4];
  1942. + unsigned char id_fmt_ver;
  1943. + unsigned char unused0;
  1944. + unsigned short data_length;
  1945. +} id_header;
  1946. +
  1947. +struct __attribute__ ((packed)) id_checksums {
  1948. + unsigned short header;
  1949. + unsigned short data;
  1950. +} ;
  1951. +
  1952. +/*
  1953. + * Calculate a CRC-15 of a data buffer passed in
  1954. + */
  1955. +
  1956. +void crc_15_step(unsigned short *crc, unsigned char byte)
  1957. +{
  1958. + int i;
  1959. + unsigned short crcnext;
  1960. +
  1961. + for (i=0; i<7; ++i) {
  1962. + crcnext = (byte & 1) ^ (*crc>>14);
  1963. + *crc = (*crc << 1) & 0x7fff;
  1964. + if (crcnext)
  1965. + *crc ^= 0x4599;
  1966. + byte >>= 1;
  1967. + }
  1968. +}
  1969. +
  1970. +unsigned short crc_15(void *buf, int len)
  1971. +{
  1972. + unsigned char *p = buf;
  1973. + unsigned short xsum = 0;
  1974. + int i;
  1975. +
  1976. + for (i=0; i<len; ++i) {
  1977. + crc_15_step(&xsum, p[i]);
  1978. + }
  1979. + return xsum;
  1980. +}
  1981. +
  1982. +static int id_startup(struct id_data *data)
  1983. +{
  1984. + int i, err;
  1985. + struct id_cookie cookie;
  1986. + unsigned char byte, *p;
  1987. + char *header_tag= "LpId";
  1988. + unsigned short xsum;
  1989. + struct id_header hdr;
  1990. + struct id_checksums xsums;
  1991. +
  1992. + cookie.offset = 0;
  1993. +
  1994. + /* Data starts with the header, should be 'LpId' */
  1995. + for (i=0; i<4; ++i) {
  1996. + byte = id_fetch_byte(cookie.offset, &err);
  1997. + hdr.signature[i] = byte;
  1998. + cookie.offset++;
  1999. + if (err != ID_EOK) {
  2000. + printk(KERN_DEBUG "%s[%u]\n", __FILE__, __LINE__);
  2001. + goto err_ret;
  2002. + }
  2003. + if (hdr.signature[i] != header_tag[i]) {
  2004. + printk(KERN_DEBUG "%s[%u]\n", __FILE__, __LINE__);
  2005. + err = ID_ENODEV;
  2006. + goto err_ret;
  2007. + }
  2008. + }
  2009. +
  2010. + /* First LE 8-bit value is ID format version */
  2011. + hdr.id_fmt_ver = id_fetch_byte(cookie.offset++, &err);
  2012. +
  2013. + /* Second LE 8-bit value is currently not used */
  2014. + hdr.unused0 = id_fetch_byte(cookie.offset++, &err);
  2015. +
  2016. + /* Next LE 16-bit value is length of data */
  2017. + hdr.data_length = id_fetch_byte(cookie.offset++, &err);
  2018. + hdr.data_length |= (id_fetch_byte(cookie.offset++, &err) << 8);
  2019. +
  2020. + /* Next LE 16-bit value is xsum of header */
  2021. + xsums.header = id_fetch_byte(cookie.offset++, &err);
  2022. + xsums.header |= (id_fetch_byte(cookie.offset++, &err) << 8);
  2023. +
  2024. + /* Checksum the header */
  2025. + xsum = crc_15(&hdr, sizeof(hdr));
  2026. + p = (unsigned char *)&hdr;
  2027. + //for (i = 0; i < sizeof(hdr); ++i)
  2028. + // crc_15_step(&xsum, p[i]);
  2029. +
  2030. +
  2031. + if (xsum != xsums.header) {
  2032. + printk(KERN_DEBUG "%s[%u] xsum: 0x%04x, xsums.header: 0x%04x\n",
  2033. + __FILE__, __LINE__, xsum, xsums.header);
  2034. + err = -ID_EL2NSYNC;
  2035. + goto err_ret;
  2036. + }
  2037. +
  2038. + /* Next LE 16-bit value is xsum of data */
  2039. + xsums.data = id_fetch_byte(cookie.offset++, &err);
  2040. + xsums.data |= (id_fetch_byte(cookie.offset++, &err) << 8);
  2041. +
  2042. +
  2043. + /* Checksum the data (next id_len bytes), must match xsums.data */
  2044. + xsum = 0;
  2045. + for (i = 0; i < hdr.data_length; ++i) {
  2046. + byte = id_fetch_byte(cookie.offset + i, &err);
  2047. +
  2048. + if (err != ID_EOK) {
  2049. + printk(KERN_DEBUG "%s[%u]\n", __FILE__, __LINE__);
  2050. + goto err_ret;
  2051. + }
  2052. + crc_15_step(&xsum, byte);
  2053. + }
  2054. + if (xsum != xsums.data) {
  2055. + printk(KERN_DEBUG "%s[%u] xsum: 0x%04x, xsums.data: 0x%04x\n",
  2056. + __FILE__, __LINE__, xsum, xsums.data);
  2057. + err = -ID_EL2NSYNC;
  2058. + goto err_ret;
  2059. + }
  2060. +
  2061. + /* offset is now at the first byte of the root dictionary which
  2062. + contains its span */
  2063. + data->root_offset = cookie.offset;
  2064. + data->root_size = extract_unsigned_pnum(&cookie, 5, &err);
  2065. + if (err != ID_EOK) {
  2066. + printk(KERN_DEBUG "%s[%u]\n", __FILE__, __LINE__);
  2067. + goto err_ret;
  2068. + }
  2069. +
  2070. + data->root_size += cookie.offset - data->root_offset;
  2071. +
  2072. + return ID_EOK;
  2073. +
  2074. +err_ret:
  2075. + return err;
  2076. +}
  2077. +
  2078. +/*
  2079. + * Reset the cookie to cover the whole root dictionary
  2080. + */
  2081. +int id_init_cookie(struct id_data *data, struct id_cookie *cookie)
  2082. +{
  2083. + if (!cookie)
  2084. + return -ID_EINVAL;
  2085. + cookie->start_offset = data->root_offset;
  2086. + cookie->size = data->root_size;
  2087. + cookie->offset = cookie->start_offset;
  2088. + return ID_EOK;
  2089. +}
  2090. +
  2091. +unsigned int extract_unsigned_pnum(struct id_cookie *cookie, int start_bit, int *err)
  2092. +{
  2093. + unsigned int value=0;
  2094. + unsigned int bit_offset=0;
  2095. + unsigned char bits;
  2096. + unsigned char ch;
  2097. + int oor;
  2098. +
  2099. + *err = ID_EOK;
  2100. + for (;;) {
  2101. + ch = id_fetch_byte(cookie->offset++, &oor);
  2102. + if (oor != ID_EOK) {
  2103. + *err = oor;
  2104. + printk(KERN_ERR "extract runs oor");
  2105. + return 0;
  2106. + }
  2107. + if (ch & (1<<(start_bit-1))) {
  2108. + /* more to go, accumulate bits */
  2109. + bits = ch & ((1<<(start_bit - 1)) - 1);
  2110. + value |= (bits << bit_offset);
  2111. + bit_offset += start_bit-1;
  2112. + start_bit = 8;
  2113. + } else {
  2114. + /* last byte of number */
  2115. + bits = ch & ((1<<(start_bit - 1)) - 1);
  2116. + value |= (bits << bit_offset);
  2117. + break;
  2118. + }
  2119. + }
  2120. + return value;
  2121. +}
  2122. +
  2123. +int extract_signed_pnum(struct id_cookie *cookie, int start_bit, int *err)
  2124. +{
  2125. + int value=0;
  2126. + unsigned int bit_offset=0;
  2127. + unsigned char bits;
  2128. + unsigned char ch;
  2129. + int oor;
  2130. +
  2131. + *err = ID_EOK;
  2132. + for (;;) {
  2133. + ch = id_fetch_byte(cookie->offset++, &oor);
  2134. + if (oor != ID_EOK) {
  2135. + *err = oor;
  2136. + printk(KERN_ERR "extract runs oor");
  2137. + return 0;
  2138. + }
  2139. + if (ch & (1<<(start_bit-1))) {
  2140. + /* more to go, accumulate bits */
  2141. + bits = ch & ((1<<(start_bit - 1)) - 1);
  2142. + value |= (bits << bit_offset);
  2143. + bit_offset += start_bit-1;
  2144. + start_bit = 8;
  2145. + } else {
  2146. + /* last byte of number */
  2147. + bits = ch & ((1<<(start_bit - 2)) - 1);
  2148. + value |= (bits << bit_offset);
  2149. + if (ch & (1<<(start_bit - 2)))
  2150. + value = -value;
  2151. + break;
  2152. + }
  2153. + }
  2154. + return value;
  2155. +}
  2156. +
  2157. +int id_whatis(struct id_cookie *cookie, idenum_t *type)
  2158. +{
  2159. + unsigned char byte;
  2160. + int oor;
  2161. + if (!cookie)
  2162. + return -ID_EINVAL;
  2163. +
  2164. + byte = id_fetch_byte(cookie->offset, &oor);
  2165. + if (oor != ID_EOK)
  2166. + return -ID_ERANGE;
  2167. +
  2168. + byte >>= 5;
  2169. + *type = (idenum_t)byte;
  2170. +
  2171. + return ID_EOK;
  2172. +}
  2173. +
  2174. +int id_extract_size(struct id_cookie *cookie, int *err)
  2175. +{
  2176. + idenum_t type;
  2177. + struct id_cookie s_cookie;
  2178. + int size;
  2179. +
  2180. + s_cookie = *cookie;
  2181. +
  2182. + *err = id_whatis(&s_cookie, &type);
  2183. + if (*err != ID_EOK)
  2184. + return *err;
  2185. +
  2186. + switch(type) {
  2187. + case IDENUM_DICT:
  2188. + size = extract_unsigned_pnum(&s_cookie, 5, err);
  2189. + size += (s_cookie.offset - cookie->offset);
  2190. + break;
  2191. + case IDENUM_ARRAY:
  2192. + size = extract_unsigned_pnum(&s_cookie, 5, err);
  2193. + size += (s_cookie.offset - cookie->offset);
  2194. + break;
  2195. + case IDENUM_STR:
  2196. + case IDENUM_HEXSTR:
  2197. + size = extract_unsigned_pnum(&s_cookie, 5, err);
  2198. + size += (s_cookie.offset - cookie->offset);
  2199. + break;
  2200. + case IDENUM_POS_NUM:
  2201. + case IDENUM_NEG_NUM:
  2202. + extract_signed_pnum(&s_cookie, 5, err);
  2203. + size = (s_cookie.offset - cookie->offset);
  2204. + break;
  2205. + case IDENUM_KEY:
  2206. + extract_unsigned_pnum(&s_cookie, 5, err);
  2207. + size = (s_cookie.offset - cookie->offset);
  2208. + break;
  2209. + default:
  2210. + *err = -ID_EDOM;
  2211. + size = 0;
  2212. + break;
  2213. + }
  2214. + if (*err != ID_EOK)
  2215. + return *err;
  2216. +
  2217. + return size;
  2218. +}
  2219. +
  2220. +static int id_extract_key(struct id_cookie *cookie, id_keys_t *key)
  2221. +{
  2222. + int err;
  2223. + id_keys_t keyval;
  2224. +
  2225. + keyval = (id_keys_t)extract_unsigned_pnum(cookie, 5, &err);
  2226. + if (err != ID_EOK)
  2227. + return err;
  2228. + *key = keyval;
  2229. + return ID_EOK;
  2230. +}
  2231. +
  2232. +/* in dictionary that cookie points to find key "key"; if found
  2233. + * update cookie to associated "key" entry and return ID_EOK;
  2234. + * else return -ID_ENOENT */
  2235. +static int id_dict_find_key(struct id_cookie *cookie, id_keys_t key)
  2236. +{
  2237. + int err;
  2238. + unsigned int size;
  2239. + id_keys_t d_key;
  2240. + idenum_t type;
  2241. + struct id_cookie d_cookie = *cookie;
  2242. + struct id_cookie t_cookie;
  2243. +
  2244. + err = id_whatis(cookie, &type);
  2245. + if (err != ID_EOK)
  2246. + return err;
  2247. +
  2248. + /* Header has to be a dictionary */
  2249. + if (type != IDENUM_DICT)
  2250. + return -ID_EINVAL;
  2251. +
  2252. + /* Extract size of dictionary */
  2253. + size = extract_unsigned_pnum(&d_cookie, 5, &err);
  2254. + if (err != ID_EOK)
  2255. + return err;
  2256. +
  2257. + d_cookie.size = size;
  2258. + d_cookie.start_offset = d_cookie.offset;
  2259. +
  2260. + /* cookie->offset is now at first key */
  2261. + while (d_cookie.offset < d_cookie.start_offset + d_cookie.size) {
  2262. + /* Extract the key and move the cookie over key */
  2263. + err = id_extract_key(&d_cookie, &d_key);
  2264. + if (err != ID_EOK)
  2265. + return err;
  2266. + t_cookie = d_cookie;
  2267. + /* move forward over the value */
  2268. + size = id_extract_size(&d_cookie, &err);
  2269. + if (err != ID_EOK)
  2270. + return err;
  2271. + if (key == d_key) {
  2272. + d_cookie.size = size;
  2273. + d_cookie.start_offset = t_cookie.offset;
  2274. + d_cookie.offset = t_cookie.offset;
  2275. + *cookie = d_cookie;
  2276. + return ID_EOK;
  2277. + }
  2278. + d_cookie.offset += size;
  2279. + }
  2280. + return -ID_ENOENT;
  2281. +}
  2282. +
  2283. +/* Are these two types a match? */
  2284. +static int id_match_type(idenum_t type_a, idenum_t type_b)
  2285. +{
  2286. + idenum_t tmp;
  2287. +
  2288. + if (type_a == type_b)
  2289. + return 1;
  2290. +
  2291. + /* Oder the types (so the "*ANY*" types are in type_b) */
  2292. + if ((int)type_a > (int)type_b) {
  2293. + tmp = type_a;
  2294. + type_a = type_b;
  2295. + type_b = tmp;
  2296. + }
  2297. + if (type_b == IDENUM_ANY_STRING && (type_a == IDENUM_STR || type_a == IDENUM_HEXSTR))
  2298. + return 1;
  2299. +
  2300. + if (type_b == IDENUM_ANY_NUMBER && (type_a == IDENUM_NEG_NUM || type_a == IDENUM_POS_NUM))
  2301. + return 1;
  2302. +
  2303. + return 0;
  2304. +}
  2305. +
  2306. +/* Find in dictionary (that cookie points to) key "key" that is type "type" */
  2307. +static int id_find_dict(struct id_cookie *cookie, id_keys_t key, idenum_t type)
  2308. +{
  2309. + int err;
  2310. + struct id_cookie d_cookie = *cookie;
  2311. + idenum_t l_type;
  2312. +
  2313. + err = id_dict_find_key(&d_cookie, key);
  2314. + if (err != ID_EOK)
  2315. + return err;
  2316. + err = id_whatis(&d_cookie, &l_type);
  2317. + if (err != ID_EOK)
  2318. + return err;
  2319. + if (!id_match_type(l_type, type))
  2320. + return -ID_EINVAL;
  2321. + *cookie = d_cookie;
  2322. + return ID_EOK;
  2323. +}
  2324. +
  2325. +/* in dictionary pointed at by cookie, find the key "key"; verify its a
  2326. + * string and copy its value */
  2327. +static int id_find_string(struct id_cookie *cookie, id_keys_t key, unsigned char *str_ptr, unsigned int *str_size)
  2328. +{
  2329. + int err, i;
  2330. + unsigned char byte;
  2331. + unsigned int size;
  2332. + struct id_cookie d_cookie = *cookie;
  2333. +
  2334. + err = id_find_dict(&d_cookie, key, IDENUM_ANY_STRING);
  2335. +
  2336. + if (err != ID_EOK)
  2337. + return err;
  2338. + /* Extract the string size */
  2339. + size = extract_unsigned_pnum(&d_cookie, 5, &err);
  2340. + if (err != ID_EOK)
  2341. + return err;
  2342. +
  2343. + /* If handed a NULL str_ptr, only set the size and return */
  2344. + if (!str_ptr) {
  2345. + *str_size = size;
  2346. + return ID_EOK;
  2347. + }
  2348. +
  2349. + if (size > *str_size)
  2350. + return -ID_ERANGE;
  2351. +
  2352. + for(i=0; i<size; ++i) {
  2353. + byte = id_fetch_byte(d_cookie.offset++, &err);
  2354. + if (err)
  2355. + return err;
  2356. + str_ptr[i] = byte;
  2357. + }
  2358. + *str_size = size;
  2359. +
  2360. + return ID_EOK;
  2361. +}
  2362. +
  2363. +/* in dictionary pointed at by cookie, find the key "key"; verify its a
  2364. + * number (either pos/neg) and return its value through *num */
  2365. +static int id_find_number(struct id_cookie *cookie, id_keys_t key, int *num)
  2366. +{
  2367. + int err;
  2368. + int l_num;
  2369. + idenum_t l_type;
  2370. + struct id_cookie d_cookie = *cookie;
  2371. +
  2372. + err = id_find_dict(&d_cookie, key, IDENUM_ANY_NUMBER);
  2373. +
  2374. + if (err != ID_EOK)
  2375. + return err;
  2376. + err = id_whatis(&d_cookie, &l_type);
  2377. + if (err != ID_EOK)
  2378. + return err;
  2379. + /* Extract the number size */
  2380. +#if SPOOF_VERSION_CODE
  2381. + if ((cookie->offset == 509) && (key == ID_KEY_version_code))
  2382. + {
  2383. + *num = SPOOF_VERSION_CODE;
  2384. + return ID_EOK;
  2385. + }
  2386. +#endif
  2387. + l_num = extract_unsigned_pnum(&d_cookie, 5, &err);
  2388. + if (err != ID_EOK)
  2389. + return err;
  2390. +
  2391. + if (l_type == IDENUM_NEG_NUM)
  2392. + l_num = -l_num;
  2393. +
  2394. + *num = l_num;
  2395. + return ID_EOK;
  2396. +}
  2397. +
  2398. +/* in dictionary pointed at by cookie, find the list of keys; verify they are
  2399. + * numbers (either pos/neg) and return their value through *nums */
  2400. +static int id_find_numbers(struct id_cookie *cookie, id_keys_t *keys, int key_size, int *nums)
  2401. +{
  2402. + int i, err;
  2403. + struct id_cookie d_cookie;
  2404. +
  2405. + for (i=0;i<key_size; ++i) {
  2406. + d_cookie = *cookie;
  2407. + err = id_find_number(&d_cookie, keys[i], &nums[i]);
  2408. + if (err != ID_EOK)
  2409. + return err;
  2410. + }
  2411. + return ID_EOK;
  2412. +}
  2413. +
  2414. +/* --------------------------------------------------------- */
  2415. +
  2416. +/*
  2417. + * Here down is the code to interface to the kernel to extract product
  2418. + * ID information from the SRAM/AT24 chip.
  2419. + */
  2420. +
  2421. +struct id_data id_data;
  2422. +static int found_id_data;
  2423. +static struct id_cookie cpu0_group_cookie;
  2424. +static struct id_cookie serialization_group_cookie;
  2425. +static struct id_cookie model_group_cookie;
  2426. +
  2427. +static int omap3logic_find_model_group_cookie(struct id_cookie *mg_cookie)
  2428. +{
  2429. + int ret;
  2430. + struct id_cookie cookie;
  2431. +
  2432. + if (!found_id_data) {
  2433. + return -1;
  2434. + }
  2435. +
  2436. + if (model_group_cookie.offset) {
  2437. + *mg_cookie = model_group_cookie;
  2438. + return ID_EOK;
  2439. + }
  2440. +
  2441. + /* Reinitialise cookie back to the root */
  2442. + ret = id_init_cookie(&id_data, &cookie);
  2443. + if (ret != ID_EOK) {
  2444. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2445. + return ret;
  2446. + }
  2447. +
  2448. + /* find /model_group from root */
  2449. + ret = id_find_dict(&cookie, ID_KEY_model_group, IDENUM_DICT);
  2450. + if (ret != ID_EOK) {
  2451. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2452. + return ret;
  2453. + }
  2454. +
  2455. + model_group_cookie = cookie;
  2456. + *mg_cookie = cookie;
  2457. + return ret;
  2458. +}
  2459. +
  2460. +static int omap3logic_find_serialization_cookie(struct id_cookie *s_cookie)
  2461. +{
  2462. + int ret;
  2463. + struct id_cookie cookie;
  2464. +
  2465. + if (!found_id_data) {
  2466. + return -1;
  2467. + }
  2468. +
  2469. + if (serialization_group_cookie.offset) {
  2470. + *s_cookie = serialization_group_cookie;
  2471. + return ID_EOK;
  2472. + }
  2473. +
  2474. + ret = id_init_cookie(&id_data, &cookie);
  2475. + if (ret != ID_EOK) {
  2476. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2477. + return ret;
  2478. + }
  2479. +
  2480. + /* find /serialization_group from root */
  2481. + ret = id_find_dict(&cookie, ID_KEY_serialization_group, IDENUM_DICT);
  2482. + if (ret != ID_EOK) {
  2483. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2484. + return ret;
  2485. + }
  2486. +
  2487. + serialization_group_cookie = cookie;
  2488. + *s_cookie = cookie;
  2489. + return ID_EOK;
  2490. +}
  2491. +
  2492. +static int omap3logic_find_cpu0_group_cookie(struct id_cookie *s_cookie)
  2493. +{
  2494. + int ret;
  2495. + struct id_cookie cookie;
  2496. +
  2497. + if (!found_id_data) {
  2498. + return -1;
  2499. + }
  2500. +
  2501. + if (cpu0_group_cookie.offset) {
  2502. + *s_cookie = cpu0_group_cookie;
  2503. + return ID_EOK;
  2504. + }
  2505. +
  2506. + ret = id_init_cookie(&id_data, &cookie);
  2507. + if (ret != ID_EOK) {
  2508. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2509. + return ret;
  2510. + }
  2511. +
  2512. + /* find /cpu0_group from root */
  2513. + ret = id_find_dict(&cookie, ID_KEY_cpu0_group, IDENUM_DICT);
  2514. + if (ret != ID_EOK) {
  2515. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2516. + return ret;
  2517. + }
  2518. +
  2519. + cpu0_group_cookie = cookie;
  2520. + *s_cookie = cookie;
  2521. + return ID_EOK;
  2522. +}
  2523. +
  2524. +int omap3logic_extract_new_part_number(u32 *part_number)
  2525. +{
  2526. + int ret;
  2527. + struct id_cookie cookie;
  2528. +
  2529. + ret = omap3logic_find_model_group_cookie(&cookie);
  2530. + if (ret != ID_EOK) {
  2531. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2532. + return ret;
  2533. + }
  2534. +
  2535. + /* Find part number */
  2536. + ret = id_find_number(&cookie, ID_KEY_part_number, part_number);
  2537. + if (ret != ID_EOK) {
  2538. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2539. + return ret;
  2540. + }
  2541. + return ret;
  2542. +}
  2543. +
  2544. +int omap3logic_extract_new_version_code(u32 *version_code)
  2545. +{
  2546. + int ret;
  2547. + struct id_cookie cookie;
  2548. +
  2549. + ret = omap3logic_find_model_group_cookie(&cookie);
  2550. + if (ret != ID_EOK) {
  2551. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2552. + return -EINVAL;
  2553. + }
  2554. +
  2555. + /* Find part number */
  2556. + ret = id_find_number(&cookie, ID_KEY_version_code, version_code);
  2557. + if (ret != ID_EOK) {
  2558. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2559. + return -EINVAL;
  2560. + }
  2561. + return ret;
  2562. +}
  2563. +
  2564. +int omap3logic_extract_new_speed_mhz(u32 *speed_mhz)
  2565. +{
  2566. + int ret;
  2567. + struct id_cookie cookie;
  2568. +
  2569. + ret = omap3logic_find_cpu0_group_cookie(&cookie);
  2570. + if (ret != ID_EOK) {
  2571. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2572. + return ret;
  2573. + }
  2574. +
  2575. + /* Find part number */
  2576. + ret = id_find_number(&cookie, ID_KEY_speed_mhz, speed_mhz);
  2577. + if (ret != ID_EOK) {
  2578. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2579. + return ret;
  2580. + }
  2581. + return ret;
  2582. +}
  2583. +
  2584. +struct ddr_timings {
  2585. + u32 sysconfig;
  2586. + u32 sharing;
  2587. + u32 power;
  2588. + u32 cfg;
  2589. + struct ddr_cs {
  2590. + u32 mcfg;
  2591. + u32 mr;
  2592. + u32 rfr;
  2593. + u32 emr;
  2594. + u32 actima;
  2595. + u32 actimb;
  2596. + u32 dlla;
  2597. + } cs;
  2598. +} ddr_timings;
  2599. +
  2600. +id_keys_t dram_cs_group_keys[] = {
  2601. + ID_KEY_mcfg_reg,
  2602. + ID_KEY_mr_reg,
  2603. + ID_KEY_rfr_ctrl_reg,
  2604. + ID_KEY_emr2_reg,
  2605. + ID_KEY_actim_ctrla_reg,
  2606. + ID_KEY_actim_ctrlb_reg,
  2607. + ID_KEY_dlla_ctrl_reg,
  2608. +};
  2609. +id_keys_t dram_bus_group_keys[] = {
  2610. + ID_KEY_sysconfig_reg,
  2611. + ID_KEY_sharing_reg,
  2612. + ID_KEY_power_reg,
  2613. + ID_KEY_cs_cfg_reg,
  2614. +};
  2615. +
  2616. +int omap3logic_extract_new_ddr_timings(struct ddr_timings *ddr_timings)
  2617. +{
  2618. + int ret;
  2619. + struct id_cookie cookie, dram_bus_group_cookie;
  2620. + int dram_bus_group_values[ARRAY_SIZE(dram_bus_group_keys)];
  2621. + int dram_cs_group_values[ARRAY_SIZE(dram_cs_group_keys)];
  2622. +
  2623. + ret = id_init_cookie(&id_data, &cookie);
  2624. + if (ret != ID_EOK) {
  2625. + return ret;
  2626. + }
  2627. +
  2628. + /* find /cpu0_bus_group from root */
  2629. + ret = id_find_dict(&cookie, ID_KEY_cpu0_bus_group, IDENUM_DICT);
  2630. + if (ret != ID_EOK) {
  2631. + return ret;
  2632. + }
  2633. +
  2634. + /* find /dram_bus_group from /cpu0_bus_group */
  2635. + ret = id_find_dict(&cookie, ID_KEY_dram_bus_group, IDENUM_DICT);
  2636. + if (ret != ID_EOK) {
  2637. + return ret;
  2638. + }
  2639. +
  2640. + dram_bus_group_cookie = cookie;
  2641. + ret = id_find_numbers(&dram_bus_group_cookie, dram_bus_group_keys, ARRAY_SIZE(dram_bus_group_keys), dram_bus_group_values);
  2642. + if (ret != ID_EOK) {
  2643. + return ret;
  2644. + }
  2645. +
  2646. + ddr_timings->sysconfig = dram_bus_group_values[0];
  2647. + ddr_timings->sharing = dram_bus_group_values[1];
  2648. + ddr_timings->power = dram_bus_group_values[2];
  2649. + ddr_timings->cfg = dram_bus_group_values[3];
  2650. +
  2651. + ret = id_find_dict(&dram_bus_group_cookie, ID_KEY_cs0_group, IDENUM_DICT);
  2652. + if (ret != ID_EOK) {
  2653. + return ret;
  2654. + }
  2655. +
  2656. + ret = id_find_numbers(&dram_bus_group_cookie, dram_cs_group_keys, ARRAY_SIZE(dram_cs_group_keys), dram_cs_group_values);
  2657. + if (ret != ID_EOK) {
  2658. + return ret;
  2659. + }
  2660. + ddr_timings->cs.mcfg = dram_cs_group_values[0];
  2661. + ddr_timings->cs.mr = dram_cs_group_values[1];
  2662. + ddr_timings->cs.rfr = dram_cs_group_values[2];
  2663. + ddr_timings->cs.emr = dram_cs_group_values[3];
  2664. + ddr_timings->cs.actima = dram_cs_group_values[4];
  2665. + ddr_timings->cs.actimb = dram_cs_group_values[5];
  2666. + ddr_timings->cs.dlla = dram_cs_group_values[6];
  2667. +
  2668. + return ret;
  2669. +}
  2670. +
  2671. +static int omap3logic_extract_new_model_name(char *model_name, u32 *model_name_size)
  2672. +{
  2673. + int ret;
  2674. + struct id_cookie cookie;
  2675. +
  2676. + ret = omap3logic_find_model_group_cookie(&cookie);
  2677. + if (ret != ID_EOK) {
  2678. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2679. + return ret;
  2680. + }
  2681. +
  2682. + ret = id_find_string(&cookie, ID_KEY_model_name, model_name, model_name_size);
  2683. + if (ret != ID_EOK) {
  2684. + if (ret != -ID_ENOENT) {
  2685. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2686. + }
  2687. + return ret;
  2688. + }
  2689. +
  2690. + return ret;
  2691. +}
  2692. +
  2693. +int omap3logic_extract_new_serial_number(u8 *serial_number, u32 *serial_number_size)
  2694. +{
  2695. + int ret;
  2696. + struct id_cookie cookie;
  2697. +
  2698. + ret = omap3logic_find_serialization_cookie(&cookie);
  2699. + if (ret != ID_EOK) {
  2700. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2701. + return ret;
  2702. + }
  2703. +
  2704. + /* Find serial_number */
  2705. + ret = id_find_string(&cookie, ID_KEY_serial_number, serial_number, serial_number_size);
  2706. + if (ret != ID_EOK) {
  2707. + if (ret != -ID_ENOENT)
  2708. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2709. + return ret;
  2710. + }
  2711. +
  2712. + return ret;
  2713. +}
  2714. +
  2715. +int omap3logic_extract_new_nvs_data(u8 *nvs_data, u32 *nvs_data_size)
  2716. +{
  2717. + int ret;
  2718. + struct id_cookie cookie;
  2719. +
  2720. + ret = omap3logic_find_serialization_cookie(&cookie);
  2721. + if (ret != ID_EOK) {
  2722. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2723. + return ret;
  2724. + }
  2725. +
  2726. + /* Find serial_number */
  2727. + ret = id_find_string(&cookie, ID_KEY_nvs, nvs_data, nvs_data_size);
  2728. + if (ret != ID_EOK) {
  2729. + printk(KERN_ERR "%s:%d ret %d\n", __FUNCTION__, __LINE__, ret);
  2730. + return ret;
  2731. + }
  2732. + return ret;
  2733. +}
  2734. +
  2735. +#if 0
  2736. +/* Extract GPMC timings for particular CS register */
  2737. +id_keys_t gpmc_ncs_keys[] = {
  2738. + ID_KEY_cs0_group,
  2739. + ID_KEY_cs1_group,
  2740. + ID_KEY_cs2_group,
  2741. + ID_KEY_cs3_group,
  2742. + ID_KEY_cs4_group,
  2743. + ID_KEY_cs5_group,
  2744. + ID_KEY_cs6_group,
  2745. +};
  2746. +
  2747. +id_keys_t gpmc_config_reg_keys[] = {
  2748. + ID_KEY_config1_reg,
  2749. + ID_KEY_config2_reg,
  2750. + ID_KEY_config3_reg,
  2751. + ID_KEY_config4_reg,
  2752. + ID_KEY_config5_reg,
  2753. + ID_KEY_config6_reg,
  2754. + ID_KEY_config7_reg,
  2755. +};
  2756. +
  2757. +#endif
  2758. +
  2759. +/* Initialize the product ID data and return 0 if found */
  2760. +static int product_id_init(void)
  2761. +{
  2762. + int ret;
  2763. +
  2764. + memset(&id_data, 0, sizeof(id_data));
  2765. +
  2766. + ret = id_startup(&id_data);
  2767. + if (ret != ID_EOK) {
  2768. + return -1;
  2769. + }
  2770. +
  2771. + return 0;
  2772. +}
  2773. +
  2774. +static int logic_has_new_product_id(void)
  2775. +{
  2776. + if (!found_id_data) {
  2777. + if (!product_id_init()) {
  2778. + found_id_data = 1;
  2779. + }
  2780. + }
  2781. + return found_id_data;
  2782. +}
  2783. +
  2784. +static int omap3logic_init_new_product_id(void)
  2785. +{
  2786. + if (!logic_has_new_product_id()) {
  2787. + printk(KERN_ERR "%s:%d\n", __FUNCTION__, __LINE__);
  2788. + return -ENOENT;
  2789. + }
  2790. +
  2791. + return 0;
  2792. +}
  2793. +
  2794. +/* Extract the Wired LAN ethaddr, and return !0 if its valid */
  2795. +static int omap3logic_extract_new_lan_ethaddr(u8 *ethaddr)
  2796. +{
  2797. + int ret;
  2798. + struct id_cookie cookie;
  2799. + int ethaddr_size;
  2800. +
  2801. + if (!found_id_data) {
  2802. + ret = -ENXIO;
  2803. + printk(KERN_ERR "%s:%d\n", __FUNCTION__, __LINE__);
  2804. + goto done;
  2805. + }
  2806. +
  2807. + ret = id_init_cookie(&id_data, &cookie);
  2808. + if (ret != ID_EOK) {
  2809. + printk(KERN_ERR "%s:%d\n", __FUNCTION__, __LINE__);
  2810. + goto done;
  2811. + }
  2812. +
  2813. + /* Find /serialization_group */
  2814. + ret = id_find_dict(&cookie, ID_KEY_serialization_group, IDENUM_DICT);
  2815. + if (ret != ID_EOK) {
  2816. + printk(KERN_ERR "%s:%d\n", __FUNCTION__, __LINE__);
  2817. + goto done;
  2818. + }
  2819. +
  2820. + /* Find /lan_ethaddr1 */
  2821. + ethaddr_size = 6;
  2822. + ret = id_find_string(&cookie, ID_KEY_lan_ethaddr1, ethaddr, &ethaddr_size);
  2823. + if (ret != ID_EOK) {
  2824. + goto done;
  2825. + }
  2826. + if (ethaddr_size != 6) {
  2827. + ret = -E2BIG;
  2828. + printk(KERN_ERR "%s:%d ethaddr_size %u\n", __FUNCTION__, __LINE__, ethaddr_size);
  2829. + goto done;
  2830. + }
  2831. + ret = 0;
  2832. +
  2833. +done:
  2834. + return ret;
  2835. +}
  2836. +
  2837. +/* Extract the WiFi ethaddr, and return !0 if its valid */
  2838. +static int omap3logic_extract_new_wifi_ethaddr(u8 *ethaddr)
  2839. +{
  2840. + int ret;
  2841. + struct id_cookie cookie;
  2842. + int ethaddr_size;
  2843. +
  2844. + if (!found_id_data) {
  2845. + ret = -ENXIO;
  2846. + printk(KERN_ERR "%s:%d\n", __FUNCTION__, __LINE__);
  2847. + goto done;
  2848. + }
  2849. +
  2850. + ret = id_init_cookie(&id_data, &cookie);
  2851. + if (ret != ID_EOK) {
  2852. + printk(KERN_ERR "%s:%d\n", __FUNCTION__, __LINE__);
  2853. + goto done;
  2854. + }
  2855. +
  2856. + /* Find /serialization_group */
  2857. + ret = id_find_dict(&cookie, ID_KEY_serialization_group, IDENUM_DICT);
  2858. + if (ret != ID_EOK) {
  2859. + printk(KERN_ERR "%s:%d\n", __FUNCTION__, __LINE__);
  2860. + goto done;
  2861. + }
  2862. +
  2863. + /* Find /lan_ethaddr2 */
  2864. + ethaddr_size = 6;
  2865. + ret = id_find_string(&cookie, ID_KEY_wifi_ethaddr1, ethaddr, &ethaddr_size);
  2866. + if (ret != ID_EOK) {
  2867. + goto done;
  2868. + }
  2869. + if (ethaddr_size != 6) {
  2870. + ret = -E2BIG;
  2871. + printk(KERN_ERR "%s:%d ethadr_size %d\n", __FUNCTION__, __LINE__, ethaddr_size);
  2872. + goto done;
  2873. + }
  2874. +
  2875. + ret = 0;
  2876. +done:
  2877. + return ret;
  2878. +}
  2879. +
  2880. +static ssize_t product_id_show_wifi_macaddr(struct class *class, struct class_attribute *attr, char *buf)
  2881. +{
  2882. + u8 macaddr[7];
  2883. + int ret;
  2884. + int len;
  2885. +
  2886. + ret = omap3logic_extract_new_wifi_ethaddr(macaddr);
  2887. + if (!ret) {
  2888. + len = sprintf(buf, "%02x:%02x:%02x:%02x:%02x:%02x\n",
  2889. + macaddr[0], macaddr[1], macaddr[2],
  2890. + macaddr[3], macaddr[4], macaddr[5]);
  2891. + }
  2892. + return len;
  2893. +}
  2894. +
  2895. +static ssize_t product_id_show_lan_macaddr(struct class *class, struct class_attribute *attr, char *buf)
  2896. +{
  2897. + u8 macaddr[7];
  2898. + int ret;
  2899. + int len;
  2900. +
  2901. + ret = omap3logic_extract_new_lan_ethaddr(macaddr);
  2902. + if (!ret) {
  2903. + len = sprintf(buf, "%02x:%02x:%02x:%02x:%02x:%02x\n",
  2904. + macaddr[0], macaddr[1], macaddr[2],
  2905. + macaddr[3], macaddr[4], macaddr[5]);
  2906. + }
  2907. + return len;
  2908. +}
  2909. +
  2910. +static ssize_t product_id_show_part_number(struct class *class, struct class_attribute *attr, char *buf)
  2911. +{
  2912. + u32 part_number;
  2913. + int len;
  2914. +
  2915. + omap3logic_extract_new_part_number(&part_number);
  2916. + len = sprintf(buf, "%d\n", part_number);
  2917. + return len;
  2918. +}
  2919. +
  2920. +static ssize_t product_id_show_model_name(struct class *class, struct class_attribute *attr, char *buf)
  2921. +{
  2922. + u32 model_name_size = 128;
  2923. + int ret;
  2924. +
  2925. + ret = omap3logic_extract_new_model_name((u8 *)buf, &model_name_size);
  2926. +
  2927. + buf[model_name_size] = '\n';
  2928. + return model_name_size + 1;
  2929. +}
  2930. +
  2931. +static ssize_t product_id_show_version_code(struct class *class, struct class_attribute *attr, char *buf)
  2932. +{
  2933. + u32 version_code;
  2934. + int len;
  2935. +
  2936. + omap3logic_extract_new_version_code(&version_code);
  2937. + len = sprintf(buf, "%u\n", version_code);
  2938. + return len;
  2939. +}
  2940. +
  2941. +static ssize_t product_id_show_serial_number(struct class *class, struct class_attribute *attr, char *buf)
  2942. +{
  2943. + u32 serial_number_size = 128;
  2944. +
  2945. + omap3logic_extract_new_serial_number((u8 *)buf, &serial_number_size);
  2946. + buf[serial_number_size] = '\n';
  2947. + return serial_number_size + 1;
  2948. +}
  2949. +
  2950. +static ssize_t product_id_show_speed_mhz(struct class *clase, struct class_attribute *attr, char *buf)
  2951. +{
  2952. + u32 speed_mhz;
  2953. + int len;
  2954. +
  2955. + omap3logic_extract_new_speed_mhz(&speed_mhz);
  2956. + len = sprintf(buf, "%u\n", speed_mhz);
  2957. + return len;
  2958. +}
  2959. +
  2960. +static ssize_t product_id_show_wifi_config_data(struct class *class, struct class_attribute *attr, char *buf)
  2961. +{
  2962. + u32 wifi_config_size = PAGE_SIZE;
  2963. + int ret;
  2964. +
  2965. + ret = omap3logic_extract_new_nvs_data(buf, &wifi_config_size);
  2966. +
  2967. + if (ret == ID_EOK)
  2968. + return wifi_config_size;
  2969. +
  2970. + return ret;
  2971. +}
  2972. +
  2973. +#define DUMP_DDR_TIMING(REG) i += sprintf(&buf[i], "%-9s: %08x\n", #REG, ddr_timings. REG)
  2974. +static ssize_t product_id_show_ddr_timings(struct class *class, struct class_attribute *attr, char *buf)
  2975. +{
  2976. + int i=0;
  2977. +
  2978. + DUMP_DDR_TIMING(sysconfig);
  2979. + DUMP_DDR_TIMING(sharing);
  2980. + DUMP_DDR_TIMING(power);
  2981. + DUMP_DDR_TIMING(cfg);
  2982. + DUMP_DDR_TIMING(cs.mcfg);
  2983. + DUMP_DDR_TIMING(cs.mr);
  2984. + DUMP_DDR_TIMING(cs.rfr);
  2985. + DUMP_DDR_TIMING(cs.emr);
  2986. + DUMP_DDR_TIMING(cs.actima);
  2987. + DUMP_DDR_TIMING(cs.actimb);
  2988. + DUMP_DDR_TIMING(cs.dlla);
  2989. +
  2990. + return i;
  2991. +}
  2992. +
  2993. +static struct {
  2994. + struct class_attribute attr;
  2995. + int *test_value;
  2996. +} product_id_class_attributes[] = {
  2997. + {
  2998. + __ATTR(lan_macaddr, S_IRUGO, product_id_show_lan_macaddr, NULL),
  2999. + NULL,
  3000. + },
  3001. + {
  3002. + __ATTR(wifi_macaddr, S_IRUGO, product_id_show_wifi_macaddr, NULL),
  3003. + NULL,
  3004. + },
  3005. + {
  3006. + __ATTR(part_number, S_IRUGO, product_id_show_part_number, NULL),
  3007. + NULL,
  3008. + },
  3009. + {
  3010. + __ATTR(version_code, S_IRUGO, product_id_show_version_code, NULL),
  3011. + NULL,
  3012. + },
  3013. + {
  3014. + __ATTR(model_name, S_IRUGO, product_id_show_model_name, NULL),
  3015. + NULL,
  3016. + },
  3017. + {
  3018. + __ATTR(serial_number, S_IRUGO, product_id_show_serial_number, NULL),
  3019. + NULL,
  3020. + },
  3021. + {
  3022. + __ATTR(speed_mhz, S_IRUGO, product_id_show_speed_mhz, NULL),
  3023. + NULL,
  3024. + },
  3025. + {
  3026. + __ATTR(wifi_config_data, S_IRUGO, product_id_show_wifi_config_data, NULL),
  3027. + NULL,
  3028. + },
  3029. + {
  3030. + __ATTR(ddr_timings, S_IRUGO, product_id_show_ddr_timings, NULL),
  3031. + NULL,
  3032. + },
  3033. +};
  3034. +
  3035. +static void product_id_dev_release(struct device *dev)
  3036. +{
  3037. +}
  3038. +
  3039. +static struct class product_id_class = {
  3040. + .name = "product_id",
  3041. + .dev_release = product_id_dev_release,
  3042. +};
  3043. +
  3044. +static int omap3logic_create_new_product_id_sysfs(void)
  3045. +{
  3046. + int i, rc;
  3047. +
  3048. + rc = class_register(&product_id_class);
  3049. + if (rc != 0) {
  3050. + printk(KERN_ERR "%s: failed to register product_id class\n", __FUNCTION__);
  3051. + return rc;
  3052. + }
  3053. +
  3054. + for (i=0; i<ARRAY_SIZE(product_id_class_attributes); ++i) {
  3055. + if (!product_id_class_attributes[i].test_value || *product_id_class_attributes[i].test_value) {
  3056. + rc = class_create_file(&product_id_class, &product_id_class_attributes[i].attr);
  3057. + if (unlikely(rc)) {
  3058. + printk(KERN_ERR "%s: failed to create product_id class file\n", __FUNCTION__);
  3059. + while (--i >= 0) {
  3060. + if (!product_id_class_attributes[i].test_value || *product_id_class_attributes[i].test_value) {
  3061. + class_remove_file(&product_id_class, &product_id_class_attributes[i].attr);
  3062. + }
  3063. + }
  3064. + class_unregister(&product_id_class);
  3065. + return -EPERM;
  3066. + }
  3067. + }
  3068. + }
  3069. +
  3070. + return 0;
  3071. +}
  3072. +
  3073. +static int omap3logic_extract_nvs_data(u8 *nvs_data, u32 *nvs_data_size)
  3074. +{
  3075. + return omap3logic_extract_new_nvs_data(nvs_data, nvs_data_size);
  3076. +}
  3077. +/* Extract the version code for the SOM */
  3078. +int omap3logic_extract_version_code(void)
  3079. +{
  3080. + int err;
  3081. + u32 version_code;
  3082. +
  3083. + err = omap3logic_extract_new_version_code(&version_code);
  3084. + if (!err)
  3085. + return version_code;
  3086. +
  3087. + return -EINVAL;
  3088. +}
  3089. +
  3090. +#ifdef EEPROM_PATH
  3091. +static int read_eeprom(void)
  3092. +{
  3093. +
  3094. + struct file *f;
  3095. + mm_segment_t fs;
  3096. + loff_t pos = 0;
  3097. + int ret = 0;
  3098. + long sz;
  3099. +
  3100. + struct id_header hdr;
  3101. + struct id_checksums xsums;
  3102. +
  3103. +
  3104. + f = filp_open(EEPROM_PATH, O_RDONLY, 0);
  3105. + if(f == NULL)
  3106. + printk(KERN_ALERT "filp_open error!!.\n");
  3107. + else{
  3108. + fs = get_fs();
  3109. + set_fs(get_ds());
  3110. +
  3111. + /* Read the header */
  3112. + sz = sizeof(hdr);
  3113. + vfs_read(f, (void *)&hdr, sz, &pos);
  3114. +
  3115. + /* Read the checksums */
  3116. + sz = sizeof(xsums);
  3117. + vfs_read(f, (void *)&xsums, sz, &pos);
  3118. +
  3119. + /* Size of data = header + 2 LE Checksums + data_length */
  3120. + sz = sizeof(hdr) + sizeof(xsums) + hdr.data_length;
  3121. +
  3122. + /* FIXME: Make the MALLOC work in the kernel */
  3123. + /* id_data_buf = (char *)kmalloc(sz, GFP_KERNEL); */
  3124. +
  3125. + /* Copy the header into the final space */
  3126. + memcpy(&id_data_buf[0], &hdr, sizeof(hdr));
  3127. +
  3128. + /* Copy the checksums into the final space */
  3129. + memcpy(&(id_data_buf[sizeof(hdr)]), &xsums, sizeof(xsums));
  3130. +
  3131. + /* Only read the data_length worth of data */
  3132. + sz = hdr.data_length;
  3133. + vfs_read(f, (void *)&id_data_buf[sizeof(hdr) + sizeof(xsums)], sz, &pos);
  3134. + set_fs(fs);
  3135. + }
  3136. + filp_close(f,NULL);
  3137. + return ret;
  3138. +}
  3139. +#endif
  3140. +
  3141. +static int __init productid_init(void)
  3142. +{
  3143. +#ifdef EEPROM_PATH
  3144. + read_eeprom();
  3145. +#endif
  3146. + omap3logic_init_new_product_id();
  3147. + omap3logic_create_new_product_id_sysfs();
  3148. + return 0;
  3149. +}
  3150. +
  3151. +module_init(productid_init);
  3152. +
  3153. +static void __exit productid_exit(void)
  3154. +{
  3155. + int i;
  3156. +
  3157. + for (i=0; i<ARRAY_SIZE(product_id_class_attributes); ++i) {
  3158. + class_remove_file(&product_id_class, &product_id_class_attributes[i].attr);
  3159. + }
  3160. + class_unregister(&product_id_class);
  3161. +}
  3162. +
  3163. +module_exit(productid_exit);
  3164. +
  3165. +EXPORT_SYMBOL(omap3logic_extract_nvs_data);
  3166. +EXPORT_SYMBOL(omap3logic_extract_version_code);
  3167. +
  3168. +MODULE_LICENSE("GPL");
  3169. +MODULE_AUTHOR("Adam Ford <adam.ford@logicpd.com>");
  3170. +MODULE_DESCRIPTION("Logic PD EEPROM reader");
  3171. +MODULE_VERSION("printk");
  3172. +
  3173. diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
  3174. index 2f4641a..3deb642 100644
  3175. --- a/drivers/pwm/Kconfig
  3176. +++ b/drivers/pwm/Kconfig
  3177. @@ -270,6 +270,15 @@ config PWM_MXS
  3178. To compile this driver as a module, choose M here: the module
  3179. will be called pwm-mxs.
  3180.  
  3181. +config PWM_OMAP_DMTIMER
  3182. + tristate "OMAP Dual-Mode Timer PWM support"
  3183. + depends on OF && ARCH_OMAP && OMAP_DM_TIMER
  3184. + help
  3185. + Generic PWM framework driver for OMAP Dual-Mode Timer PWM output
  3186. +
  3187. + To compile this driver as a module, choose M here: the module
  3188. + will be called pwm-omap-dmtimer
  3189. +
  3190. config PWM_PCA9685
  3191. tristate "NXP PCA9685 PWM driver"
  3192. depends on I2C
  3193. diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
  3194. index 69b8275..dd35bc1 100644
  3195. --- a/drivers/pwm/Makefile
  3196. +++ b/drivers/pwm/Makefile
  3197. @@ -24,6 +24,7 @@ obj-$(CONFIG_PWM_LPSS_PCI) += pwm-lpss-pci.o
  3198. obj-$(CONFIG_PWM_LPSS_PLATFORM) += pwm-lpss-platform.o
  3199. obj-$(CONFIG_PWM_MTK_DISP) += pwm-mtk-disp.o
  3200. obj-$(CONFIG_PWM_MXS) += pwm-mxs.o
  3201. +obj-$(CONFIG_PWM_OMAP_DMTIMER) += pwm-omap-dmtimer.o
  3202. obj-$(CONFIG_PWM_PCA9685) += pwm-pca9685.o
  3203. obj-$(CONFIG_PWM_PUV3) += pwm-puv3.o
  3204. obj-$(CONFIG_PWM_PXA) += pwm-pxa.o
  3205. diff --git a/drivers/pwm/pwm-omap-dmtimer.c b/drivers/pwm/pwm-omap-dmtimer.c
  3206. new file mode 100644
  3207. index 0000000..b7e6ecb
  3208. --- /dev/null
  3209. +++ b/drivers/pwm/pwm-omap-dmtimer.c
  3210. @@ -0,0 +1,369 @@
  3211. +/*
  3212. + * Copyright (c) 2015 Neil Armstrong <narmstrong@baylibre.com>
  3213. + * Copyright (c) 2014 Joachim Eastwood <manabian@gmail.com>
  3214. + * Copyright (c) 2012 NeilBrown <neilb@suse.de>
  3215. + * Heavily based on earlier code which is:
  3216. + * Copyright (c) 2010 Grant Erickson <marathon96@gmail.com>
  3217. + *
  3218. + * Also based on pwm-samsung.c
  3219. + *
  3220. + * This program is free software; you can redistribute it and/or
  3221. + * modify it under the terms of the GNU General Public License
  3222. + * version 2 as published by the Free Software Foundation.
  3223. + *
  3224. + * Description:
  3225. + * This file is the core OMAP support for the generic, Linux
  3226. + * PWM driver / controller, using the OMAP's dual-mode timers.
  3227. + */
  3228. +
  3229. +#include <linux/clk.h>
  3230. +#include <linux/err.h>
  3231. +#include <linux/kernel.h>
  3232. +#include <linux/module.h>
  3233. +#include <linux/mutex.h>
  3234. +#include <linux/of.h>
  3235. +#include <linux/of_platform.h>
  3236. +#include <linux/platform_data/pwm_omap_dmtimer.h>
  3237. +#include <linux/platform_device.h>
  3238. +#include <linux/pm_runtime.h>
  3239. +#include <linux/pwm.h>
  3240. +#include <linux/slab.h>
  3241. +#include <linux/time.h>
  3242. +
  3243. +#define DM_TIMER_LOAD_MIN 0xfffffffe
  3244. +#define DM_TIMER_MAX 0xffffffff
  3245. +
  3246. +struct pwm_omap_dmtimer_chip {
  3247. + struct pwm_chip chip;
  3248. + struct mutex mutex;
  3249. + pwm_omap_dmtimer *dm_timer;
  3250. + struct pwm_omap_dmtimer_pdata *pdata;
  3251. + struct platform_device *dm_timer_pdev;
  3252. +};
  3253. +
  3254. +static inline struct pwm_omap_dmtimer_chip *
  3255. +to_pwm_omap_dmtimer_chip(struct pwm_chip *chip)
  3256. +{
  3257. + return container_of(chip, struct pwm_omap_dmtimer_chip, chip);
  3258. +}
  3259. +
  3260. +static u32 pwm_omap_dmtimer_get_clock_cycles(unsigned long clk_rate, int ns)
  3261. +{
  3262. + return DIV_ROUND_CLOSEST_ULL((u64)clk_rate * ns, NSEC_PER_SEC);
  3263. +}
  3264. +
  3265. +static void pwm_omap_dmtimer_start(struct pwm_omap_dmtimer_chip *omap)
  3266. +{
  3267. + /*
  3268. + * According to OMAP 4 TRM section 22.2.4.10 the counter should be
  3269. + * started at 0xFFFFFFFE when overflow and match is used to ensure
  3270. + * that the PWM line is toggled on the first event.
  3271. + *
  3272. + * Note that omap_dm_timer_enable/disable is for register access and
  3273. + * not the timer counter itself.
  3274. + */
  3275. + omap->pdata->enable(omap->dm_timer);
  3276. + omap->pdata->write_counter(omap->dm_timer, DM_TIMER_LOAD_MIN);
  3277. + omap->pdata->disable(omap->dm_timer);
  3278. +
  3279. + omap->pdata->start(omap->dm_timer);
  3280. +}
  3281. +
  3282. +static int pwm_omap_dmtimer_enable(struct pwm_chip *chip,
  3283. + struct pwm_device *pwm)
  3284. +{
  3285. + struct pwm_omap_dmtimer_chip *omap = to_pwm_omap_dmtimer_chip(chip);
  3286. +
  3287. + mutex_lock(&omap->mutex);
  3288. + pwm_omap_dmtimer_start(omap);
  3289. + mutex_unlock(&omap->mutex);
  3290. +
  3291. + return 0;
  3292. +}
  3293. +
  3294. +static void pwm_omap_dmtimer_disable(struct pwm_chip *chip,
  3295. + struct pwm_device *pwm)
  3296. +{
  3297. + struct pwm_omap_dmtimer_chip *omap = to_pwm_omap_dmtimer_chip(chip);
  3298. +
  3299. + mutex_lock(&omap->mutex);
  3300. + omap->pdata->stop(omap->dm_timer);
  3301. + mutex_unlock(&omap->mutex);
  3302. +}
  3303. +
  3304. +static int pwm_omap_dmtimer_config(struct pwm_chip *chip,
  3305. + struct pwm_device *pwm,
  3306. + int duty_ns, int period_ns)
  3307. +{
  3308. + struct pwm_omap_dmtimer_chip *omap = to_pwm_omap_dmtimer_chip(chip);
  3309. + u32 period_cycles, duty_cycles;
  3310. + u32 load_value, match_value;
  3311. + struct clk *fclk;
  3312. + unsigned long clk_rate;
  3313. + bool timer_active;
  3314. +
  3315. + dev_dbg(chip->dev, "requested duty cycle: %d ns, period: %d ns\n",
  3316. + duty_ns, period_ns);
  3317. +
  3318. + mutex_lock(&omap->mutex);
  3319. + if (duty_ns == pwm_get_duty_cycle(pwm) &&
  3320. + period_ns == pwm_get_period(pwm)) {
  3321. + /* No change - don't cause any transients. */
  3322. + mutex_unlock(&omap->mutex);
  3323. + return 0;
  3324. + }
  3325. +
  3326. + fclk = omap->pdata->get_fclk(omap->dm_timer);
  3327. + if (!fclk) {
  3328. + dev_err(chip->dev, "invalid pmtimer fclk\n");
  3329. + goto err_einval;
  3330. + }
  3331. +
  3332. + clk_rate = clk_get_rate(fclk);
  3333. + if (!clk_rate) {
  3334. + dev_err(chip->dev, "invalid pmtimer fclk rate\n");
  3335. + goto err_einval;
  3336. + }
  3337. +
  3338. + dev_dbg(chip->dev, "clk rate: %luHz\n", clk_rate);
  3339. +
  3340. + /*
  3341. + * Calculate the appropriate load and match values based on the
  3342. + * specified period and duty cycle. The load value determines the
  3343. + * period time and the match value determines the duty time.
  3344. + *
  3345. + * The period lasts for (DM_TIMER_MAX-load_value+1) clock cycles.
  3346. + * Similarly, the active time lasts (match_value-load_value+1) cycles.
  3347. + * The non-active time is the remainder: (DM_TIMER_MAX-match_value)
  3348. + * clock cycles.
  3349. + *
  3350. + * NOTE: It is required that: load_value <= match_value < DM_TIMER_MAX
  3351. + *
  3352. + * References:
  3353. + * OMAP4430/60/70 TRM sections 22.2.4.10 and 22.2.4.11
  3354. + * AM335x Sitara TRM sections 20.1.3.5 and 20.1.3.6
  3355. + */
  3356. + period_cycles = pwm_omap_dmtimer_get_clock_cycles(clk_rate, period_ns);
  3357. + duty_cycles = pwm_omap_dmtimer_get_clock_cycles(clk_rate, duty_ns);
  3358. +
  3359. + if (period_cycles < 2) {
  3360. + dev_info(chip->dev,
  3361. + "period %d ns too short for clock rate %lu Hz\n",
  3362. + period_ns, clk_rate);
  3363. + goto err_einval;
  3364. + }
  3365. +
  3366. + if (duty_cycles < 1) {
  3367. + dev_dbg(chip->dev,
  3368. + "duty cycle %d ns is too short for clock rate %lu Hz\n",
  3369. + duty_ns, clk_rate);
  3370. + dev_dbg(chip->dev, "using minimum of 1 clock cycle\n");
  3371. + duty_cycles = 1;
  3372. + } else if (duty_cycles >= period_cycles) {
  3373. + dev_dbg(chip->dev,
  3374. + "duty cycle %d ns is too long for period %d ns at clock rate %lu Hz\n",
  3375. + duty_ns, period_ns, clk_rate);
  3376. + dev_dbg(chip->dev, "using maximum of 1 clock cycle less than period\n");
  3377. + duty_cycles = period_cycles - 1;
  3378. + }
  3379. +
  3380. + dev_dbg(chip->dev, "effective duty cycle: %lld ns, period: %lld ns\n",
  3381. + DIV_ROUND_CLOSEST_ULL((u64)NSEC_PER_SEC * duty_cycles,
  3382. + clk_rate),
  3383. + DIV_ROUND_CLOSEST_ULL((u64)NSEC_PER_SEC * period_cycles,
  3384. + clk_rate));
  3385. +
  3386. + load_value = (DM_TIMER_MAX - period_cycles) + 1;
  3387. + match_value = load_value + duty_cycles - 1;
  3388. +
  3389. + /*
  3390. + * We MUST stop the associated dual-mode timer before attempting to
  3391. + * write its registers, but calls to omap_dm_timer_start/stop must
  3392. + * be balanced so check if timer is active before calling timer_stop.
  3393. + */
  3394. + timer_active = pm_runtime_active(&omap->dm_timer_pdev->dev);
  3395. + if (timer_active)
  3396. + omap->pdata->stop(omap->dm_timer);
  3397. +
  3398. + omap->pdata->set_load(omap->dm_timer, true, load_value);
  3399. + omap->pdata->set_match(omap->dm_timer, true, match_value);
  3400. +
  3401. + dev_dbg(chip->dev, "load value: %#08x (%d), match value: %#08x (%d)\n",
  3402. + load_value, load_value, match_value, match_value);
  3403. +
  3404. + omap->pdata->set_pwm(omap->dm_timer,
  3405. + pwm->polarity == PWM_POLARITY_INVERSED,
  3406. + true,
  3407. + PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW_AND_COMPARE);
  3408. +
  3409. + /* If config was called while timer was running it must be reenabled. */
  3410. + if (timer_active)
  3411. + pwm_omap_dmtimer_start(omap);
  3412. +
  3413. + mutex_unlock(&omap->mutex);
  3414. +
  3415. + return 0;
  3416. +
  3417. +err_einval:
  3418. + mutex_unlock(&omap->mutex);
  3419. +
  3420. + return -EINVAL;
  3421. +}
  3422. +
  3423. +static int pwm_omap_dmtimer_set_polarity(struct pwm_chip *chip,
  3424. + struct pwm_device *pwm,
  3425. + enum pwm_polarity polarity)
  3426. +{
  3427. + struct pwm_omap_dmtimer_chip *omap = to_pwm_omap_dmtimer_chip(chip);
  3428. +
  3429. + /*
  3430. + * PWM core will not call set_polarity while PWM is enabled so it's
  3431. + * safe to reconfigure the timer here without stopping it first.
  3432. + */
  3433. + mutex_lock(&omap->mutex);
  3434. + omap->pdata->set_pwm(omap->dm_timer,
  3435. + polarity == PWM_POLARITY_INVERSED,
  3436. + true,
  3437. + PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW_AND_COMPARE);
  3438. + mutex_unlock(&omap->mutex);
  3439. +
  3440. + return 0;
  3441. +}
  3442. +
  3443. +static const struct pwm_ops pwm_omap_dmtimer_ops = {
  3444. + .enable = pwm_omap_dmtimer_enable,
  3445. + .disable = pwm_omap_dmtimer_disable,
  3446. + .config = pwm_omap_dmtimer_config,
  3447. + .set_polarity = pwm_omap_dmtimer_set_polarity,
  3448. + .owner = THIS_MODULE,
  3449. +};
  3450. +
  3451. +static int pwm_omap_dmtimer_probe(struct platform_device *pdev)
  3452. +{
  3453. + struct device_node *np = pdev->dev.of_node;
  3454. + struct device_node *timer;
  3455. + struct pwm_omap_dmtimer_chip *omap;
  3456. + struct pwm_omap_dmtimer_pdata *pdata;
  3457. + pwm_omap_dmtimer *dm_timer;
  3458. + u32 prescaler;
  3459. + int status;
  3460. +
  3461. + pdata = dev_get_platdata(&pdev->dev);
  3462. + if (!pdata) {
  3463. + dev_err(&pdev->dev, "Missing dmtimer platform data\n");
  3464. + return -EINVAL;
  3465. + }
  3466. +
  3467. + if (!pdata->request_by_node ||
  3468. + !pdata->free ||
  3469. + !pdata->enable ||
  3470. + !pdata->disable ||
  3471. + !pdata->get_fclk ||
  3472. + !pdata->start ||
  3473. + !pdata->stop ||
  3474. + !pdata->set_load ||
  3475. + !pdata->set_match ||
  3476. + !pdata->set_pwm ||
  3477. + !pdata->set_prescaler ||
  3478. + !pdata->write_counter) {
  3479. + dev_err(&pdev->dev, "Incomplete dmtimer pdata structure\n");
  3480. + return -EINVAL;
  3481. + }
  3482. +
  3483. + timer = of_parse_phandle(np, "ti,timers", 0);
  3484. + if (!timer)
  3485. + return -ENODEV;
  3486. +
  3487. + if (!of_get_property(timer, "ti,timer-pwm", NULL)) {
  3488. + dev_err(&pdev->dev, "Missing ti,timer-pwm capability\n");
  3489. + return -ENODEV;
  3490. + }
  3491. +
  3492. + dm_timer = pdata->request_by_node(timer);
  3493. + if (!dm_timer)
  3494. + return -EPROBE_DEFER;
  3495. +
  3496. + omap = devm_kzalloc(&pdev->dev, sizeof(*omap), GFP_KERNEL);
  3497. + if (!omap) {
  3498. + pdata->free(dm_timer);
  3499. + return -ENOMEM;
  3500. + }
  3501. +
  3502. + omap->pdata = pdata;
  3503. + omap->dm_timer = dm_timer;
  3504. +
  3505. + omap->dm_timer_pdev = of_find_device_by_node(timer);
  3506. + if (!omap->dm_timer_pdev) {
  3507. + dev_err(&pdev->dev, "Unable to find timer pdev\n");
  3508. + omap->pdata->free(dm_timer);
  3509. + return -EINVAL;
  3510. + }
  3511. +
  3512. + /*
  3513. + * Ensure that the timer is stopped before we allow PWM core to call
  3514. + * pwm_enable.
  3515. + */
  3516. + if (pm_runtime_active(&omap->dm_timer_pdev->dev))
  3517. + omap->pdata->stop(omap->dm_timer);
  3518. +
  3519. + /* setup dmtimer prescaler */
  3520. + if (!of_property_read_u32(pdev->dev.of_node, "ti,prescaler",
  3521. + &prescaler))
  3522. + omap->pdata->set_prescaler(omap->dm_timer, prescaler);
  3523. +
  3524. + omap->chip.dev = &pdev->dev;
  3525. + omap->chip.ops = &pwm_omap_dmtimer_ops;
  3526. + omap->chip.base = -1;
  3527. + omap->chip.npwm = 1;
  3528. + omap->chip.of_xlate = of_pwm_xlate_with_flags;
  3529. + omap->chip.of_pwm_n_cells = 3;
  3530. +
  3531. + mutex_init(&omap->mutex);
  3532. +
  3533. + status = pwmchip_add(&omap->chip);
  3534. + if (status < 0) {
  3535. + dev_err(&pdev->dev, "failed to register PWM\n");
  3536. + omap->pdata->free(omap->dm_timer);
  3537. + return status;
  3538. + }
  3539. +
  3540. + platform_set_drvdata(pdev, omap);
  3541. +
  3542. + return 0;
  3543. +}
  3544. +
  3545. +static int pwm_omap_dmtimer_remove(struct platform_device *pdev)
  3546. +{
  3547. + struct pwm_omap_dmtimer_chip *omap = platform_get_drvdata(pdev);
  3548. +
  3549. + if (pm_runtime_active(&omap->dm_timer_pdev->dev))
  3550. + omap->pdata->stop(omap->dm_timer);
  3551. +
  3552. + omap->pdata->free(omap->dm_timer);
  3553. +
  3554. + mutex_destroy(&omap->mutex);
  3555. +
  3556. + return pwmchip_remove(&omap->chip);
  3557. +}
  3558. +
  3559. +static const struct of_device_id pwm_omap_dmtimer_of_match[] = {
  3560. + {.compatible = "ti,omap-dmtimer-pwm"},
  3561. + {}
  3562. +};
  3563. +MODULE_DEVICE_TABLE(of, pwm_omap_dmtimer_of_match);
  3564. +
  3565. +static struct platform_driver pwm_omap_dmtimer_driver = {
  3566. + .driver = {
  3567. + .name = "omap-dmtimer-pwm",
  3568. + .of_match_table = of_match_ptr(pwm_omap_dmtimer_of_match),
  3569. + },
  3570. + .probe = pwm_omap_dmtimer_probe,
  3571. + .remove = pwm_omap_dmtimer_remove,
  3572. +};
  3573. +module_platform_driver(pwm_omap_dmtimer_driver);
  3574. +
  3575. +MODULE_AUTHOR("Grant Erickson <marathon96@gmail.com>");
  3576. +MODULE_AUTHOR("NeilBrown <neilb@suse.de>");
  3577. +MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
  3578. +MODULE_LICENSE("GPL v2");
  3579. +MODULE_DESCRIPTION("OMAP PWM Driver using Dual-mode Timers");
  3580. diff --git a/drivers/video/fbdev/omap2/displays-new/panel-dpi.c b/drivers/video/fbdev/omap2/displays-new/panel-dpi.c
  3581. index f7be348..ba47c88 100644
  3582. --- a/drivers/video/fbdev/omap2/displays-new/panel-dpi.c
  3583. +++ b/drivers/video/fbdev/omap2/displays-new/panel-dpi.c
  3584. @@ -11,6 +11,7 @@
  3585.  
  3586. #include <linux/gpio.h>
  3587. #include <linux/module.h>
  3588. +#include <linux/delay.h>
  3589. #include <linux/platform_device.h>
  3590. #include <linux/slab.h>
  3591. #include <linux/of.h>
  3592. @@ -79,6 +80,8 @@ static int panel_dpi_enable(struct omap_dss_device *dssdev)
  3593. in->ops.dpi->set_data_lines(in, ddata->data_lines);
  3594. in->ops.dpi->set_timings(in, &ddata->videomode);
  3595.  
  3596. + msleep(300);
  3597. +
  3598. r = in->ops.dpi->enable(in);
  3599. if (r)
  3600. return r;
  3601. @@ -86,6 +89,8 @@ static int panel_dpi_enable(struct omap_dss_device *dssdev)
  3602. if (ddata->enable_gpio)
  3603. gpiod_set_value_cansleep(ddata->enable_gpio, 1);
  3604.  
  3605. + msleep(300);
  3606. +
  3607. if (gpio_is_valid(ddata->backlight_gpio))
  3608. gpio_set_value_cansleep(ddata->backlight_gpio, 1);
  3609.  
  3610. diff --git a/include/linux/platform_data/pwm_omap_dmtimer.h b/include/linux/platform_data/pwm_omap_dmtimer.h
  3611. new file mode 100644
  3612. index 0000000..5938421
  3613. --- /dev/null
  3614. +++ b/include/linux/platform_data/pwm_omap_dmtimer.h
  3615. @@ -0,0 +1,69 @@
  3616. +/*
  3617. + * include/linux/platform_data/pwm_omap_dmtimer.h
  3618. + *
  3619. + * OMAP Dual-Mode Timer PWM platform data
  3620. + *
  3621. + * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
  3622. + * Tarun Kanti DebBarma <tarun.kanti@ti.com>
  3623. + * Thara Gopinath <thara@ti.com>
  3624. + *
  3625. + * Platform device conversion and hwmod support.
  3626. + *
  3627. + * Copyright (C) 2005 Nokia Corporation
  3628. + * Author: Lauri Leukkunen <lauri.leukkunen@nokia.com>
  3629. + * PWM and clock framework support by Timo Teras.
  3630. + *
  3631. + * This program is free software; you can redistribute it and/or modify it
  3632. + * under the terms of the GNU General Public License as published by the
  3633. + * Free Software Foundation; either version 2 of the License, or (at your
  3634. + * option) any later version.
  3635. + *
  3636. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  3637. + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  3638. + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  3639. + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  3640. + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  3641. + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  3642. + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  3643. + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  3644. + *
  3645. + * You should have received a copy of the GNU General Public License along
  3646. + * with this program; if not, write to the Free Software Foundation, Inc.,
  3647. + * 675 Mass Ave, Cambridge, MA 02139, USA.
  3648. + */
  3649. +
  3650. +#ifndef __PWM_OMAP_DMTIMER_PDATA_H
  3651. +#define __PWM_OMAP_DMTIMER_PDATA_H
  3652. +
  3653. +/* trigger types */
  3654. +#define PWM_OMAP_DMTIMER_TRIGGER_NONE 0x00
  3655. +#define PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW 0x01
  3656. +#define PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02
  3657. +
  3658. +struct omap_dm_timer;
  3659. +typedef struct omap_dm_timer pwm_omap_dmtimer;
  3660. +
  3661. +struct pwm_omap_dmtimer_pdata {
  3662. + pwm_omap_dmtimer *(*request_by_node)(struct device_node *np);
  3663. + int (*free)(pwm_omap_dmtimer *timer);
  3664. +
  3665. + void (*enable)(pwm_omap_dmtimer *timer);
  3666. + void (*disable)(pwm_omap_dmtimer *timer);
  3667. +
  3668. + struct clk *(*get_fclk)(pwm_omap_dmtimer *timer);
  3669. +
  3670. + int (*start)(pwm_omap_dmtimer *timer);
  3671. + int (*stop)(pwm_omap_dmtimer *timer);
  3672. +
  3673. + int (*set_load)(pwm_omap_dmtimer *timer, int autoreload,
  3674. + unsigned int value);
  3675. + int (*set_match)(pwm_omap_dmtimer *timer, int enable,
  3676. + unsigned int match);
  3677. + int (*set_pwm)(pwm_omap_dmtimer *timer, int def_on,
  3678. + int toggle, int trigger);
  3679. + int (*set_prescaler)(pwm_omap_dmtimer *timer, int prescaler);
  3680. +
  3681. + int (*write_counter)(pwm_omap_dmtimer *timer, unsigned int value);
  3682. +};
  3683. +
  3684. +#endif /* __PWM_OMAP_DMTIMER_PDATA_H */
  3685. --
  3686. 2.7.4
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