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  1. Processor
  2. loop
  3. if(cnt==0)
  4. if(cnt==1)
  5. if(grant)
  6.  
  7. always@(posedge clock)
  8. 1. request access
  9. 2. wait for Access
  10. 3. request data  r=1 w=0 Addr=[IP] Data[MemAddr]
  11. 4. R=1, w=0, Addr[I/P], Data=9
  12. 5. wait for I/P interrupt
  13. 6. Request sysbus access
  14. 7. on access
  15. 8. r=0, w=0, Addr=[I/P], Data=[I/P]
  16. 9. r=1, w=0, Addr= [MemAddr],Data=x
  17. 10. Release request
  18. 11. wait for data
  19. 12. put data into register
  20. 13. Request Access
  21. 9-13 repeat 9 times for different addresss
  22.  
  23. I/P
  24. reg[8:0] buffer[0:1023]
  25. initial
  26. begin
  27. $readmem ("file",buffer)
  28.  
  29. end
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