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timurkanaz

Nazarov_circ_5

Jan 10th, 2021
301
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  1. library ieee;
  2. use ieee.std_logic_1164.all;
  3. entity circuit_5 is
  4.     port (  
  5.         pin_name : in STD_LOGIC;
  6.         pin_name1 : in STD_LOGIC;
  7.         pin_name2 : in STD_LOGIC;
  8.         pin_name6 : out STD_LOGIC);
  9. end circuit_5;
  10.  
  11. architecture Behavioral of circuit_5 is
  12. begin
  13.     pin_name6 <= ( (pin_name or (not pin_name1) or (not pin_name2)) and ((not pin_name) or pin_name2) and (pin_name1 or pin_name2) );
  14. end Behavioral;
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