Nazarov_circ_5

library ieee;
use ieee.std_logic_1164.all;
entity circuit_5 is
    port (
        pin_name : in STD_LOGIC;
        pin_name1 : in STD_LOGIC;
        pin_name2 : in STD_LOGIC;
        pin_name6 : out STD_LOGIC);
end circuit_5;

architecture Behavioral of circuit_5 is
begin
    pin_name6 <= ( (pin_name or (not pin_name1) or (not pin_name2)) and ((not pin_name) or pin_name2) and (pin_name1 or pin_name2) );
end Behavioral;