Shema

library IEEE;
use IEEE.std_logic_1164.all;

entity shema is
     port(
         Ra : in STD_LOGIC;
         C : in STD_LOGIC;
         D : in STD_LOGIC;
         Sa : in STD_LOGIC;
         Q : out STD_LOGIC;
         neQ : out STD_LOGIC
         );
end shema;

--}} End of automatically maintained section

architecture shema of shema is
signal Q1, Q2, Q3, Q4, s5, s6: STD_LOGIC;

component \log_&\ is
    port(
         A : in STD_LOGIC;
         B : in STD_LOGIC;
         C : in STD_LOGIC;
         Y : out STD_LOGIC
         );
end component \log_&\;

begin

    element1: \log_&\ port map (Ra, Q4, Q2, Q1);
    element2: \log_&\ port map (Q1, C, Sa, Q2);
    element3: \log_&\ port map (Q2, C, Q4, Q3);
    element4: \log_&\ port map (Q3, D, Sa, Q4);
    element5: \log_&\ port map (Ra, Q2, s6, s5);
    element6: \log_&\ port map (s5, Q3, Sa, s6);

    neQ <= s6;
    Q <= s5;

end shema;