process(clock, reset)
    begin
        if rising_edge(clock) then
            fifo_count <= fifo_count + 1;
            fifo_wren <= '0';
            if (fifo_count > 2 and fifo_count < 10) or (fifo_count > 20) then
                if fifo_almost_full = '0' then
--                  if fifo_count(0) = '1' then
                        fifo_wren <= '1';
                        fifo_din <= std_logic_vector(fifo_count);
--                  end if;
                end if;
            end if;

            -- pretend, that we don't want to read immediately
            fifo_valid_sr <= fifo_valid_sr(fifo_valid_sr'left-1 downto 0) & fifo_valid;

            fifo_rdack <= '0';
--          if fifo_valid = '1' and fifo_valid_sr(5) = '1' then
            if fifo_valid = '1' then
                foo <= fifo_dout;
                report "FOO: " & integer'image(to_integer(unsigned(fifo_dout)));
                fifo_rdack <= '1';
            end if;
        end if;

        if reset = '1' then
            fifo_count <= (others => '0');
            fifo_wren <= '0';
            fifo_rdack <= '0';
            fifo_valid_sr <= (others => '0');
        end if;
    end process;