library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity clkdiv is
Generic (in_clk:  integer := 100000000;
         out_clk: integer := 512000
         );

port (clk: in std_logic;
      CKI: out std_logic;
      SDO: out std_logic
     );
end clkdiv;

architecture Behavioral of clkdiv is

signal cntr : integer range 0 to in_clk/out_clk := 0;
signal CKIOut : std_logic := '0';
signal CKI_1 : std_logic := '0';
signal start : std_logic := '0';
signal data_cntr : integer range 0 to 151 := 0;
signal bit_cntr : integer range 0 to 31 := 0;

begin

CKI <= CKIOut;  -- Output CKI
start <= CKI_1 and (not CKIOut);

process(clk)
begin
    if clk= '1' and clk'event then
        --Generate Clock
        if (cntr < (in_clk/out_clk)/2) then
            CKIOut <= '1';
            cntr <= cntr + 1;
        elsif (cntr = in_clk/out_clk) then
            cntr <= 0;
        else
            cntr <= cntr + 1;
            CKIOut <= '0';
        end if;

        CKI_1 <= CKIOut; --delay CKI for 1 clock cycle (used for start pulse)
    end if;

    if clk= '1' and clk'event then
        if start = '1' then
            if data_cntr = 0 then
                SDO <= '0';
                bit_cntr <= bit_cntr + 1;
                if bit_cntr = 31 then
                    bit_cntr <= 0;
                    data_cntr <= data_cntr + 1;
                end if;
            elsif data_cntr > 0 and data_cntr < 151 then
                bit_cntr <= bit_cntr + 1;
                if bit_cntr < 8 then
                    SDO <= '1'; --start
                elsif bit_cntr >= 8 and bit_cntr < 16 then
                    SDO <= '1'; --brightness + blue
                elsif bit_cntr = 31 then
                    bit_cntr <= 0;
                    data_cntr <= data_cntr + 1;
                else
                    SDO <= '0';
                end if;
            elsif data_cntr = 151 then
                SDO <= '1';
                bit_cntr <= bit_cntr + 1;
                if bit_cntr = 31 then
                    bit_cntr <= 0;
                    data_cntr <= 0;
                end if;
            end if;


        end if;
    end if;



end process;

end Behavioral;