library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity sekvkola is
    port(
        iCLK : in std_logic;
        iRST : in std_logic;
        iGO : in std_logic;
        iSTOP : in std_logic;
        oMUXROW : out std_logic_vector(1 downto 0);
        o7SEGM : out std_logic_vector(6 downto 0)
    );
end entity;

architecture Behavioral of sekvkola is
    signal sTC: std_logic;
    signal sTCJed : std_logic;
    signal sCNT1S : std_logic_vector (23 downto 0);
    signal sCNTJED : std_logic_vector (3 downto 0);
    signal sCNTDES : std_logic_vector (3 downto 0);
    signal s7SEGM : std_logic_vector (3 downto 0);
    signal sSTANJE : std_logic;

begin

    --Kontrola sistema pomocu signala pokretanja i signala zaustavljanja

    process (iCLK, iRST) begin
        if(iRST = '1') then
            sSTANJE <= '0';

        elsif(iCLK'event and iCLK = '1') then

            if(iSTOP = '1' and iGO = '0') then
                sSTANJE <= '0';

            elsif(iSTOP = '0' and iGO = '1') then
                sSTANJE <= '1';

            else
                sSTANJE <= sSTANJE;

            end if;
        end if;
    end process;

    --Odredjivanje takta rada
    process(iCLK, iRST) begin
        if(iRST = '1') then
            sCNT1s <= (others => '0');

        elsif(iCLK'event and iCLK = '1') then

            if(sCNT1S > "101101110001101011111111")then
                sCNT1S <= (others => '0');

            else

                if(sSTANJE = '1') then
                    sCNT1S <= sCNT1S + '1';

                else
                    sCNT1S <= sCNT1S;

                end if;

            end if;