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Jun 26th, 2016
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  1. module Test where
  2.  
  3. import CLaSH.Prelude
  4.  
  5. ram_data :: Vec 5 (BitVector 3)
  6. ram_data = 0b000
  7. :> 0b011
  8. :> 0b101
  9. :> 0b110
  10. :> 0b111
  11. :> Nil
  12.  
  13.  
  14.  
  15.  
  16. getDat pos dat = dat !! pos
  17.  
  18. {-# ANN topEntity
  19. (defTop
  20. { t_name = "test"
  21. , t_outputs = ["LED"]
  22. , t_extraIn = [ ("CLOCK_50", 1)
  23. , ("RESET" , 1)
  24. ]
  25. , t_clocks = [altpll "altpll50" "CLOCK_50(0)" "not RESET(0)"]
  26. })#-}
  27.  
  28. topEntity :: Signal (BitVector 3)
  29. topEntity = s
  30. where
  31. s = mealy counterT (0, 1, 0b011) 0
  32.  
  33. counterT (cntr, pos, leds) z = ((cntr', pos', leds'), leds)
  34. where
  35. cntr_max = 16650000
  36.  
  37. cntr' | cntr == cntr_max = 0
  38. | otherwise = cntr + 1
  39.  
  40. pos' | pos == 5 = 1
  41. | cntr == 0 = pos + 1
  42. | otherwise = pos
  43.  
  44. leds' | cntr == 0 = getDat pos ram_data
  45. | otherwise = leds
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