chris@wotan$ # Fetch the code. chris@wotan$ cd $HOME chris@wotan$ wget -q http://www.swaton.ukfsn.org/bin/fpgalink-20130321/fpgalink-bin.tar.gz chris@wotan$ tar zxf fpgalink-bin.tar.gz chris@wotan$ cd libfpgalink-20130321/ chris@wotan$ chris@wotan$ # Test with nexys2-1200: note the -d to enable USB power. chris@wotan$ lin.x64/rel/flcli -i 04b4:8613 -v 1d50:602b -d D7+ -q D0D2D3D4 -p J:D0D2D3D4:hdl/apps/makestuff/swled/cksum/vhdl/csvf/fx2all-nexys2-1200.csvf -b -a 'w0 "README";r1;r2' Attempting to open connection to FPGALink device 1d50:602b... Loading firmware into 04b4:8613... Awaiting renumeration........ Attempting to open connection to FPGLink device 1d50:602b again... The FPGALink device at 1d50:602b scanned its JTAG chain, yielding: 0x21C2E093 0xF5046093 Programming device... Executing CommFPGA actions on FPGALink device 1d50:602b... Wrote 6222 bytes (checksum 0x8779) to channel 0 at 15.175861 MiB/s Read 1 bytes (checksum 0x0087) from channel 1 at 0.004652 MiB/s Read 1 bytes (checksum 0x0079) from channel 2 at 0.004058 MiB/s 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 00000000 87 79 .y chris@wotan$ chris@wotan$ # Now test with a MakeStuff LX9 board: no need for -d here. chris@wotan$ lin.x64/rel/flcli -i 04b4:8613 -v 1d50:602b -q A7A0A3A1 -p J:A7A0A3A1:hdl/apps/makestuff/swled/cksum/vhdl/csvf/fx2min-lx9.csvf -b -a 'w0 "README";r1;r2' Attempting to open connection to FPGALink device 1d50:602b... Loading firmware into 04b4:8613... Awaiting renumeration......... Attempting to open connection to FPGLink device 1d50:602b again... The FPGALink device at 1d50:602b scanned its JTAG chain, yielding: 0x24001093 Programming device... Executing CommFPGA actions on FPGALink device 1d50:602b... Wrote 6222 bytes (checksum 0x8779) to channel 0 at 19.713494 MiB/s Read 1 bytes (checksum 0x0087) from channel 1 at 0.004607 MiB/s Read 1 bytes (checksum 0x0079) from channel 2 at 0.004111 MiB/s 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 00000000 87 79 .y chris@wotan$ chris@wotan$ # Now try an Aessent AES220, with Slave Serial programming (instead of JTAG). chris@wotan$ lin.x64/rel/flcli -i 04b4:8613 -v 1d50:602b -p XS:D0D5D1D6A7:[D3/,B1+,B5+,B3+]:hdl/apps/makestuff/swled/cksum/vhdl/bin/fx2all-aes220.bin -b -a 'w0 "README";r1;r2' Attempting to open connection to FPGALink device 1d50:602b... Loading firmware into 04b4:8613... Awaiting renumeration....... Attempting to open connection to FPGLink device 1d50:602b again... Programming device... Executing CommFPGA actions on FPGALink device 1d50:602b... Wrote 6222 bytes (checksum 0x8779) to channel 0 at 19.518953 MiB/s Read 1 bytes (checksum 0x0087) from channel 1 at 0.004629 MiB/s Read 1 bytes (checksum 0x0079) from channel 2 at 0.004111 MiB/s 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 00000000 87 79 .y chris@wotan$ chris@wotan$ # Now try an Aessent AES220 again, this time with Slave Parallel (SelectMAP). chris@wotan$ lin.x64/rel/flcli -i 04b4:8613 -v 1d50:602b -p XP:D0D5D1D6A01234567:[B4-,D2-,D3/,B1+,B5+,B3-]:hdl/apps/makestuff/swled/cksum/vhdl/bin/fx2all-aes220.bin -b -a 'w0 "README";r1;r2' Attempting to open connection to FPGALink device 1d50:602b... Loading firmware into 04b4:8613... Awaiting renumeration........ Attempting to open connection to FPGLink device 1d50:602b again... Programming device... Executing CommFPGA actions on FPGALink device 1d50:602b... Wrote 6222 bytes (checksum 0x8779) to channel 0 at 17.555508 MiB/s Read 1 bytes (checksum 0x0087) from channel 1 at 0.004675 MiB/s Read 1 bytes (checksum 0x0079) from channel 2 at 0.004093 MiB/s 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 00000000 87 79 .y chris@wotan$ chris@wotan$ # Now try building the C example: first we need the build infrastructure. chris@wotan$ cd $HOME chris@wotan$ mkdir try4 chris@wotan$ cd try4/ chris@wotan$ wget -q http://www.swaton.ukfsn.org/bin/makestuff-lindar-20130126.tar.gz chris@wotan$ tar zxf makestuff-lindar-20130126.tar.gz chris@wotan$ cd makestuff/libs/ chris@wotan$ wget -q http://www.swaton.ukfsn.org/bin/fpgalink-20130321/fpgalink-bin.tar.gz chris@wotan$ tar zxf fpgalink-bin.tar.gz chris@wotan$ mv libfpgalink-20130321 libfpgalink chris@wotan$ cd libfpgalink/examples/c/ chris@wotan$ make mkdir -p lin.x64 echo '-I${ROOT}/libs/libfpgalink/examples/c ' > lin.x64/incs.txt mkdir -p lin.x64/dbg (for i in /home/chris/try4/makestuff/libs/libfpgalink/lin.x64/dbg/libs.txt; do cat $i 2>/dev/null; done; ) > lin.x64/dbg/libs.txt mkdir -p lin.x64/dbg/.build gcc -g -c -m64 -DBYTE_ORDER=1234 -Wall -Wextra -Wundef -pedantic-errors -std=c99 -Wstrict-prototypes -Wno-missing-field-initializers -Wstrict-aliasing=3 -fstrict-aliasing -I. -I/home/chris/try4/makestuff/common -I/home/chris/try4/makestuff/libs/libfpgalink -MMD -MP -MF lin.x64/dbg/.build/args.o.d -Wa,-adhlns=lin.x64/dbg/.build/args.o.lst args.c -o lin.x64/dbg/.build/args.o gcc -g -c -m64 -DBYTE_ORDER=1234 -Wall -Wextra -Wundef -pedantic-errors -std=c99 -Wstrict-prototypes -Wno-missing-field-initializers -Wstrict-aliasing=3 -fstrict-aliasing -I. -I/home/chris/try4/makestuff/common -I/home/chris/try4/makestuff/libs/libfpgalink -MMD -MP -MF lin.x64/dbg/.build/main.o.d -Wa,-adhlns=lin.x64/dbg/.build/main.o.lst main.c -o lin.x64/dbg/.build/main.o for i in /home/chris/try4/makestuff/libs/libfpgalink/lin.x64/dbg/libargtable2.so /home/chris/try4/makestuff/libs/libfpgalink/lin.x64/dbg/libbuffer.so /home/chris/try4/makestuff/libs/libfpgalink/lin.x64/dbg/liberror.so /home/chris/try4/makestuff/libs/libfpgalink/lin.x64/dbg/libfpgalink.so /home/chris/try4/makestuff/libs/libfpgalink/lin.x64/dbg/libfx2loader.so /home/chris/try4/makestuff/libs/libfpgalink/lin.x64/dbg/libusbwrap.so ; do cp -rp $i lin.x64/dbg; done gcc -m64 -DBYTE_ORDER=1234 -Wl,--relax,--gc-sections,-Map=lin.x64/dbg/.build/c.map,--cref,-rpath,\$ORIGIN,-rpath-link,lin.x64/dbg -o lin.x64/dbg/c lin.x64/dbg/.build/args.o lin.x64/dbg/.build/main.o -L/home/chris/try4/makestuff/libs/libfpgalink/lin.x64/dbg -lfpgalink mkdir -p lin.x64/rel (for i in /home/chris/try4/makestuff/libs/libfpgalink/lin.x64/rel/libs.txt; do cat $i 2>/dev/null; done; ) > lin.x64/rel/libs.txt mkdir -p lin.x64/rel/.build gcc -O3 -c -m64 -DBYTE_ORDER=1234 -Wall -Wextra -Wundef -pedantic-errors -std=c99 -Wstrict-prototypes -Wno-missing-field-initializers -Wstrict-aliasing=3 -fstrict-aliasing -I. -I/home/chris/try4/makestuff/common -I/home/chris/try4/makestuff/libs/libfpgalink -MMD -MP -MF lin.x64/rel/.build/args.o.d -Wa,-adhlns=lin.x64/rel/.build/args.o.lst args.c -o lin.x64/rel/.build/args.o gcc -O3 -c -m64 -DBYTE_ORDER=1234 -Wall -Wextra -Wundef -pedantic-errors -std=c99 -Wstrict-prototypes -Wno-missing-field-initializers -Wstrict-aliasing=3 -fstrict-aliasing -I. -I/home/chris/try4/makestuff/common -I/home/chris/try4/makestuff/libs/libfpgalink -MMD -MP -MF lin.x64/rel/.build/main.o.d -Wa,-adhlns=lin.x64/rel/.build/main.o.lst main.c -o lin.x64/rel/.build/main.o for i in /home/chris/try4/makestuff/libs/libfpgalink/lin.x64/rel/libargtable2.so /home/chris/try4/makestuff/libs/libfpgalink/lin.x64/rel/libbuffer.so /home/chris/try4/makestuff/libs/libfpgalink/lin.x64/rel/liberror.so /home/chris/try4/makestuff/libs/libfpgalink/lin.x64/rel/libfpgalink.so /home/chris/try4/makestuff/libs/libfpgalink/lin.x64/rel/libfx2loader.so /home/chris/try4/makestuff/libs/libfpgalink/lin.x64/rel/libusbwrap.so ; do cp -rp $i lin.x64/rel; done gcc -m64 -DBYTE_ORDER=1234 -Wl,--relax,--gc-sections,-Map=lin.x64/rel/.build/c.map,--cref,-rpath,\$ORIGIN,-rpath-link,lin.x64/rel -o lin.x64/rel/c lin.x64/rel/.build/args.o lin.x64/rel/.build/main.o -L/home/chris/try4/makestuff/libs/libfpgalink/lin.x64/rel -lfpgalink strip lin.x64/rel/c chris@wotan$ lin.x64/rel/c -h FPGALink "C" Example Copyright (C) 2011-2013 Chris McClelland Usage: lin.x64/rel/c [-h] [-i ] -v [-d ] [-q ] [-p ] [-f ] Load FX2LP firmware, load the FPGA, interact with the FPGA. -i initial vendor and product ID of the FPGALink device -v renumerated vendor and product ID of the FPGALink device -d configure the ports -q scan the JTAG chain -p configuration and programming file -f binary data to write to channel 0 -h print this help and exit chris@wotan$ lin.x64/rel/c -i 04b4:8613 -v 1d50:602b -p XS:D0D5D1D6A7:[D3/,B1+,B5+,B3+]:../../hdl/apps/makestuff/swled/cksum/vhdl/bin/fx2all-aes220.bin -f README FPGALink "C" Example Copyright (C) 2011-2013 Chris McClelland Attempting to open connection to FPGALink device 1d50:602b... Loading firmware into 04b4:8613... Awaiting renumeration........ Attempting to open connection to FPGLink device 1d50:602b again... Executing programming configuration "XS:D0D5D1D6A7:[D3/,B1+,B5+,B3+]:../../hdl/apps/makestuff/swled/cksum/vhdl/bin/fx2all-aes220.bin" on FPGALink device 1d50:602b... Enabling FIFO mode... Zeroing registers 1 & 2... Writing 0.00 MiB (checksum 0xF18C) from README to FPGALink device 1d50:602b... Reading channel 0...got 0x00 Reading channel 1...got 0xF1 Reading channel 2...got 0x8C chris@wotan$