04[22:57] mcuelenaere: I saw some progress on the vx747 port [22:57] does RB now run on it? 01[22:57] nah 01[22:57] the MMU is killing me :/ [22:58] why? 01[22:58] I really hate it and just want to get rid of it 01[22:58] it gives me TLB errors [22:58] AFAIK RB doesn't use the MMU 01[22:58] exactly [22:58] scorche: well, maybe next time then 01[22:58] MIPS uses a TLB with 32 items [22:59] or... should we make a MMU-less and MMU-ful RB versions? 01[22:59] and whenever a memory location isn't in one of those, the processor does an interrupt requesting for a refill 01[22:59] but the problem is I don't want to refill it 01[22:59] + it seems to give TLB errors on the framebuffer :/ 04[22:59] mcuelenaere: can we disable the MMU? 01[22:59] I tried, but it didn't work 01[22:59] if I just had some more documentation 06[22:59] * wpyh is not too familiar with that 01[22:59] like JzRISC 01[23:00] neither am I :/ 01[23:00] the docs I have document all the other chips in the SoC, but not the processor itself [23:00] Am I the only one who doesn't see the point of FS#9346 ? 04[23:01] mcuelenaere: for the time being, can we ignore those interrupts? 01[23:02] no, then all the others are ignored too 01[23:02] I think 01[23:02] and we need them 06[23:02] * wpyh doesn't understand why... 01[23:02] you don't understand why we need interrupts? 01[23:02] because a lot of code is based on it 01[23:03] s/based/dependant/ 01[23:03] like the current_tick [23:03] uh, I mean [23:03] can we ignore all such interrupts (that are raised because of the TLB miss) [23:04] Is this development talk? 01[23:04] yes, perhaps this should be moved to #rockbox [23:04] gevaerts: more like a lesson in OS design [23:04] :p [23:04] wpyh: make sure the resulting OS doesn't have a name with rocks in it? [23:04] s/?/:)/ [23:05] :p