Jul 16 14:31:25 yes, it becomes an open drain output Jul 16 14:31:32 which might pull low Jul 16 14:31:46 under what conditions does it pull low ? Jul 16 14:31:59 Before the Mode pins are sampled, INIT_B is an Jul 16 14:31:59 input that can be held Low to delay configuration. Jul 16 14:31:59 After the Mode pins are sampled, INIT_B is an Jul 16 14:31:59 open-drain active-Low output indicating whether Jul 16 14:31:59 a CRC error occurred during configuration: Jul 16 14:31:59 0 = CRC error Jul 16 14:32:01 1 = No CRC error